CN116449765A - First fault determination method and device, storage medium and terminal equipment - Google Patents
First fault determination method and device, storage medium and terminal equipment Download PDFInfo
- Publication number
- CN116449765A CN116449765A CN202310276748.3A CN202310276748A CN116449765A CN 116449765 A CN116449765 A CN 116449765A CN 202310276748 A CN202310276748 A CN 202310276748A CN 116449765 A CN116449765 A CN 116449765A
- Authority
- CN
- China
- Prior art keywords
- fault
- data storage
- signal
- control signal
- target
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 37
- 238000013500 data storage Methods 0.000 claims abstract description 58
- 230000008859 change Effects 0.000 claims abstract description 10
- 238000004590 computer program Methods 0.000 claims description 19
- 238000012544 monitoring process Methods 0.000 claims description 3
- 238000012545 processing Methods 0.000 abstract description 6
- 238000012423 maintenance Methods 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract description 4
- 238000010248 power generation Methods 0.000 description 6
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 5
- 239000000446 fuel Substances 0.000 description 5
- 229910052739 hydrogen Inorganic materials 0.000 description 5
- 239000001257 hydrogen Substances 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/054—Input/output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/14—Plc safety
- G05B2219/14005—Alarm
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Testing And Monitoring For Control Systems (AREA)
Abstract
The invention discloses a first-time fault determining method which is suitable for a PLC processor, wherein the PLC processor comprises n fault data memory subareas, n fault mark registers and an output state register, and the first-time fault determining method comprises the following steps: acquiring fault signals, and storing fault information corresponding to the fault signals into the target fault data storage subarea; refreshing (n-1) fault flag registers associated with the target fault data storage sub-region when the change of the target fault data storage sub-region is monitored, so that the state value of the corresponding fault flag bit is changed; the output state register generates a control signal according to the received state value of each fault zone bit; and comparing the control signal with a preset first-time fault control signal, and judging the first-time fault. The invention is beneficial to improving the fault processing efficiency of after-sales maintenance personnel by judging the first fault.
Description
Technical Field
The present invention relates to the field of electric power, and in particular, to a method and apparatus for determining a first failure, a storage medium, and a terminal device.
Background
In recent years, with the wide application of hydrogen fuel cells, the corresponding power generation systems are more and more complex, and thus the requirements for the power generation system fault handling capability are also higher and higher. In general, the failure handling flow of a hydrogen fuel cell power generation system is: the fault triggering-system stopping or load dropping-fault alarming is that a series of related faults are triggered after the fault triggering and during the period of system stopping or load dropping, and the system reports all the faults to a display interface indifferently, and according to actual experience, more than 90% of the faults are caused by the first faults, but in the prior art, the first faults cannot be distinguished, so that after-sales maintenance personnel need to analyze the faults one by experience, and the fault processing efficiency is low.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a method, a device, a storage medium and terminal equipment for determining a first failure, which can identify the first failure and are beneficial to improving the failure processing efficiency of after-sales maintenance personnel.
The embodiment of the invention provides a first-time fault determining method which is suitable for a PLC processor, wherein the PLC processor comprises n fault data memory subareas, n fault flag registers and an output state register, each fault data memory subarea correspondingly stores one type of fault information, each fault flag register comprises (n-1) fault flag bits, each fault data memory subarea is associated with the (n-1) fault flag registers and corresponds to one fault flag bit in each associated fault flag register;
the first failure determination method comprises the following steps:
acquiring a fault signal and determining a fault type corresponding to the fault signal;
determining a target fault data storage subarea corresponding to the fault signal according to the fault type, and then storing fault information corresponding to the fault signal into the target fault data storage subarea;
refreshing (n-1) fault flag registers associated with the target fault data storage sub-region when the change of the target fault data storage sub-region is detected, so that the state value of a fault flag bit corresponding to the target fault data storage sub-region in the registers associated with the target fault data storage sub-region is changed;
outputting the state values of the fault zone bits of all the fault zone registers to the output state registers so that the output state registers generate a control signal according to the received state values of the fault zone bits;
comparing the control signal with a preset first-time fault control signal, and judging that the fault corresponding to the fault signal is the first-time fault when the control signal is consistent with the preset first-time fault control signal.
Further, the acquiring the fault signal includes:
and monitoring faults according to a plurality of sensors to obtain the fault signals.
Further, after judging that the fault corresponding to the fault signal is a first fault, the method further includes: and controlling an alarm device to alarm the first failure.
Further, when the control signal is determined to be inconsistent with the preset first-time fault control signal, the fault corresponding to the fault signal is determined to be a non-first-time fault.
Further, after determining that the fault corresponding to the fault signal is a first fault, sending fault information corresponding to the first fault or sending the fault information to an upper computer so that the upper computer displays the fault information in a first display area;
after determining that the fault corresponding to the fault signal is a non-first fault, sending fault information corresponding to the non-first fault or sending the fault information to an upper computer so that the upper computer displays the fault information in a second display area;
wherein the first display area is different from the second display area.
The embodiment of the invention also provides a device for determining the first failure, which comprises the following steps:
the fault acquisition module is used for acquiring a fault signal and determining a fault type corresponding to the fault signal;
the fault storage module is used for determining a target fault data storage subarea corresponding to the fault signal according to the fault type, and then storing fault information corresponding to the fault signal into the target fault data storage subarea;
the fault marking module is used for refreshing (n-1) fault marking registers associated with the target fault data storage subarea when the change of the target fault data storage subarea is detected, so that the state value of the fault marking bit corresponding to the target fault data storage subarea in the registers associated with the target fault data storage subarea is changed;
the fault output module is used for outputting the state values of the fault zone bits of all the fault zone registers to the output state registers so that the output state registers generate a control signal according to the received state values of the fault zone bits;
the fault judging module is used for comparing the control signal with a preset first-time fault control signal, and judging that the fault corresponding to the fault signal is the first-time fault when the control signal is consistent with the preset first-time fault control signal.
The embodiment of the invention also provides a storage medium, which comprises a stored computer program; wherein the computer program, when running, controls the device in which the storage medium is located to execute the method for determining the first failure according to any one of the present invention.
The embodiment of the invention also provides a terminal device, which comprises a processor, a memory and a computer program stored in the memory and configured to be executed by the processor, wherein the processor realizes the method for determining the first failure according to any one of the invention when executing the computer program.
Compared with the prior art, the embodiment of the invention has the following beneficial effects:
the invention is suitable for a PLC processor, comprising n fault data storage subareas, n fault mark registers and an output status register, when faults occur, a fault signal is obtained and stored in the corresponding target fault data storage subareas, when the fault mark registers monitor that the corresponding fault data storage subareas change, the (n-1) fault mark registers associated with the fault data storage subareas are updated, wherein each associated fault mark register has one mark bit of the fault, so each fault causes the fault mark register to output different information, the output status register processes the output information, thereby generating a unique control signal corresponding to each fault, and the unique control signal is compared with a preset first-time fault control signal to judge whether the fault corresponding to the fault signal is the first-time fault.
Drawings
Fig. 1 is a flowchart of steps of a method for determining a first failure according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a first failure determining device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments.
Referring to fig. 1, in an embodiment of the present invention, a first failure determination method is provided, and the first failure determination method is applicable to a PLC processor, where the PLC processor includes n failure data memory sub-areas, n failure flag registers, and an output status register, each failure data memory sub-area correspondingly stores one type of failure information, each failure flag register includes (n-1) failure flag bits, each failure data memory sub-area is associated with (n-1) failure flag registers, and corresponds to one failure flag bit in each associated failure flag register;
the first failure determination method comprises the following steps:
step S1: acquiring a fault signal and determining a fault type corresponding to the fault signal;
preferably, the acquiring the fault signal includes: and monitoring faults according to a plurality of sensors to obtain the fault signals.
In a preferred embodiment, the first failure determination method disclosed in the present invention is applicable to a hydrogen fuel cell power generation system, where an internal PLC processor monitors a failure signal according to a sensor, where one failure signal may include a plurality of failure sub-signals, that is, failure information corresponding to the failure signal includes failure information corresponding to a plurality of failure sub-signals, since each module in the hydrogen fuel cell power generation system may generate a plurality of sub-failures in a very short time, and these sub-failures correspond to a type of failure, such as a type representing an alarm, but not stop; the second class represents load reduction or power limitation, but does not stop; three classes represent delayed shut down; the four types represent instantaneous shutdown, and an operation and maintenance person can judge the fault occurrence point through one of the sub faults, so that the sub faults can be packed into a fault signal, and in the subsequent fault information storage, the identification is convenient, the partition memory is reduced, and the fault processing is more efficient.
Step S2: determining a target fault data storage subarea corresponding to the fault signal according to the fault type, and then storing fault information corresponding to the fault signal into the target fault data storage subarea;
in a preferred embodiment, after a fault signal in the hydrogen fuel cell power generation system is generated, a series of other faults may be caused, and the faults are sequentially stored in the corresponding fault data storage subareas, and all the fault information can be obtained by reading the fault data storage subareas.
Step S3: refreshing (n-1) fault flag registers associated with the target fault data storage sub-region when the change of the target fault data storage sub-region is detected, so that the state value of a fault flag bit corresponding to the target fault data storage sub-region in the registers associated with the target fault data storage sub-region is changed;
in a preferred embodiment, when a change of a fault data storage subarea is detected, it is regarded as a target fault data storage subarea, and the (n-1) fault flag registers associated with the target fault data storage subarea are updated immediately, namely the state values of the fault flag bits corresponding to the target fault data storage subarea are changed, so that the internal storage conditions of the (n-1) fault flag registers generate new storage contents compared with the initial storage conditions, such as 4 types of faults currently exist, the fault type corresponding to the target fault data storage subarea is 1 type, the state values of the fault flag bits corresponding to 1 type of faults in the 3 associated fault flag registers are updated, and if the initial sequence values of the 3 fault flag registers are set to be (0) Class 1 ,0 Class 3 ,0 Class 4 )、(0 Class 1 、0 Class 2 、0 Class 4 )、(0 Class 1 、0 Class 2 、0 Class 3 ) After update, it becomes (1) Class 1 ,0 Class 3 ,0 Class 4 )、(1 Class 1 、0 Class 2 、0 Class 4 )、(1 Class 1 、0 Class 2 、0 Class 3 )。
Step S4: outputting the state values of the fault zone bits of all the fault zone registers to the output state registers so that the output state registers generate a control signal according to the received state values of the fault zone bits;
in a preferred embodiment, a unique control signal is generated in the output status register based on the outputs of the n fault flag registers, e.g. the updated sequence value of 3 fault flags is (1 Class 1 ,0 Class 3 ,0 Class 4 )、(1 Class 1 、0 Class 2 、0 Class 4 )、(1 Class 1 、0 Class 2 、0 Class 3 ) The binary groups are represented as 100, 100 and 100, and continuous 3 rectangular signals are generated according to the binary groups to form 1 control signal, and the amplitudes of the continuous 3 rectangular signals in the embodiment are respectively 4-4-4, namely, the corresponding binary groups are subjected to decimal conversion calculation.
Step S5: comparing the control signal with a preset first-time fault control signal, and judging that the fault corresponding to the fault signal is the first-time fault when the control signal is consistent with the preset first-time fault control signal.
In a preferred embodiment, when a preset first fault control signal, i.e. a corresponding fault signal, is used as the first input, the generated control signal, for example, a first fault type 1 will have a preset first fault control signal, which includes 3 continuous rectangular signals with amplitudes of 4-4-4, and after the control signal is generated in the PLC processor, the control signal is compared with the preset first fault control signal corresponding to the first fault type 1, where the comparison is consistent, the first fault type 1 is indicated as the first fault, and the comparison is inconsistent, the first fault type 1 is indicated as the non-first fault.
Preferably, after determining that the fault corresponding to the fault signal is a first fault, the method further includes: and controlling an alarm device to alarm the first failure.
Preferably, when the control signal is determined to be inconsistent with the preset first-time fault control signal, the fault corresponding to the fault signal is determined to be a non-first-time fault.
After determining that the fault corresponding to the fault signal is a first fault, sending fault information corresponding to the first fault or sending the fault information to an upper computer so that the upper computer displays the fault information in a first display area;
after determining that the fault corresponding to the fault signal is a non-first fault, sending fault information corresponding to the non-first fault or sending the fault information to an upper computer so that the upper computer displays the fault information in a second display area;
wherein the first display area is different from the second display area.
In a preferred embodiment, the comparison is performed according to the obtained control signal and a preset first-time fault control signal, when the comparison is consistent, the fault corresponding to the fault signal is indicated to be the first-time fault, when the comparison is inconsistent, the fault corresponding to the fault signal is indicated to be the non-first-time fault, further, the upper computer displays the judged first-time fault information and the non-first-time fault information at an interface, so that the first-time fault information and other non-first-time fault information can be known in time, and then an operation and maintenance personnel is informed to process.
On the basis of the method item embodiment of the invention, the device item embodiment is correspondingly provided:
referring to fig. 2, another embodiment of the present invention provides a first failure determining apparatus, including:
the fault acquisition module is used for acquiring a fault signal and determining a fault type corresponding to the fault signal;
the fault storage module is used for determining a target fault data storage subarea corresponding to the fault signal according to the fault type, and then storing fault information corresponding to the fault signal into the target fault data storage subarea;
the fault marking module is used for refreshing (n-1) fault marking registers associated with the target fault data storage subarea when the change of the target fault data storage subarea is detected, so that the state value of the fault marking bit corresponding to the target fault data storage subarea in the registers associated with the target fault data storage subarea is changed;
the fault output module is used for outputting the state values of the fault zone bits of all the fault zone registers to the output state registers so that the output state registers generate a control signal according to the received state values of the fault zone bits;
the fault judging module is used for comparing the control signal with a preset first-time fault control signal, and judging that the fault corresponding to the fault signal is the first-time fault when the control signal is consistent with the preset first-time fault control signal.
It should be noted that the above-described apparatus embodiments are merely illustrative, and the units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, in the drawings of the embodiment of the device provided by the invention, the connection relation between the modules represents that the modules have communication connection, and can be specifically implemented as one or more communication buses or signal lines. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
It will be clearly understood by those skilled in the art that, for convenience and brevity, the specific working process of the apparatus described above may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
Based on the above various embodiments, the present invention correspondingly provides storage medium item embodiments.
Another embodiment of the present invention provides a storage medium, where the storage medium includes a stored computer program, where when the computer program runs, the device where the computer readable storage medium is located is controlled to execute a method for determining an initial failure according to an embodiment of any one of the method of the present invention.
The storage medium is a computer readable storage medium, and the computer program is stored in the computer readable storage medium, and when executed by a processor, the computer program can implement the steps of the above-mentioned method embodiments. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth. It should be noted that the computer readable medium contains content that can be appropriately scaled according to the requirements of jurisdictions in which such content is subject to legislation and patent practice, such as in certain jurisdictions in which such content is subject to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.
Based on the above various embodiments, the present invention correspondingly provides embodiments of terminal equipment items.
An embodiment of the present invention provides a terminal device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, where the processor executes the computer program to implement a method for determining an initial failure according to an embodiment of any one of the method of the present invention.
The terminal equipment can be computing terminal equipment such as a desktop computer, a notebook computer, a palm computer, a cloud server and the like. The terminal device may include, but is not limited to, a processor, a memory.
The processor may be a central processing unit (Central Processing Unit, CPU), other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. The general purpose processor may be a microprocessor or the processor may be any conventional processor or the like, which is a control center of the terminal device, and which connects various parts of the entire terminal device using various interfaces and lines.
The memory may be used to store the computer program, and the processor may implement various functions of the terminal device by running or executing the computer program stored in the memory and invoking data stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function, and the like; the storage data area may store data created according to the use of the cellular phone, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as a hard disk, memory, plug-in hard disk, smart Media Card (SMC), secure Digital (SD) Card, flash Card (Flash Card), at least one disk storage device, flash memory device, or other volatile solid-state storage device.
The embodiment of the invention has the following beneficial effects:
the invention is suitable for a PLC processor, comprising n fault data storage subareas, n fault mark registers and an output status register, when faults occur, a fault signal is obtained and stored in the corresponding target fault data storage subareas, when the fault mark registers monitor that the corresponding fault data storage subareas change, the (n-1) fault mark registers associated with the fault data storage subareas are updated, wherein each associated fault mark register has one mark bit of the fault, so each fault enables the fault mark register to output different information, the output status register processes the output information, thereby generating a unique control signal corresponding to the fault, the unique control signal is compared with a preset first fault control signal, and whether the fault corresponding to the fault signal is the first fault is judged.
The foregoing is a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention and are intended to be comprehended within the scope of the present invention.
Claims (8)
1. The first fault determining method is characterized by being applied to a PLC processor, wherein the PLC processor comprises n fault data storage subareas, n fault flag registers and an output state register, each fault data storage subarea correspondingly stores one type of fault information, each fault flag register comprises (n-1) fault flag bits, each fault data storage subarea is associated with (n-1) fault flag registers, and each fault data storage subarea corresponds to one fault flag bit in each associated fault flag register;
the first failure determination method comprises the following steps:
acquiring a fault signal and determining a fault type corresponding to the fault signal;
determining a target fault data storage subarea corresponding to the fault signal according to the fault type, and then storing fault information corresponding to the fault signal into the target fault data storage subarea;
refreshing (n-1) fault flag registers associated with the target fault data storage sub-region when the change of the target fault data storage sub-region is detected, so that the state value of a fault flag bit corresponding to the target fault data storage sub-region in the registers associated with the target fault data storage sub-region is changed;
outputting the state values of the fault zone bits of all the fault zone registers to the output state registers so that the output state registers generate a control signal according to the received state values of the fault zone bits;
comparing the control signal with a preset first-time fault control signal, and judging that the fault corresponding to the fault signal is the first-time fault when the control signal is consistent with the preset first-time fault control signal.
2. The method of claim 1, wherein said obtaining a fault signal comprises:
and monitoring faults according to a plurality of sensors to obtain the fault signals.
3. The method for determining a first failure according to claim 1, further comprising, after determining that the failure corresponding to the failure signal is the first failure: and controlling an alarm device to alarm the first failure.
4. The method of determining a first failure of claim 1, further comprising:
and when the control signal is inconsistent with the preset first-time fault control signal, judging that the fault corresponding to the fault signal is a non-first-time fault.
5. The method of determining a first failure of claim 4, further comprising:
after determining that the fault corresponding to the fault signal is a first fault, sending fault information corresponding to the first fault or sending the fault information to an upper computer so that the upper computer displays the fault information in a first display area;
after determining that the fault corresponding to the fault signal is a non-first fault, sending fault information corresponding to the non-first fault or sending the fault information to an upper computer so that the upper computer displays the fault information in a second display area;
wherein the first display area is different from the second display area.
6. A first failure determination apparatus, comprising:
the fault acquisition module is used for acquiring a fault signal and determining a fault type corresponding to the fault signal;
the fault storage module is used for determining a target fault data storage subarea corresponding to the fault signal according to the fault type, and then storing fault information corresponding to the fault signal into the target fault data storage subarea;
the fault marking module is used for refreshing (n-1) fault marking registers associated with the target fault data storage subarea when the change of the target fault data storage subarea is detected, so that the state value of the fault marking bit corresponding to the target fault data storage subarea in the registers associated with the target fault data storage subarea is changed;
the fault output module is used for outputting the state values of the fault zone bits of all the fault zone registers to the output state registers so that the output state registers generate a control signal according to the received state values of the fault zone bits;
the fault judging module is used for comparing the control signal with a preset first-time fault control signal, and judging that the fault corresponding to the fault signal is the first-time fault when the control signal is consistent with the preset first-time fault control signal.
7. A storage medium, characterized in that the storage medium comprises a stored computer program; wherein the computer program, when run, controls a device in which the storage medium is located to perform the method of determining a primary failure according to any of claims 1-5.
8. A terminal device comprising a processor, a memory and a computer program stored in the memory and configured to be executed by the processor, the processor implementing the method of determining a first failure according to any of claims 1-5 when the computer program is executed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310276748.3A CN116449765A (en) | 2023-03-16 | 2023-03-16 | First fault determination method and device, storage medium and terminal equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310276748.3A CN116449765A (en) | 2023-03-16 | 2023-03-16 | First fault determination method and device, storage medium and terminal equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
CN116449765A true CN116449765A (en) | 2023-07-18 |
Family
ID=87119319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310276748.3A Pending CN116449765A (en) | 2023-03-16 | 2023-03-16 | First fault determination method and device, storage medium and terminal equipment |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN116449765A (en) |
-
2023
- 2023-03-16 CN CN202310276748.3A patent/CN116449765A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109088775B (en) | Abnormity monitoring method and device and server | |
CN112115026B (en) | Server cluster monitoring method and device, electronic equipment and readable storage medium | |
CN104426696A (en) | Fault processing method and device | |
CN111694677A (en) | Message queue management method, device, terminal and computer-readable storage medium | |
CN115858311A (en) | Operation and maintenance monitoring method and device, electronic equipment and readable storage medium | |
CN111953569B (en) | State information reporting method, device, equipment and medium | |
CN116449765A (en) | First fault determination method and device, storage medium and terminal equipment | |
CN113835961B (en) | Alarm information monitoring method, device, server and storage medium | |
CN115687026A (en) | Multi-node server fault early warning method, device, equipment and medium | |
CN115269252A (en) | Application program fault processing method, device, equipment and storage medium | |
CN112612592A (en) | Configurable timed task processing method, device, equipment and storage medium | |
CN114092275A (en) | Enterprise operation abnormity monitoring method and device, computer equipment and storage medium | |
CN111382035A (en) | Global matching device and method for alarm triggering rules of operation and maintenance system | |
CN113127051B (en) | Application resource packaging process monitoring method, device, equipment and medium | |
CN110554942A (en) | method and device for monitoring code execution | |
CN113852686B (en) | Block chain network communication method, device, equipment and readable storage medium | |
CN106776278B (en) | DSP (digital signal processor) debugging method and device based on dual-core architecture | |
CN115776105B (en) | Current control method, apparatus, computer device, and storage medium | |
CN117130880A (en) | Data processing method, apparatus, device, storage medium, and program product | |
CN114816812A (en) | Abnormal service processing method and device and electronic equipment | |
CN115684900A (en) | State monitoring method and system for power supply FPGA | |
CN116760683A (en) | Early warning information processing method, device, equipment, storage medium and program product | |
CN115442214A (en) | Method, device, equipment, storage medium and program product for troubleshooting business abnormity | |
CN117234843A (en) | Inspection method, inspection device, computer equipment and storage medium | |
CN116578455A (en) | Change risk monitoring method, device, computer equipment and storage medium |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |