CN116449277A - Detection and calibration system for ATE test equipment and control method thereof - Google Patents
Detection and calibration system for ATE test equipment and control method thereof Download PDFInfo
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- G—PHYSICS
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- G—PHYSICS
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Abstract
The invention discloses a detection and calibration system for ATE (automatic test equipment) testing equipment and a control method thereof, wherein the detection and calibration system comprises an upper computer, a universal pen, a detection and calibration module and ATE testing equipment, wherein the ATE testing equipment comprises a test resource board which comprises an FPGA (field programmable gate array), a digital channel or a power channel, the upper computer is connected with the ATE testing equipment and the universal pen, and the detection and calibration module is connected with the ATE testing equipment and the universal pen; the detection calibration module comprises an input unit, a resistance adjustment unit and a plurality of multimeter interfaces, wherein the input unit comprises a plurality of parallel input branches, each input branch comprises an input port and a first control switch which are connected in series, the resistance adjustment unit comprises a plurality of parallel resistance branches, and each resistance branch comprises a second control switch and a resistor which are connected in series. The embodiment of the invention can enrich the test function and improve the measurement precision, and can be widely applied to the technical field of automatic control.
Description
Technical Field
The invention relates to the technical field of automatic control, in particular to a detection and calibration system for ATE test equipment and a control method thereof.
Background
The chips are subjected to FT (Final Test) and CP (Chip Probing) tests after packaging using an ATE tester, the FT (Final Test) Test also being referred to as a Package Test (Package Test), and the CP (Chip Probing) Test also being referred to as a wafer Test. The FT test is a test for testing the function of each IC and the standard specified by the IC after packaging, and the CP test is a chip test for connecting a bare chip to a tester through a probe on the whole Wafer without dicing packaging. And the completion of the FT test and the CP test needs to ensure that the ATE tester functions normally and can reach the high precision required by the FT test and the CP test.
In the related art, the test scheme of the ATE test equipment has single test function and insufficient measurement accuracy. For example, a channel and a calibration item cannot be specified to perform measurement calibration, and when the accuracy of each drive and measurement of a certain channel is measured to reach a standard, measurement must be performed from scratch, but the channel cannot be directly selected for measurement, which increases the time cost and is not beneficial to the efficiency and convenience of ATE equipment.
Disclosure of Invention
Therefore, an object of the embodiments of the present invention is to provide a detection calibration system for ATE test equipment and a control method thereof, which can enrich test functions and improve measurement accuracy.
In a first aspect, an embodiment of the present invention provides a detection calibration system for an ATE test apparatus, including a host computer, a universal pen, a detection calibration module, and an ATE test apparatus, where the ATE test apparatus includes a test data board, the test data board includes an FPGA, a digital channel, or a power channel, the host computer is connected to the ATE test apparatus and the universal pen, and the detection calibration module is connected to the ATE test apparatus and the universal pen;
the upper computer is used for controlling the universal meter and the ATE test equipment;
the universal meter is used for measuring the electrical parameters of the detection and calibration module;
the FPGA is used for storing the calibration value of the ATE test equipment;
the detection calibration module comprises an input unit, a resistance adjustment unit and a plurality of multimeter interfaces, wherein the input unit comprises a plurality of parallel input branches, each input branch comprises an input port and a first control switch which are connected in series, the resistance adjustment unit comprises a plurality of parallel resistance branches, each resistance branch comprises a second control switch and a resistor which are connected in series, the input unit is connected with the resistance adjustment unit in series, the first multimeter interface is connected with the first port of the resistance adjustment unit, the second port of the resistance adjustment unit is connected with the second multimeter interface and a third multimeter interface through single-pole double-throw switches, and the third multimeter interface is grounded.
In a second aspect, an embodiment of the present invention provides a detection calibration method for an ATE test apparatus, for use in the above-mentioned host computer, including:
initiating a test request to ATE test equipment;
testing whether the basic functions of all digital channels or power channels are normal, and if the basic functions are all normal, performing self-test on the test resource board; the basic functions comprise a driving voltage, a measuring voltage, a driving current and a testing current;
if the self-test result is normal, calibrating the self-test result;
after calibration is completed, measuring accuracy of all digital channels or power channels is tested; the measurement accuracy comprises driving voltage accuracy, measuring current accuracy, driving current accuracy and measuring voltage accuracy;
and if the measurement precision meets the requirement, storing the calibration value into the FPGA.
Optionally, whether the driving voltage of each digital channel or power channel is normal is tested by:
all digital channels or power channels are opened, the digital channels or the power channels to be detected are set as output channels, and a first driving voltage is output to the detection calibration module;
and measuring the first test voltage of the detection calibration module through other digital channels or power channels, and determining whether the driving voltage of the digital channel or the power channel to be detected is normal or not according to the first driving voltage and the first test voltage.
Optionally, each digital channel or power channel is tested for normal measured voltage by:
all digital channels or power channels are opened, the digital channels or power channels to be detected are set as measurement channels, other digital channels or power channels are set as output channels, and the output channels output second driving voltages to the detection calibration module;
and measuring a second test voltage of the detection calibration module through the digital channel or the power channel to be detected, and determining whether the measured voltage of the digital channel or the power channel to be detected is normal or not according to the second drive voltage and the second test voltage.
Optionally, each digital channel or power channel is tested for normal drive current by:
closing all channels, closing a second control switch to connect the resistor in the resistor adjusting unit, and outputting a first driving current to the detection calibration module through a digital channel or a power supply channel to be detected;
and measuring a third test voltage of the detection calibration module, and determining whether the driving current of the digital channel or the power supply channel to be detected is normal or not according to the first driving current, the resistor and the third test voltage.
Optionally, each digital channel or power channel is tested for normal measured current by:
Closing all channels, closing a second control switch to connect the resistor in the resistor adjusting unit, and outputting a third driving voltage to the detection calibration module through the digital channel or the power supply channel to be detected;
and measuring a first test current of the detection calibration module, and determining whether the measured current of the digital channel or the power supply channel to be detected is normal or not according to the third driving voltage, the resistor and the first test current.
Optionally, the drive voltage accuracy of each digital channel or power channel is tested for satisfaction by:
according to a preset driving voltage range, starting from a lower voltage limit, outputting a fourth driving voltage to a detection calibration module through a digital channel or a power supply channel to be detected;
and measuring a fourth test voltage of the detection calibration module through a universal meter, and determining whether the driving voltage precision meets the requirement according to the fourth driving voltage and the fourth test voltage.
Optionally, each digital channel or power channel is tested for a measured current accuracy meeting the requirements by:
closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a fifth driving voltage to the detection calibration module through a digital channel or a power channel to be detected, measuring a second test current through a universal meter, and acquiring a third test current which is self-tested by the detection calibration module through a calling interface;
And determining whether the accuracy of the measured current meets the requirement according to the second test current and the third test current.
Optionally, the drive current accuracy of each digital channel or power channel is tested for satisfaction by:
closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a second driving current to the detection calibration module through a digital channel or a power supply channel to be detected from the lower limit of the current according to the preset driving current range, and measuring a fourth testing current of the detection calibration module through a universal meter;
and determining whether the driving current precision meets the requirement according to the second driving current and the fourth testing current.
Optionally, the measured voltage accuracy of each digital channel or power channel is tested for satisfaction by:
closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a third driving current to the detection and calibration module through a digital channel or a power channel to be detected, measuring a fifth test voltage of the detection and calibration module through a universal meter, and acquiring a sixth test voltage which is self-tested by the detection and calibration module through a calling interface;
and determining whether the precision of the measured voltage meets the requirement according to the fifth test voltage and the sixth test voltage.
The embodiment of the invention has the following beneficial effects: the detection and calibration system for the ATE test equipment comprises an upper computer, a universal pen, a detection and calibration module and the ATE test equipment, wherein the detection and calibration module comprises an input unit, a resistance adjusting unit and a plurality of multimeter interfaces, the input unit comprises a plurality of parallel input branches, each input branch comprises an input port and a first control switch which are connected in series, the resistance adjusting unit comprises a plurality of parallel resistance branches, each resistance branch comprises a second control switch and a resistor which are connected in series, and the input unit is connected in series with the resistance adjusting unit; the test function of ATE test equipment is enriched by selecting all channels or a certain measurement item of a certain channel for detection and calibration through a first control switch in an input unit and a second control switch of a resistance adjusting unit; in the control process, the calibration and the precision measurement are designed integrally, so that the measurement precision is improved; the calibration values are stored in the FPGA, so that the method is not limited to fixed computers and slots, and the method is more convenient to use.
Drawings
FIG. 1 is a block diagram of a test calibration system for ATE test equipment according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a detection calibration module according to an embodiment of the present invention;
FIG. 3 is a flow chart illustrating steps of a test calibration method for ATE test equipment according to an embodiment of the present invention;
FIG. 4 is a block diagram of another exemplary system for calibration testing of ATE test equipment according to an embodiment of the present invention;
fig. 5 is a block diagram of a test calibration apparatus for ATE test equipment according to an embodiment of the present invention.
Detailed Description
The invention will now be described in further detail with reference to the drawings and to specific examples. The step numbers in the following embodiments are set for convenience of illustration only, and the order between the steps is not limited in any way, and the execution order of the steps in the embodiments may be adaptively adjusted according to the understanding of those skilled in the art.
In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is to be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments and can be combined with one another without conflict.
In the following description, the terms "first", "second", "third" and the like are merely used to distinguish similar objects and do not represent a specific ordering of the objects, it being understood that the "first", "second", "third" may be interchanged with a specific order or sequence, as permitted, to enable embodiments of the invention described herein to be practiced otherwise than as illustrated or described herein.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the embodiments of the invention is for the purpose of describing embodiments of the invention only and is not intended to be limiting of the invention.
Before describing embodiments of the present invention in further detail, the terms and terminology involved in the embodiments of the present invention will be described, and the terms and terminology involved in the embodiments of the present invention will be used in the following explanation.
ATE: automatic Test Equipment, a chip automated tester for short.
Testing the resource board: the board cards including PEC, DPS and the like are collectively called as board cards.
PEC board card: the PMU precision measurement device comprises a PMU precision measurement unit, and belongs to a test data board of an ATE tester.
DPS board card: the device power supply unit belongs to the test resource board of the ATE tester.
Digital channel: the channels of the PEC card are referred to as digital Channels (CH), and may also be directly referred to as PEC channels.
A power supply channel: the channels of the DPS board are called power channels (FORCE), and may also be directly called DPS channels.
And a detection and calibration module: the integrated resource board (external test board) paired with the calibration system is tested.
And (3) FPGA: field Programmable Gate Array, field programmable gate array for chip logic function development.
Board card and channel and calibration item correspondence: the board card comprises a plurality of channels, and the channels comprise a plurality of calibration items.
As shown in fig. 1, an embodiment of the present invention provides a detection calibration system for an ATE test apparatus, including a host computer, a universal pen, a detection calibration module, and an ATE test apparatus, where the ATE test apparatus includes a test resource board, the test resource board includes an FPGA, a digital channel, or a power channel, the host computer is connected to the ATE test apparatus and the universal pen, and the detection calibration module is connected to the ATE test apparatus and the universal pen;
the upper computer is used for controlling the universal meter and the ATE test equipment;
the universal meter is used for measuring the electrical parameters of the detection and calibration module;
the FPGA is used for storing the calibration value of the ATE test equipment;
the detection calibration module comprises an input unit, a resistance adjustment unit and a plurality of multimeter interfaces, wherein the input unit comprises a plurality of parallel input branches, each input branch comprises an input port and a first control switch which are connected in series, the resistance adjustment unit comprises a plurality of parallel resistance branches, each resistance branch comprises a second control switch and a resistor which are connected in series, the input unit is connected with the resistance adjustment unit in series, the first multimeter interface is connected with the first port of the resistance adjustment unit, the second port of the resistance adjustment unit is connected with the second multimeter interface and a third multimeter interface through single-pole double-throw switches, and the third multimeter interface is grounded.
It should be noted that multimeters include, but are not limited to, precision multimeters. Referring to fig. 2, the multimeter interface includes 3 interfaces for respectively connecting a voltage level red stylus, a current level red stylus and a black stylus of the multimeter. The first control switch and the second control switch may be relays. CH is a signal output by the tester, different resistance branches comprise resistors with different resistance values, and different resistance branches correspond to different current gears. When the upper computer selects the red meter pen, the current is measured in series; when the upper computer selects the black pointer, the voltage is measured by grounding.
The connection mode between the upper computer and the ATE test equipment is determined according to practical application conditions, and the embodiment is not particularly limited, for example, USB connection is adopted. The connection mode between the upper computer and the universal meter is determined according to the practical application condition, and the embodiment is not particularly limited, for example, GPIB connection is adopted.
The embodiment of the invention has the following beneficial effects: the detection and calibration system for the ATE test equipment comprises an upper computer, a universal pen, a detection and calibration module and the ATE test equipment, wherein the detection and calibration module comprises an input unit, a resistance adjusting unit and a plurality of multimeter interfaces, the input unit comprises a plurality of parallel input branches, each input branch comprises an input port and a first control switch which are connected in series, the resistance adjusting unit comprises a plurality of parallel resistance branches, each resistance branch comprises a second control switch and a resistor which are connected in series, and the input unit is connected in series with the resistance adjusting unit; the test functions of the ATE test equipment are enriched by selecting all channels or a certain measurement item of a certain channel for detection and calibration through the first control switch in the input unit and the second control switch of the resistance adjusting unit.
Referring to fig. 3, an embodiment of the present invention provides a detection calibration method for an ATE test apparatus, which is used for the above-mentioned upper computer, and includes:
s100, initiating a test request to ATE test equipment.
Specifically, a test request is initiated by an upper computer to ATE test equipment.
S200, testing whether the basic functions of all digital channels or power channels are normal, and if the basic functions are all normal, performing self-test on the test resource board; the basic functions include driving voltage, measuring voltage, driving current and testing current.
The basic functions include testing on-off conditions of various pins on ATE test equipment and testing some electrical parameters. Each digital channel or power channel is tested individually. It should be noted that, the digital channel or the power channel and the verification item can be dynamically selected by the host computer.
Specifically, through DDR read-write detection, I2C detection or TestMode detection, the digital circuit module of the board card of the tester is subjected to self-test and the like, and after the self-test is completed, a detection log is automatically stored.
Optionally, whether the driving voltage of each digital channel or power channel is normal is tested by:
s211, opening all digital channels or power channels, setting the digital channels or the power channels to be detected as output channels, and outputting a first driving voltage to a detection calibration module;
S212, measuring the first test voltage of the detection calibration module through other digital channels or power channels, and determining whether the drive voltage of the digital channel or the power channel to be detected is normal according to the first drive voltage and the first test voltage.
It should be noted that, the first driving voltage is determined according to practical applications, and the present embodiment is not particularly limited. And if the absolute value of the difference between the first driving voltage and the first test voltage is within a first preset range, judging that the driving voltage is normal, otherwise, judging that the driving voltage is abnormal. The first preset range is determined according to practical applications, and the embodiment is not particularly limited.
Optionally, each digital channel or power channel is tested for normal measured voltage by:
s221, all digital channels or power channels are opened, the digital channels or power channels to be detected are set as measurement channels, other digital channels or power channels are set as output channels, and the output channels output a second driving voltage to the detection calibration module;
s222, measuring a second test voltage of the detection calibration module through the digital channel or the power channel to be detected, and determining whether the measured voltage of the digital channel or the power channel to be detected is normal according to the second drive voltage and the second test voltage.
It should be noted that, the second driving voltage is determined according to practical applications, and the present embodiment is not particularly limited. And if the absolute value of the difference between the second driving voltage and the second testing voltage is within a second preset range, judging that the measuring voltage is normal, otherwise, judging that the measuring voltage is abnormal. The second preset range is determined according to practical applications, and the embodiment is not particularly limited.
Optionally, each digital channel or power channel is tested for normal drive current by:
s231, closing all channels, closing a second control switch to connect the resistor in the resistor adjusting unit, and outputting a first driving current to the detection calibration module through a digital channel or a power channel to be detected;
s232, measuring a third test voltage of the detection calibration module, and determining whether the drive current of the digital channel or the power supply channel to be detected is normal or not according to the first drive current, the resistor and the third test voltage.
It should be noted that, the resistance values of different branches in the resistance adjustment unit are different, the first driving current is determined according to practical application, and the embodiment is not limited specifically. And calculating a driving voltage according to the first driving current and the corresponding resistor, if the absolute value of the difference value between the driving voltage and the third testing voltage is in a third preset range, the driving current is normal, otherwise, the driving current is abnormal. The third preset range is determined according to practical applications, and the present embodiment is not particularly limited.
Optionally, each digital channel or power channel is tested for normal measured current by:
s241, closing all channels, closing a second control switch to connect the resistor in the resistor adjusting unit, and outputting a third driving voltage to the detection calibration module through the digital channel or the power supply channel to be detected;
s242, measuring a first test current of the detection calibration module, and determining whether the measured current of the digital channel or the power supply channel to be detected is normal according to the third driving voltage, the resistor and the first test current.
It should be noted that, the resistance values of different branches in the resistance adjustment unit are different, the third driving voltage is determined according to practical application, and the embodiment is not limited specifically. And calculating the driving current according to the third driving voltage and the corresponding resistor, if the absolute value of the difference value between the driving current and the first testing current is in a fourth preset range, measuring the normal current, otherwise, measuring the abnormal current. The fourth preset range is determined according to practical applications, and the present embodiment is not particularly limited.
And S300, if the self-test result is normal, calibrating the self-test result.
It should be noted that, the calibration method is determined according to practical application, and the embodiment is not particularly limited. For example, the calibration is performed using the least square method. And the least square method is used for fitting linear calibration, so that the accuracy of ATE equipment is higher.
S400, after calibration is completed, measuring the measurement accuracy of all digital channels or power channels; the measurement accuracy includes a driving voltage accuracy, a measurement current accuracy, a driving current accuracy, and a measurement voltage accuracy.
The measurement accuracy of each digital channel or power channel is tested separately. The measurement accuracy includes, but is not limited to, driving voltage accuracy, measuring current accuracy, driving current accuracy, measuring voltage accuracy, and the like.
Optionally, the drive voltage accuracy of each digital channel or power channel is tested for satisfaction by:
s411, outputting a fourth driving voltage to the detection calibration module through a digital channel or a power channel to be detected from the lower voltage limit according to a preset driving voltage range;
and S412, measuring a fourth test voltage of the detection calibration module through a universal meter, and determining whether the driving voltage precision meets the requirement according to the fourth driving voltage and the fourth test voltage.
It should be noted that the driving voltage range is determined according to practical applications, and the present embodiment is not particularly limited. The fourth driving voltage is determined according to practical applications, and the present embodiment is not particularly limited. First, calculating a first difference value between the fourth driving voltage and the fourth testing voltage, and then calculating a ratio of the first difference value to the fourth driving voltage, wherein if the first ratio value is within a fifth preset range, the driving voltage precision meets the requirement, otherwise, the driving voltage precision does not meet the requirement. The fifth preset range is determined according to practical applications, and the present embodiment is not particularly limited.
Optionally, each digital channel or power channel is tested for a measured current accuracy meeting the requirements by:
s421, closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a fifth driving voltage to the detection calibration module through a digital channel or a power channel to be detected, measuring a second test current through a universal meter, and acquiring a third test current which is self-tested by the detection calibration module through a calling interface;
s422, determining whether the accuracy of the measured current meets the requirement according to the second test current and the third test current.
It should be noted that, the resistance values of different branches in the resistance adjustment unit are different, the fifth driving voltage is determined according to practical applications, and the embodiment is not limited specifically. Firstly, calculating a second difference value of the second test current and the third test current, and then calculating a second ratio of the second difference value to the second test current, wherein if the second ratio is within a sixth preset range, the measured current precision meets the requirement, otherwise, the measured current precision does not meet the requirement. The sixth preset range is determined according to practical applications, and the present embodiment is not particularly limited.
Optionally, the drive current accuracy of each digital channel or power channel is tested for satisfaction by:
S431, closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a second driving current to the detection calibration module through a digital channel or a power supply channel to be detected from the lower limit of the current according to the preset driving current range, and measuring a fourth testing current of the detection calibration module through a universal meter;
s432, determining whether the driving current precision meets the requirement according to the second driving current and the fourth testing current.
It should be noted that, the resistance values of different branches in the resistance adjusting unit are different, the preset driving current range and the second driving current are determined according to practical applications, and the embodiment is not limited specifically. Firstly, calculating a third difference value between the second driving current and the fourth testing current, and then calculating a third ratio of the third difference value to the second driving current, wherein if the third ratio is within a seventh preset range, the driving current precision meets the requirement, otherwise, the driving current precision does not meet the requirement. The seventh preset range is determined according to practical applications, and the present embodiment is not particularly limited.
Optionally, the measured voltage accuracy of each digital channel or power channel is tested for satisfaction by:
s441, closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a third driving current to the detection calibration module through a digital channel or a power channel to be detected, measuring a fifth test voltage of the detection calibration module through a universal meter, and acquiring a sixth test voltage self-tested by the detection calibration module through a calling interface;
S442, determining whether the accuracy of the measured voltage meets the requirement according to the fifth test voltage and the sixth test voltage.
It should be noted that, the resistance values of different branches in the resistance adjustment unit are different, the third driving current is determined according to practical application, and the embodiment is not limited specifically. Firstly, calculating a fourth difference value between the fifth test voltage and the sixth test voltage, and then calculating a fourth ratio of the fourth difference value to the fifth test voltage, wherein if the fourth ratio is within an eighth preset range, the measurement voltage precision meets the requirement, otherwise, the measurement voltage precision does not meet the requirement. The eighth preset range is determined according to practical applications, and the present embodiment is not particularly limited.
S500, if the measurement accuracy meets the requirement, storing the calibration value into the FPGA.
And if all the channels are calibrated, converting and downloading the calibration values into the FPGA through the upper computer, and automatically storing and outputting a detection calibration log file. Specifically, after calibration is finished, the acquired calibration values are arranged according to channels, the calibration values are subjected to numerical conversion, such as conversion of the calibration values into floating point numbers, and whether the calibration values exist in the FPGA is inquired; if the calibration value exists, the calibration value in the FPGA is emptied, and a new calibration value is downloaded into the FPGA; inquiring that no calibration value exists in the FPGA, and downloading the converted calibration value into the FPGA.
The test procedure of ATE test equipment is described in one specific embodiment below.
S1, an upper computer communication ATE device initiates a test, and a detected digital channel or power supply channel is selected.
S2, opening all channels, setting the channel i as an output channel, and testing the driving voltage V of the output channel i on the data board dr To the detection calibration module, the voltage V on the detection calibration module is measured by all measurement channels except channel i Mea Judgment of V Mea And V dr Whether or not they are nearly equal, if |V Mea -V d r|>And 0.5, judging that the driving voltage of the channel i is abnormal in function, and otherwise, judging that the driving voltage of the channel i is normal. S3, after S2 is carried out on all channels, the process proceeds to S3.
S3, opening all channels, setting the channel i as a measurement channel, setting all channels except the channel i on the test data board as output channels, and outputting a channel driving voltage V dr To the detection calibration module, the voltage V on the detection calibration module is measured by the measurement channel i Mea Judgment of V Mea And V dr Whether or not they are nearly equal, if |V Mea -V dr |>And 0.5, judging that the function of the voltage measured by the channel i is abnormal, and otherwise, judging that the function of the voltage measured by the channel i is normal. And S3, carrying out step S4 on all channels, and when S2 and S3 of all channels of the test resource board are detected to be normal, entering step S3.
It should be noted that, in the step S2, the output of the test resource board card channel is detected, that is, one channel i outputs, and all other channels output, so long as one channel can detect a normal value, it can be proved that the channel i outputs normally. S3, measuring and detecting the channel of the test resource board card, namely, taking one channel i as a measuring channel, outputting all other channels, and if the channel i can measure a normal value, proving that the channel i is measured normally. S2 and S3 differ in that one is whether the output function of the detection channel is normal or not, and one is whether the measurement function of the detection channel is normal or not.
S4, closing all channels, sending out signals by the test data board to control the detection calibration module to open a relay (Sx of the relay on the detection calibration module) so that a circuit is connected to a resistor R on the detection calibration module, opening a channel i, driving a current Idr to the detection calibration module by the channel i, and measuring a voltage V on the detection calibration module by the channel i Mea The actual voltage value is calculated to be V through ohm's law Act ＝I dr * R (R is detection school)The actual resistance value represented by the corresponding resistance on the quasimodule). Judgment of V Mea And V Act The difference between (V) Mea -V Act |>And 0.35, judging that the driving current of the channel i is abnormal in function, and otherwise, judging that the driving current of the channel i is normal.
S5, closing all channels, and sending out a signal by the test data board to control the detection calibration module to open the relay so as to enable the circuit to connect with the resistor R, open the channel i and drive the voltage V of the channel i dr To the detection calibration module, channel I measures the current I on the detection calibration module Mea Calculating the actual current value as I through ohm's law Act ＝V dr R (R is the actual resistance value represented by the corresponding resistance on the detection calibration module). Judgment of I Mea And I Act The difference between I Mea -I Act |>And 0.35, judging that the current measuring function of the channel i is abnormal, and otherwise, judging that the current measuring function of the channel i is normal.
S6, enabling the detection calibration module to be connected with resistors with different resistance values through the control relay, and further performing driving measurement on a plurality of gears of the current. After all channels have been subjected to steps S4, S5, S6, the process proceeds to S7.
S7, DDR read-write detection, I2C detection, testMode detection, self-test on a digital circuit module of the board card of the tester and the like are carried out, and after the completion, a detection log is automatically saved and the method enters S8.
S8, entering a calibration interface when the detection result is normal, calibrating by using a least square method, starting measuring accuracy after calibrating, and entering S9.
S9, starting from the lower voltage limit according to the voltage range in the specification, driving a voltage V by the channel i dr And the upper computer controls the precise multimeter to be switched into a voltage measuring mode, and the test data board sends out a signal to control the detection calibration module to connect the precise multimeter into a circuit in parallel. Measuring, detecting and calibrating voltage V on module by precision multimeter Mea Calculate the driving accuracy error err= (V) dr -V Mea )/V dr And judging whether the driving voltage precision meets the requirement.
S10, a test data board sends out a signal to control a relay to enable a detection calibration module to be connected with a resistor R and a channel i to driveA voltage V dr And the upper computer controls the precise multimeter to be switched into a current measuring mode, and the test data board sends out a signal to control the detection calibration module to connect the precise multimeter in series into a circuit. Measuring, detecting and calibrating the current I on the module by a precision multimeter Act The upper computer calls an interface to acquire the current I measured by the channel I Mea Calculate the measurement accuracy error err= (I) Act -I Mea )/I Act And judging whether the accuracy of the measured current meets the requirement.
S11, the test data board sends out a signal to control the relay to enable the detection calibration module to be connected with the resistor R, and the channel I drives a current I from the lower current limit according to the current range in the specification dr And the upper computer controls the precise multimeter to be switched into a current measuring mode, and the test data board sends out a signal to control the detection calibration module to connect the precise multimeter in series into a circuit. Measuring, detecting and calibrating the current I on the module by a precision multimeter Mea Calculate the driving accuracy error err= (I) dr -I Mea )/I dr And judging whether the driving current precision meets the requirement.
S12, the test data board sends out a signal to control the relay to enable the detection calibration module to be connected with the resistor R, and the channel I drives a current I dr And the upper computer controls the precise multimeter to be switched into a voltage measuring mode, and the test data board sends out a signal to control the detection calibration module to connect the precise multimeter into a circuit in parallel. Measuring, detecting and calibrating voltage V on module by precision multimeter Act The upper computer calls an interface to acquire the voltage V measured by the channel i Mea Calculate the measurement accuracy error err= (V) Act -V Mea )/V Act And judging whether the accuracy of the measured voltage meets the requirement.
S13, testing all channels on the resource board card, and performing S9, S10, S11 and S12. After all channels are calibrated, the calibration values are converted and downloaded into the FPGA through the upper computer, and the detection calibration log file is automatically stored and output.
The embodiment of the invention has the following beneficial effects: the detection and calibration system for the ATE test equipment comprises an upper computer, a universal pen, a detection and calibration module and the ATE test equipment, wherein the detection and calibration module comprises an input unit, a resistance adjusting unit and a plurality of multimeter interfaces, the input unit comprises a plurality of parallel input branches, each input branch comprises an input port and a first control switch which are connected in series, the resistance adjusting unit comprises a plurality of parallel resistance branches, each resistance branch comprises a second control switch and a resistor which are connected in series, and the input unit is connected in series with the resistance adjusting unit; the test function of ATE test equipment is enriched by selecting all channels or a certain measurement item of a certain channel for detection and calibration through a first control switch in an input unit and a second control switch of a resistance adjusting unit; in the control process, the calibration and the precision measurement are designed integrally, the precision measurement is automatically carried out after the calibration is finished, the switching is not needed, the channel combination for detecting the calibration and the measurement precision can be dynamically adjusted, and the time cost is shortened; the calibration values are stored in the FPGA, so that the method is not limited to fixed computers and slots, and the method is more convenient to use.
In addition, the channel combination of detection calibration and measurement accuracy can be dynamically adjusted, when a certain digital channel is required to be measured, the channel can be directly selected for measurement, and the whole channel is not required to be measured again, so that the method is more convenient and efficient. The method of directly measuring the current is adopted in the precision measurement, no further calculation is needed, the measurement error caused by the impedance on the load board in the current calculation is avoided, and the measurement is more accurate and more convenient.
As shown in fig. 4, an embodiment of the present invention further provides a test calibration system for an ATE test apparatus, including:
and the first module is used for initiating a test request to the ATE test equipment.
The second module is used for testing whether the basic functions of all the digital channels or the power channels are normal, and if the basic functions are all normal, the test resource board is subjected to self-test; the basic functions include driving voltage, measuring voltage, driving current and testing current.
And the third module is used for calibrating the self-test result if the self-test result is normal.
A fourth module for testing the measurement accuracy of all digital channels or power channels after the calibration is completed; the measurement accuracy includes a driving voltage accuracy, a measurement current accuracy, a driving current accuracy, and a measurement voltage accuracy.
And the fifth module is used for storing the calibration value into the FPGA if the measurement precision meets the requirement.
It can be seen that the content in the above method embodiment is applicable to the system embodiment, and the functions specifically implemented by the system embodiment are the same as those of the method embodiment, and the beneficial effects achieved by the method embodiment are the same as those achieved by the method embodiment.
As shown in fig. 5, an embodiment of the present invention further provides a detection calibration apparatus for an ATE test device, including:
at least one processor;
at least one memory for storing at least one program;
the at least one program, when executed by the at least one processor, causes the at least one processor to carry out the method steps described in the method embodiments above.
Wherein the memory is operable as a non-transitory computer readable storage medium storing a non-transitory software program and a non-transitory computer executable program. The memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes remote memory provided remotely from the processor, the remote memory being connectable to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
It can be seen that the content in the above method embodiment is applicable to the embodiment of the present device, and the functions specifically implemented by the embodiment of the present device are the same as those of the embodiment of the above method, and the beneficial effects achieved by the embodiment of the above method are the same as those achieved by the embodiment of the above method.
Furthermore, embodiments of the present application disclose a computer program product or a computer program, which is stored in a computer readable storage medium. The computer program may be read from a computer readable storage medium by a processor of a computer device, the processor executing the computer program causing the computer device to perform the method as described above. Similarly, the content in the above method embodiment is applicable to the present storage medium embodiment, and the specific functions of the present storage medium embodiment are the same as those of the above method embodiment, and the achieved beneficial effects are the same as those of the above method embodiment.
The embodiment of the present invention also provides a computer-readable storage medium storing a program executable by a processor, which when executed by the processor is configured to implement the above-described method.
It is to be understood that all or some of the steps, systems, and methods disclosed above may be implemented in software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
While the preferred embodiment of the present invention has been described in detail, the invention is not limited to the embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the invention, and these modifications and substitutions are intended to be included in the scope of the present invention as defined in the appended claims.
Claims (10)
1. The detection and calibration system for the ATE test equipment is characterized by comprising an upper computer, a universal pen, a detection and calibration module and the ATE test equipment, wherein the ATE test equipment comprises a test resource board which comprises an FPGA, a digital channel or a power channel, the upper computer is connected with the ATE test equipment and the universal pen, and the detection and calibration module is connected with the ATE test equipment and the universal pen;
the upper computer is used for controlling the universal meter and the ATE test equipment;
the universal meter is used for measuring the electrical parameters of the detection and calibration module;
the FPGA is used for storing the calibration value of the ATE test equipment;
the detection calibration module comprises an input unit, a resistance adjustment unit and a plurality of multimeter interfaces, wherein the input unit comprises a plurality of parallel input branches, each input branch comprises an input port and a first control switch which are connected in series, the resistance adjustment unit comprises a plurality of parallel resistance branches, each resistance branch comprises a second control switch and a resistor which are connected in series, the input unit is connected with the resistance adjustment unit in series, the first multimeter interface is connected with the first port of the resistance adjustment unit, the second port of the resistance adjustment unit is connected with the second multimeter interface and a third multimeter interface through single-pole double-throw switches, and the third multimeter interface is grounded.
2. A test calibration method for ATE test equipment, comprising:
initiating a test request to ATE test equipment;
testing whether the basic functions of all digital channels or power channels are normal, and if the basic functions are all normal, performing self-test on the test resource board; the basic functions comprise a driving voltage, a measuring voltage, a driving current and a testing current;
if the self-test result is normal, calibrating the self-test result;
after calibration is completed, measuring accuracy of all digital channels or power channels is tested; the measurement accuracy comprises driving voltage accuracy, measuring current accuracy, driving current accuracy and measuring voltage accuracy;
and if the measurement precision meets the requirement, storing the calibration value into the FPGA.
3. The method of claim 2, wherein each digital channel or power channel is tested for normal drive voltage by:
all digital channels or power channels are opened, the digital channels or the power channels to be detected are set as output channels, and a first driving voltage is output to the detection calibration module;
and measuring the first test voltage of the detection calibration module through other digital channels or power channels, and determining whether the driving voltage of the digital channel or the power channel to be detected is normal or not according to the first driving voltage and the first test voltage.
4. The method of claim 2, wherein each digital channel or power channel is tested for a proper measured voltage by:
all digital channels or power channels are opened, the digital channels or power channels to be detected are set as measurement channels, other digital channels or power channels are set as output channels, and the output channels output second driving voltages to the detection calibration module;
and measuring a second test voltage of the detection calibration module through the digital channel or the power channel to be detected, and determining whether the measured voltage of the digital channel or the power channel to be detected is normal or not according to the second drive voltage and the second test voltage.
5. The method of claim 2, wherein each digital channel or power channel is tested for normal drive current by:
closing all channels, closing a second control switch to connect the resistor in the resistor adjusting unit, and outputting a first driving current to the detection calibration module through a digital channel or a power supply channel to be detected;
and measuring a third test voltage of the detection calibration module, and determining whether the driving current of the digital channel or the power supply channel to be detected is normal or not according to the first driving current, the resistor and the third test voltage.
6. The method of claim 2, wherein each digital channel or power channel is tested for normal measured current by:
closing all channels, closing a second control switch to connect the resistor in the resistor adjusting unit, and outputting a third driving voltage to the detection calibration module through the digital channel or the power supply channel to be detected;
and measuring a first test current of the detection calibration module, and determining whether the measured current of the digital channel or the power supply channel to be detected is normal or not according to the third driving voltage, the resistor and the first test current.
7. The method of claim 2, wherein the drive voltage accuracy of each digital channel or power channel is tested for satisfaction by:
according to a preset driving voltage range, starting from a lower voltage limit, outputting a fourth driving voltage to a detection calibration module through a digital channel or a power supply channel to be detected;
and measuring a fourth test voltage of the detection calibration module through a universal meter, and determining whether the driving voltage precision meets the requirement according to the fourth driving voltage and the fourth test voltage.
8. The method of claim 2, wherein the measured current accuracy of each digital channel or power channel is tested for satisfaction by:
Closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a fifth driving voltage to the detection calibration module through a digital channel or a power channel to be detected, measuring a second test current through a universal meter, and acquiring a third test current which is self-tested by the detection calibration module through a calling interface;
and determining whether the accuracy of the measured current meets the requirement according to the second test current and the third test current.
9. The method of claim 2, wherein the drive current accuracy of each digital channel or power channel is tested for satisfaction by:
closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a second driving current to the detection calibration module through a digital channel or a power supply channel to be detected from the lower limit of the current according to the preset driving current range, and measuring a fourth testing current of the detection calibration module through a universal meter;
and determining whether the driving current precision meets the requirement according to the second driving current and the fourth testing current.
10. The method of claim 2, wherein the measured voltage accuracy of each digital channel or power channel is tested for satisfaction by:
Closing a second control switch to connect the resistor in the resistor adjusting unit, outputting a third driving current to the detection and calibration module through a digital channel or a power channel to be detected, measuring a fifth test voltage of the detection and calibration module through a universal meter, and acquiring a sixth test voltage which is self-tested by the detection and calibration module through a calling interface;
and determining whether the precision of the measured voltage meets the requirement according to the fifth test voltage and the sixth test voltage.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117555738A (en) * | 2024-01-09 | 2024-02-13 | 悦芯科技股份有限公司 | DPS power supply board for memory FT test |
| CN117665686A (en) * | 2024-01-31 | 2024-03-08 | 珠海芯业测控有限公司 | ATE (automatic test equipment) equipment-based dynamic load calibration method and system, equipment and medium |
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2023
- 2023-03-29 CN CN202310327301.4A patent/CN116449277A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117555738A (en) * | 2024-01-09 | 2024-02-13 | 悦芯科技股份有限公司 | DPS power supply board for memory FT test |
| CN117555738B (en) * | 2024-01-09 | 2024-04-05 | 悦芯科技股份有限公司 | DPS power supply board for memory FT test |
| CN117665686A (en) * | 2024-01-31 | 2024-03-08 | 珠海芯业测控有限公司 | ATE (automatic test equipment) equipment-based dynamic load calibration method and system, equipment and medium |
| CN117665686B (en) * | 2024-01-31 | 2024-04-09 | 珠海芯业测控有限公司 | ATE (automatic test equipment) equipment-based dynamic load calibration method and system, equipment and medium |
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