CN116436459A - Calibration circuit - Google Patents
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- CN116436459A CN116436459A CN202310686158.8A CN202310686158A CN116436459A CN 116436459 A CN116436459 A CN 116436459A CN 202310686158 A CN202310686158 A CN 202310686158A CN 116436459 A CN116436459 A CN 116436459A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
Embodiments of the present application disclose a calibration circuit comprising: the detection circuit, the control circuit, the first adjusting circuit and the second adjusting circuit are sequentially connected; a detection circuit for generating a detection signal for a frequency hopping situation based on a frequency magnitude relation between input signals; the control circuit is used for generating a voltage adjustment signal and a frequency band adjustment signal if the received detection signal represents that frequency hopping does not occur; a first adjusting circuit for adjusting the voltage of the calibration circuit to a reference voltage or a power supply voltage based on the voltage adjustment signal; and the second adjusting circuit is used for adjusting the frequency band of the calibration circuit based on the frequency band adjusting signal in the process of adjusting the voltage of the calibration circuit to the reference voltage or the power supply voltage. According to the method and the device, the voltage of the calibration circuit is adjusted to the reference voltage or the power supply voltage in the calibration process, so that the automatic frequency calibration control clock is greatly shortened, the time consumption of the frequency band calibration process is saved, and the frequency band calibration efficiency is improved.
Description
Technical Field
The application relates to the field of circuits, in particular to a calibration circuit.
Background
After the existing closed-loop calibration circuit needs loop locking, a comparator compares the tuning voltage with upper and lower limit voltages, and frequency band switching operation is performed according to the comparison result. The loop locking process takes longer, resulting in longer times for the closed loop calibration circuit to perform frequency calibration. Particularly, in a closed Loop calibration process of a multi-band PLL (Phase-Locked Loop) system, because the frequency bands are more, the target frequency band cannot be determined at one time, and multiple calibration and locking operations are required, so that the whole calibration process takes a long time, and the target frequency band cannot be determined quickly.
Disclosure of Invention
In order to solve the above technical problems, an embodiment of the present application provides a calibration circuit, in which the voltage of the calibration circuit is adjusted to a reference voltage or a power supply voltage in a closed loop calibration process, and a next frequency band calibration process can be performed without stabilizing a phase-locked loop, so as to quickly complete the frequency band adjustment.
Other features and advantages of the present application will be apparent from the following detailed description, or may be learned in part by the practice of the application.
According to an aspect of an embodiment of the present application, there is provided a calibration circuit including: the detection circuit, the control circuit, the first adjusting circuit and the second adjusting circuit are sequentially connected; the detection circuit is used for generating a detection signal aiming at the frequency hopping condition based on the frequency magnitude relation between the input signals; the control circuit is used for generating a voltage adjustment signal and a frequency band adjustment signal if the received detection signal represents that frequency hopping does not occur; the first adjusting circuit is used for adjusting the voltage of the calibration circuit to a reference voltage or a power supply voltage based on the voltage adjusting signal; the second adjusting circuit is used for adjusting the frequency band of the calibration circuit based on the frequency band adjusting signal after the process of adjusting the voltage of the calibration circuit to the reference voltage or the power supply voltage.
In another exemplary embodiment, the detection circuit is configured to convert the input signal into input voltages, and detect a magnitude relation between the input voltages, and take the detected magnitude relation as the frequency magnitude relation; wherein the magnitude relation between the input voltages is inversely related to the frequency magnitude relation.
In this embodiment, the detection circuit detects the frequency relationship between the input signals relative to the existing counter, converts the input signals into the input voltages, and then detects the frequency relationship between the input signals by detecting the frequency relationship between the input voltages, so as to save time for detecting the frequency. In another exemplary embodiment, the input signal includes a standard signal and a feedback signal; the detection circuit is used for converting the standard signal into a standard voltage corresponding to the standard signal, converting the feedback signal into a feedback voltage corresponding to the feedback signal, and taking the magnitude relation between the standard voltage and the feedback voltage as the frequency magnitude relation; and the magnitude relation of the standard voltage and the feedback voltage is inversely related to the frequency magnitude relation.
In this embodiment, the detection circuit detects the frequency relationship between the feedback signal and the standard signal relative to the existing counter, converts the signals of the feedback signal and the standard signal into corresponding voltages, and then rapidly detects the frequency relationship between the two signals by detecting the magnitude relationship between the two voltages, so as to save time for detecting the frequency.
In another exemplary embodiment, an initial value corresponding to a frequency band of the calibration circuit is a lower threshold; the detection circuit is used for outputting a detection signal representing that frequency hopping does not occur if the feedback voltage is detected to be larger than the standard voltage; the control circuit is used for outputting the voltage adjusting signal to the first adjusting circuit and outputting the frequency band adjusting signal to the second adjusting circuit based on the detection signal representing that the frequency jump does not occur.
In this embodiment, when detecting that the frequency jump does not occur, the control circuit outputs a voltage adjustment signal to adjust the operating voltage of the calibration circuit, and outputs an adjustment signal to the second adjustment circuit to adjust the current frequency band.
In another exemplary embodiment, the calibration circuit further includes a voltage comparison circuit, an input terminal of the voltage comparison circuit is connected to the first adjustment circuit, and an output terminal of the voltage comparison circuit is connected to an input terminal of the control circuit; the detection circuit is used for outputting a detection signal representing the occurrence of frequency hopping if the feedback voltage is detected to be smaller than the standard voltage; the control circuit is used for outputting a control signal aiming at the voltage comparison circuit based on the detection signal representing the occurrence of frequency hopping; the voltage comparison circuit is used for starting based on the control signal, comparing the working voltage output by the first adjusting circuit with the upper limit voltage and the lower limit voltage of the second adjusting circuit, and outputting a voltage comparison result signal to the control circuit; the control circuit is configured to generate the band adjustment signal based on the voltage comparison result signal.
The embodiment further illustrates that the voltage of the calibration circuit is the working voltage output by the first adjustment circuit, and the voltage comparator generates a corresponding voltage comparison result signal to the control circuit according to the magnitude relation between the working voltage and the upper limit voltage and the lower limit voltage, so that the control circuit generates a corresponding frequency band adjustment signal, and the second adjustment circuit can accurately adjust the current frequency band.
In another exemplary embodiment, the control circuit is configured to output a band adjustment signal for characterizing downregulation of the lower threshold to the second adjustment circuit if a voltage comparison result signal characterizing that the operating voltage is less than the lower threshold is received; the control circuit is used for outputting a frequency band adjusting signal for representing up-adjusting the lower limit threshold value to the second adjusting circuit if a voltage comparison result signal representing that the working voltage is larger than the upper limit voltage is received; the control circuit is used for stopping outputting the frequency band adjusting signal if a voltage comparison result signal representing that the working voltage is between the lower limit voltage and the upper limit voltage is received.
In another exemplary embodiment, the detection circuit includes a frequency divider, a voltage converter, and a comparator in series; the frequency divider is used for performing frequency division processing on the input signal to obtain a first input signal and a second input signal; the voltage converter is used for receiving the first input signal and the second input signal, converting the first input signal into the input voltage, inputting the input voltage to the comparator, and converting the second input signal into a voltage for charging a capacitor in the voltage converter; the comparator is used for detecting the magnitude relation between the input voltages and taking the magnitude relation between the input voltages as the frequency magnitude relation.
According to the embodiment, the frequency divider is used for frequency division processing of the signals, the problem that the duty ratio of the input signals is not 50% is avoided, meanwhile, the problem of single-period randomness can be avoided, and meanwhile, the detection speed is improved, so that the interface rate requirement is met.
In another exemplary embodiment, the input signal includes a standard signal and a feedback signal; the frequency divider comprises a first frequency divider and a second frequency divider, and the voltage converter comprises a first voltage converter and a second voltage converter; wherein the first frequency divider is connected in series with the first voltage converter, and the second frequency divider is connected in series with the second voltage converter; the first frequency divider is used for performing frequency division processing on the standard signal to obtain a first standard signal and a second standard signal, and inputting the frequency-divided standard signal to the first voltage converter; the second frequency divider is used for performing frequency division processing on the feedback signal to obtain a first feedback signal and a second feedback signal, and inputting the frequency-divided feedback signal to the second voltage converter.
According to the embodiment, the standard signal is processed through the first frequency divider and the first voltage converter, the feedback signal is processed through the second frequency divider and the second voltage converter, the standard signal and the feedback signal can be processed simultaneously in the whole processing process, the standard signal and the feedback signal do not need to be processed step by step in sequence, and the time for processing the signal is shortened.
In another exemplary embodiment, the detection circuit further includes a digital logic circuit, an input of which is connected to an output of the comparator; the digital logic circuit converts the signals representing the frequency magnitude relation into level signals and outputs the level signals to the control circuit.
The digital logic circuit in this embodiment includes a flip-flop, a logic gate, and the like, and after the digital logic circuit detects that the output result of the comparator jumps, the digital logic circuit can output a digital signal of 0 or 1 to indicate whether the jump occurs, so as to simplify the output signal.
In another exemplary embodiment, the first voltage converter is configured to convert the first standard signal into a standard voltage, input the standard voltage to the comparator, and convert the second standard signal into a voltage for charging a capacitor in the first voltage converter; the second voltage converter is used for converting the first feedback signal into a feedback voltage and inputting the feedback voltage to the comparator, and converting the second feedback signal into a voltage for charging a capacitor in the second voltage converter; the comparator is used for detecting the magnitude relation between the standard voltage and the feedback voltage, taking the magnitude relation between the standard voltage and the feedback voltage as the frequency magnitude relation, and outputting the signal representing the frequency magnitude relation to the digital logic circuit.
The embodiment further illustrates that after the second standard signal and the second feedback signal are converted into corresponding voltages, the capacitor in the corresponding voltage converter is charged; after the first standard signal and the first feedback signal are converted into corresponding voltages, the voltage is compared in the comparator, so that the frequency relation between the standard signal and the feedback signal is accurately determined, and the whole standard signal or the feedback signal is not required to be utilized in the comparison process, so that the whole comparison process is simplified.
In the technical scheme provided by the embodiment of the application, if the current frequency band is far away from the target frequency band in the closed loop calibration process, the frequency band adjustment is not needed to be performed after the phase-locked loop is stabilized, and when the frequency jump is not detected, the calibration circuit adjusts the voltage of the calibration circuit to the reference voltage or the power supply voltage, so that the automatic frequency calibration control clock is greatly shortened, the time consumption of the frequency band calibration process is saved, and the frequency band calibration efficiency is improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a diagram of a prior art open loop calibration circuit.
Fig. 2 is a diagram of a prior art closed loop calibration circuit.
Fig. 3 is a schematic diagram of a calibration circuit according to an exemplary embodiment of the present application.
Fig. 4 is a schematic diagram of a detection circuit according to an exemplary embodiment of the present application.
Fig. 5 is a schematic diagram of the structures of the first voltage converter and the second voltage converter shown in an exemplary embodiment of the present application.
Fig. 6 is a schematic diagram of a calibration circuit according to an exemplary embodiment of the present application.
Fig. 7 is a flow chart illustrating frequency band calibration according to an exemplary embodiment of the present application.
Fig. 8 is a schematic diagram of the structure of UP and DN shown in an exemplary embodiment of the present application.
Detailed Description
The present application is described in further detail below with reference to the drawings and examples. It is specifically noted that the following examples are only for illustration of the present application, but do not limit the scope of the present application. Likewise, the following embodiments are only some, but not all, of the embodiments of the present application, and all other embodiments obtained by one of ordinary skill in the art without inventive effort are within the scope of the present application.
The terms first, second and the like in the description and in the claims of the present application and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented, for example, in sequences other than those illustrated or described herein. Furthermore, in the embodiments shown in the drawings, indications of direction (such as up, down, left, right, front and rear) are used to explain the structure and movement of the various elements of the present application are not absolute but relative. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the position of these elements changes, the indication of these directions changes accordingly. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Referring first to fig. 1, fig. 1 is a circuit diagram of a conventional open loop calibration. Wherein the input signal frequencies F are counted by counter (digital counter) respectively div And F ref If Counter A count is greater than Counter B, indicating output signal frequency F out If the frequency band value is too high, the frequency band value needs to be adjusted down; if the Counter A count value is less than Counter B, the output signal frequency F is indicated out Too low, the band value needs to be up-regulated; if the two count values are within a certain range, the frequency band is the target frequency band at the moment, and the frequency band calibration process is ended. The whole calibration process can not ensure that the PLL works in a working voltage range with excellent performance, and the performance and stability of the VCO are affected, so that V c May be near GND and VDD, thereby affecting the accuracy of the band adjustment.
In order to make the frequency band calibration process more accurate, the prior art generally adopts a closed Loop calibration circuit as shown in fig. 2 to perform frequency band adjustment on a multi-band PLL (Phase-Locked Loop) system, and fig. 2 is a prior closed Loop calibration circuit, and the PLL Loop is required to be Locked for V by a comparator c (voltage of calibration circuit, i.e. working voltage of loop filter output) and V high (upper limit voltage) and V low The magnitude of the voltage (lower limit voltage) is compared, and the frequency band is adjusted based on the comparison result. Wherein the method comprises the steps of，V high And V low Upper and lower limit values of VCO (Voltage-controlled oscillator), respectively, specifically, V of VCO in PLL loop under control of AFC (Automatic Frequency Calibration ) control clock c And V is equal to high And V low Comparing if V c Greater than V high AFC automatically switches to the higher frequency sub-band if V c Less than V low Then the AFC is automatically switched to the lower frequency sub-band and automatically switched according to the AFC control clock until V c Is positioned at V high And V low And (5) completing the adjustment of the frequency band. In the whole calibration process, voltage discrimination can be carried out only after loop locking, and generally, the loop locking time is longer, possibly at the level of 30us, if the VCO frequency band is more, the target frequency band cannot be determined at one time, and multiple times of calibration and locking operation are required, so that the whole calibration process consumes longer time, and the target frequency band cannot be determined quickly.
The method and the device improve the existing closed-loop calibration technology, and adjust the voltage of the calibration circuit to the reference voltage or the power supply voltage, so that an automatic frequency calibration control clock is greatly shortened, frequency band adjustment is completed rapidly, frequency band adjustment accuracy is guaranteed, and calibration time is saved. Referring specifically to fig. 3, fig. 3 is a schematic structural diagram of a calibration circuit according to an exemplary embodiment of the present application. The calibration circuit includes: the detection circuit, the control circuit, the first adjusting circuit and the second adjusting circuit are sequentially connected.
The detection circuit is used for generating a detection signal aiming at the frequency hopping condition based on the frequency magnitude relation between the input signals. That is, whether frequency hopping occurs is determined according to the frequency magnitude relation, and the input signal includes a first input signal and a second input signal, and the detection circuit detects the frequency magnitude of the first input signal and the second input signal, and if the frequency of the first input signal is greater than the frequency of the second input signal, a signal representing the frequency hopping is output; and outputting a signal representing that no frequency hopping occurs if the frequency of the first input signal is smaller than the frequency of the second input signal.
And the control circuit is used for generating a voltage adjustment signal and a frequency band adjustment signal if the received detection signal represents that frequency hopping does not occur. The control circuit may generate only the band adjustment signal and output it to the second adjustment circuit, which adjusts the band of the calibration circuit. It should be noted that the control circuit generates the voltage adjustment signal and generates the band adjustment signal at the same time, and outputs the voltage adjustment signal to the first adjustment circuit and the band adjustment signal to the second adjustment circuit, respectively.
The first adjusting circuit is used for adjusting the voltage of the calibration circuit to a reference voltage or a power supply voltage based on the voltage adjusting signal. For example, if no frequency jump is detected, the first adjusting circuit rapidly pulls up the voltage of the calibration circuit to VDD (power supply voltage) or to GND (reference voltage), thereby greatly shortening the AFC control clock.
And a second adjusting circuit for adjusting the frequency band of the calibration circuit based on the frequency band adjustment signal after the process of adjusting the voltage of the calibration circuit to the reference voltage or the power supply voltage. The second adjusting circuit may be a voltage-controlled oscillator as shown in fig. 1 or fig. 2, and the output signal may be input to a phase frequency detector or Counter a after being divided by a frequency divider.
Because the frequency band adjustment is not needed to be performed after the phase-locked loop is stabilized if the current frequency band is far away from the target frequency band in the closed loop calibration process, the calibration circuit in the embodiment adjusts the voltage of the calibration circuit to the reference voltage or the power supply voltage when no frequency jump is detected, thereby greatly shortening the automatic frequency calibration control clock, saving the time consumption of the frequency band calibration process and improving the frequency band calibration efficiency.
The conventional detection circuit is generally configured by Counter a and Counter B shown in fig. 1, and the two counters count the cycles of the input signals respectively in the same time to determine the frequency-magnitude relationship between the input signals, and the whole counting process needs to last for a certain period of time, so that the frequency-magnitude relationship between the input signals cannot be detected quickly.
In another exemplary embodiment, the detection circuit is configured to convert an input signal into input voltages, and detect a magnitude relation between the input voltages, and take the detected magnitude relation as a frequency magnitude relation; wherein the magnitude relation between the input voltages is inversely related to the frequency magnitude relation.
In this embodiment, the detection circuit detects the frequency relationship between the input signals relative to the existing counter, converts the input signals into the input voltages, and then detects the frequency relationship between the input signals by detecting the frequency relationship between the input voltages, so as to save time for detecting the frequency.
In another exemplary embodiment of the present application, the detection circuit is configured to convert an input signal into an input voltage, and detect a magnitude relation between the input voltages, and take the detected magnitude relation as a frequency magnitude relation. Specifically, the input signal includes a standard signal and a feedback signal; the detection circuit is used for converting the standard signal into a reference voltage corresponding to the standard signal, converting the feedback signal into a feedback voltage corresponding to the feedback signal, and taking the magnitude relation between the reference voltage and the feedback voltage as a frequency magnitude relation; the magnitude relation of the standard voltage and the feedback voltage is inversely related to the magnitude relation of the frequency.
In this embodiment, the detection circuit detects the frequency relationship between the feedback signal and the standard signal relative to the existing counter, converts the signals of the feedback signal and the standard signal into corresponding voltages, and then rapidly detects the frequency relationship between the two signals by detecting the magnitude relationship between the two voltages, so as to save time for detecting the frequency.
Referring to fig. 3, fig. 3 is a schematic diagram of a calibration circuit according to an exemplary embodiment of the present application. Wherein F is div Representing the frequency of the feedback signal, F ref Representing the frequency of the standard signal; v (V) div Representing the feedback voltage, V ref Representing a standard voltage; the initial value corresponding to the frequency band of the calibration circuit is a lower threshold. Wherein the frequency of the feedback signal and the feedback voltage are in negative correlation, and the frequency of the standard signal and the standard voltage are in negative correlationAnd (5) correlation.
The detection circuit is used for detecting V div Greater than V ref F is then div Less than F ref I.e. outputting a detection signal that characterizes the absence of frequency hopping. The control circuit is used for outputting a voltage adjusting signal to the first adjusting circuit and outputting a frequency band adjusting signal to the second adjusting circuit based on the detection signal representing that the frequency jump does not occur. Wherein the band adjustment signal is a signal indicating an up-regulated frequency band, i.e. increasing the frequency band value on the basis of a lower threshold.
If no frequency jump occurs, it indicates that the current frequency band is far away from the target frequency band, and only when the current frequency band approaches the target frequency band, the control circuit outputs a voltage adjustment signal to adjust the working voltage of the calibration circuit and outputs an adjustment signal to the second adjustment circuit to adjust the current frequency band when detecting that the frequency jump does not occur.
Further, in another exemplary embodiment, the calibration circuit further includes a voltage comparison circuit, an input terminal of the voltage comparison circuit is connected to the first adjustment circuit, and an output terminal of the voltage comparison circuit is connected to an input terminal of the control circuit. The working voltage output by the first adjusting circuit is the voltage input into the voltage comparing circuit, namely the voltage of the calibrating circuit.
The detection circuit is used for detecting that the feedback voltage is smaller than the standard voltage, F div Greater than F ref And outputting a detection signal representing the occurrence of the frequency hopping. The occurrence of frequency hopping indicates that the current frequency band is close to the target frequency band, and further fine adjustment of the frequency band is required.
The control circuit is used for outputting a control signal for the voltage comparison circuit based on the detection signal representing the occurrence of the frequency jump. The control signal is a signal for controlling the voltage comparator to start, namely, the voltage comparator compares the input voltage with the upper limit voltage and the lower limit voltage of the second regulating circuit.
The voltage comparison circuit is used for starting based on the control signal, comparing the working voltage output by the first adjusting circuit with the upper limit voltage and the lower limit voltage of the second adjusting circuit, and rapidly and accurately outputting a voltage comparison result signal to the control circuit. The voltage comparison result signal comprises a signal representing that the working voltage is smaller than the lower limit voltage, a signal representing that the working voltage is larger than the upper limit voltage and a signal representing that the working voltage is located between the lower limit voltage and the upper limit voltage.
The control circuit is used for generating a frequency band adjustment signal based on the voltage comparison result signal. Different voltage comparison result signals correspond to different frequency band adjustment signals, namely, the current frequency band is further correspondingly adjusted according to the magnitude relation between the working voltage and the upper limit voltage and the lower limit voltage.
The embodiment further illustrates that the voltage of the calibration circuit is the working voltage output by the first adjustment circuit, and the voltage comparator generates a corresponding voltage comparison result signal to the control circuit according to the magnitude relation between the working voltage and the upper limit voltage and the lower limit voltage, so that the control circuit generates a corresponding frequency band adjustment signal, and the second adjustment circuit can accurately adjust the current frequency band.
Further, in another exemplary embodiment, how to adjust the frequency band according to the voltage comparison result is described as follows:
the control circuit is used for outputting a frequency band adjusting signal for representing the lower limit threshold value of the down regulation to the second adjusting circuit if a voltage comparison result signal representing that the working voltage is smaller than the lower limit voltage is received.
The control circuit is used for outputting a frequency band adjusting signal used for representing the up-regulation lower limit threshold value to the second adjusting circuit if a voltage comparison result signal representing that the working voltage is larger than the upper limit voltage is received.
The control circuit is used for stopping outputting the frequency band adjusting signal if receiving a voltage comparison result signal representing that the working voltage is between the lower limit voltage and the upper limit voltage, and representing that the current frequency band is the target frequency band without adjustment.
The present embodiment detects the magnitude relation between the operating voltage and the upper and lower limit voltages through the voltage comparator to determine a specific band adjustment signal, thereby rapidly up-adjusting/down-adjusting/un-adjusting the band.
In another exemplary embodiment of the present application, the detection circuit includes a frequency divider, a voltage converter, and a comparator in series. The frequency divider is used for performing frequency division processing on the input signal to obtain a first input signal and a second input signal. The voltage converter is used for receiving the first input signal and the second input signal, converting the first input signal into an input voltage and inputting the input voltage to the comparator, and converting the second input signal into a voltage for charging a capacitor in the voltage converter. The comparator is used for detecting the magnitude relation between the input voltages and taking the magnitude relation between the input voltages as a frequency magnitude relation.
In some embodiments, the frequency divider includes a first frequency divider and a second frequency divider, and the voltage converter includes a first voltage converter and a second voltage converter, referring specifically to fig. 4, fig. 4 is a schematic structural diagram of a detection circuit according to an exemplary embodiment of the present application. The first frequency divider is connected in series with the first voltage converter, and the second frequency divider is connected in series with the second voltage converter; the input signal comprises a standard signal and a feedback signal, F div Representing the frequency of the feedback signal, F ref Representing the frequency of the standard signal.
The first frequency divider is used for carrying out frequency division processing on the standard signal to obtain a first standard signal and a second standard signal, and inputting the frequency-divided standard signal to the first voltage converter; the second frequency divider is used for performing frequency division processing on the feedback signal to obtain a first feedback signal and a second feedback signal, and inputting the frequency-divided feedback signal to the second voltage converter.
In some embodiments, the first frequency divider and the second frequency divider are both four frequency dividers, so that the signal can be subjected to four frequency division operation, a half period of the signal after four frequency division charges a capacitor in the converter, and the other half period is used for comparing the voltage represented by the first half period with the voltage represented by the second half period in the comparator, wherein the half period after frequency division represents two periods of the signal without frequency division. The adoption of the frequency division by four can avoid the problem that the duty ratio of an input signal is not 50 percent, and can avoid the problem of randomness of a single period, and in addition, the lower the frequency is, the smaller various challenges to a circuit are. With the improvement of the interface rate requirement, especially the interface technology above 16Gbps, the speed can be improved after the signal is subjected to the frequency division processing by four times, and the interface rate requirement is met.
Further, the structures of the first voltage converter and the second voltage converter are described in another exemplary embodiment, and referring specifically to fig. 5, fig. 5 is a schematic diagram of the structures of the first voltage converter and the second voltage converter according to an exemplary embodiment of the present application. After the signal is input into the frequency divider, the frequency divider performs frequency division processing on the input signal, and can convert part of frequency after frequency division into voltage and charge a capacitor in the voltage converter.
The first voltage converter is used for converting the first standard signal into a standard voltage and inputting the standard voltage to the comparator, and converting the second standard signal into a capacitor C used in the first voltage converter 1 A voltage of the charge; the second voltage converter is used for converting the first feedback signal into a feedback voltage and inputting the feedback voltage to the comparator, and converting the second feedback signal into a capacitor C used in the second voltage converter 2 A voltage of the charge.
In another exemplary embodiment of the present application, the detection circuit further includes a digital logic circuit, an input terminal of the digital logic circuit is connected to an output terminal of the comparator; the digital logic circuit converts the signals representing the frequency magnitude relation into level signals and outputs the level signals to the control circuit. The digital logic circuit comprises a trigger, a logic gate and the like, and after the digital logic circuit detects that the output result of the comparator is jumped, the digital logic circuit can output a digital signal of 0 or 1 to indicate whether the frequency is jumped or not so as to simplify the output signal.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a calibration circuit according to an exemplary embodiment of the present application. Wherein the detection circuit is a frequency detector; the first adjusting circuit comprises a switch S 1 ，S 2 And S is 3 Charge pump and loop filter; the second adjusting circuit is a voltage-controlled oscillator. Referring to fig. 7, fig. 7 is a schematic flow chart of band calibration according to an exemplary embodiment of the present application. Fig. 6 and 7 are combined to illustrate the entire calibration process:
initializing a frequency bandFor the lowest frequency band, i.e. the lower threshold, the control circuit initializes the control signal K to 0, switches S 1 And S is 2 Disconnection, S 3 Closing.
The structure of UP and DN is shown in fig. 8, and fig. 8 is a schematic diagram of the structure of UP and DN according to an exemplary embodiment of the present application. When UP and DN are 1, respectively, the respective switches are closed, the control signal N is initialized to 0, and then UP is set to 1 and DN is set to 0, that is, the current source of the PMOS tube of the charge pump is opened, the capacitor C (equivalent to the loop filter in fig. 6) is charged, the voltage of the capacitor C is rapidly increased, the voltage output by the loop filter is rapidly pulled UP from GND to VDD, and the frequency detector continuously detects whether frequency jump occurs.
If the frequency jump does not occur, the control circuit outputs a band adjustment signal representing that 1 unit band is up-regulated to the voltage-controlled oscillator so as to add 1 to the band. Meanwhile, the control signal N is turned over, namely UP is set to 0, DN is set to 1, namely a current source of an NMOS tube of the charge pump is turned on, a capacitor C is discharged, the voltage of the capacitor C is rapidly pulled down, so that the voltage output by the loop filter is rapidly pulled down to GND from VDD, and a frequency detector continuously detects whether frequency jump occurs or not.
If the frequency jump does not occur, the control circuit outputs a band adjustment signal representing that 1 unit band is up-regulated to the voltage-controlled oscillator so as to add 1 to the band. Meanwhile, the control signal N is turned over, namely UP is set to be 1, DN is set to be 0, so that the voltage output by the loop filter is quickly pulled UP to VDD from GND, and the loop filter is circulated in sequence until the frequency detector continuously detects the occurrence of frequency hopping. When the frequency hopping point is detected, the frequency band adjustment is directly performed for the new time according to the working voltage when the frequency hopping occurs, and the time for adjusting the frequency band for the new time can be additionally reduced.
If the occurrence of frequency hopping is detected, the control signal K is turned over to switch S 1 And S is 2 Closing, S 3 And (5) disconnecting. Meanwhile, comparing the magnitude of the input working voltage (namely the working voltage output by the loop filter) with the upper limit voltage and the lower limit voltage of the voltage-controlled oscillator through a voltage comparator, and if the working voltage is smaller than the lower limit voltage, regulating the frequency band by 1 unit; if the operating voltage is greater thanThe upper limit voltage is adjusted by 1 unit; if the working voltage is between the lower limit voltage and the upper limit voltage, the current frequency band is represented as a target frequency band, adjustment is not needed, and the whole calibration process is completed.
In this embodiment, when the current frequency band deviates from the target frequency band far, that is, when no frequency jump occurs, UP and DN are controlled by the control signal K, the working voltage is rapidly pulled UP to VDD or pulled down to GND, so as to greatly shorten the calibration time.
The foregoing is merely a preferred exemplary embodiment of the present application and is not intended to limit the embodiments of the present application, and those skilled in the art may make various changes and modifications according to the main concept and spirit of the present application, so that the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A calibration circuit, comprising:
the detection circuit, the control circuit, the first adjusting circuit and the second adjusting circuit are sequentially connected;
the detection circuit is used for generating a detection signal aiming at the frequency hopping condition based on the frequency magnitude relation between the input signals;
the control circuit is used for generating a voltage adjustment signal and a frequency band adjustment signal if the received detection signal represents that frequency hopping does not occur;
the first adjusting circuit is used for adjusting the voltage of the calibration circuit to a reference voltage or a power supply voltage based on the voltage adjusting signal;
the second adjusting circuit is used for adjusting the frequency band of the calibration circuit based on the frequency band adjusting signal after the process of adjusting the voltage of the calibration circuit to the reference voltage or the power supply voltage.
2. The calibration circuit of claim 1, wherein the detection circuit is configured to convert the input signal to an input voltage, and to detect a magnitude relation between the input voltages, and to take the detected magnitude relation as the frequency magnitude relation; wherein the magnitude relation between the input voltages is inversely related to the frequency magnitude relation.
3. The calibration circuit of claim 1, wherein the input signal comprises a standard signal and a feedback signal;
the detection circuit is used for converting the standard signal into a standard voltage corresponding to the standard signal, converting the feedback signal into a feedback voltage corresponding to the feedback signal, and taking the magnitude relation between the standard voltage and the feedback voltage as the frequency magnitude relation; and the magnitude relation of the standard voltage and the feedback voltage is inversely related to the frequency magnitude relation.
4. A calibration circuit according to claim 3, wherein the initial value corresponding to the frequency band of the calibration circuit is a lower threshold;
the detection circuit is used for outputting a detection signal representing that frequency hopping does not occur if the feedback voltage is detected to be larger than the standard voltage;
the control circuit is used for outputting the voltage adjusting signal to the first adjusting circuit and outputting the frequency band adjusting signal to the second adjusting circuit based on the detection signal representing that the frequency jump does not occur.
5. The calibration circuit of claim 4, further comprising a voltage comparison circuit having an input coupled to the first adjustment circuit and an output coupled to the input of the control circuit;
the detection circuit is used for outputting a detection signal representing the occurrence of frequency hopping if the feedback voltage is detected to be smaller than the standard voltage;
the control circuit is used for outputting a control signal aiming at the voltage comparison circuit based on the detection signal representing the occurrence of frequency hopping;
the voltage comparison circuit is used for starting based on the control signal, comparing the working voltage output by the first adjusting circuit with the upper limit voltage and the lower limit voltage of the second adjusting circuit, and outputting a voltage comparison result signal to the control circuit;
the control circuit is configured to generate the band adjustment signal based on the voltage comparison result signal.
6. The calibration circuit of claim 5, wherein the control circuit is configured to output a band adjustment signal to the second adjustment circuit that characterizes the downregulation of the lower threshold if a voltage comparison result signal is received that characterizes the operating voltage being less than the lower threshold voltage;
the control circuit is used for outputting a frequency band adjusting signal for representing up-adjusting the lower limit threshold value to the second adjusting circuit if a voltage comparison result signal representing that the working voltage is larger than the upper limit voltage is received;
the control circuit is used for stopping outputting the frequency band adjusting signal if a voltage comparison result signal representing that the working voltage is between the lower limit voltage and the upper limit voltage is received.
7. The calibration circuit of claim 1, wherein the detection circuit comprises a frequency divider, a voltage converter, and a comparator in series;
the frequency divider is used for performing frequency division processing on the input signal to obtain a first input signal and a second input signal;
the voltage converter is used for receiving the first input signal and the second input signal, converting the first input signal into an input voltage, inputting the input voltage to the comparator, and converting the second input signal into a voltage for charging a capacitor in the voltage converter;
the comparator is used for detecting the magnitude relation between the input voltages and taking the magnitude relation between the input voltages as the frequency magnitude relation.
8. The calibration circuit of claim 7, wherein the input signal comprises a standard signal and a feedback signal;
the frequency divider comprises a first frequency divider and a second frequency divider, and the voltage converter comprises a first voltage converter and a second voltage converter; wherein the first frequency divider is connected in series with the first voltage converter, and the second frequency divider is connected in series with the second voltage converter;
the first frequency divider is used for performing frequency division processing on the standard signal to obtain a first standard signal and a second standard signal, and inputting the frequency-divided standard signal to the first voltage converter;
the second frequency divider is used for performing frequency division processing on the feedback signal to obtain a first feedback signal and a second feedback signal, and inputting the frequency-divided feedback signal to the second voltage converter.
9. The calibration circuit of claim 7, wherein the detection circuit further comprises a digital logic circuit, an input of the digital logic circuit being connected to an output of the comparator;
the digital logic circuit converts the signals representing the frequency magnitude relation into level signals and outputs the level signals to the control circuit.
10. The calibration circuit of claim 9, wherein the first voltage converter is configured to convert the first reference signal to a reference voltage input to the comparator and to convert the second reference signal to a voltage for charging a capacitor in the first voltage converter;
the second voltage converter is used for converting the first feedback signal into a feedback voltage and inputting the feedback voltage to the comparator, and converting the second feedback signal into a voltage for charging a capacitor in the second voltage converter;
the comparator is used for detecting the magnitude relation between the standard voltage and the feedback voltage, taking the magnitude relation between the standard voltage and the feedback voltage as the frequency magnitude relation, and outputting the signal representing the frequency magnitude relation to the digital logic circuit.
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