CN116426993A - Electroplating method of circuit board through hole - Google Patents
Electroplating method of circuit board through hole Download PDFInfo
- Publication number
- CN116426993A CN116426993A CN202111651241.9A CN202111651241A CN116426993A CN 116426993 A CN116426993 A CN 116426993A CN 202111651241 A CN202111651241 A CN 202111651241A CN 116426993 A CN116426993 A CN 116426993A
- Authority
- CN
- China
- Prior art keywords
- circuit board
- copper plating
- hole
- brush wheel
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 28
- 238000009713 electroplating Methods 0.000 title claims abstract description 22
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 78
- 229910052802 copper Inorganic materials 0.000 claims abstract description 78
- 239000010949 copper Substances 0.000 claims abstract description 78
- 238000007747 plating Methods 0.000 claims abstract description 75
- 238000005553 drilling Methods 0.000 claims abstract description 13
- 239000004677 Nylon Substances 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 3
- 229910003460 diamond Inorganic materials 0.000 claims description 3
- 239000010432 diamond Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- 229920001778 nylon Polymers 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 claims description 2
- 239000004744 fabric Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 30
- 238000005498 polishing Methods 0.000 description 22
- 239000011148 porous material Substances 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005336 cracking Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000004745 nonwoven fabric Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000004804 winding Methods 0.000 description 2
- 238000013473 artificial intelligence Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
- C25D5/50—After-treatment of electroplated surfaces by heat-treatment
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
- C25D5/52—After-treatment of electroplated surfaces by brightening or burnishing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention discloses a circuit board through hole electroplating method, which comprises the following steps: a providing step, a drilling step and a copper plating step. In the providing step, a circuit board is provided. In the drilling step, the circuit board is drilled so as to be formed with a plurality of through holes corresponding to the circuit board. In the copper plating step, the circuit board is plated so that the inner walls of the plurality of through holes are each formed with a copper plating layer, and the current density at the time of the copper plating step is performed in inverse proportion to the thickness of the copper plating layer.
Description
Technical Field
The present invention relates to a plating method, and more particularly, to a plating method for a through hole of a circuit board.
Background
With the rapid development of artificial intelligence, image recognition and other technologies in recent years, the size of the printed circuit board needs to be further reduced under the development requirements of high density, multifunction and miniaturization, and the production difficulty and cost of the printed circuit board are certainly increased. Among them, the copper plating process of the through-hole is particularly prone to the problem of corner cracking. Therefore, how to overcome the above-mentioned drawbacks by improving the manufacturing process and structural design has become one of the important issues to be resolved by this industry.
Disclosure of Invention
The embodiment of the invention provides a circuit board through hole electroplating method aiming at the defects of the prior art, which can effectively improve the defects possibly generated by the prior circuit board through hole.
The embodiment of the invention discloses a circuit board through hole electroplating method, which comprises the following steps: providing: providing a circuit board; drilling: drilling the circuit board to form a plurality of through holes corresponding to the circuit board; and (3) copper plating: electroplating the circuit board to form copper plating layers on the inner walls of the through holes respectively; wherein the current density at which the copper plating step is performed is inversely proportional to the thickness of the copper plating layer.
The electroplating method of the circuit board through hole has the beneficial effects that the electroplating method of the circuit board through hole can be used for performing the copper plating step: electroplating the circuit board to form the copper plating layers on the inner walls of the through holes respectively; the technical scheme that the current density is inversely proportional to the thickness of the copper plating layer when the copper plating step is implemented is used for solving the problem of corner cracking of the through hole of the circuit board.
For a further understanding of the nature and the technical aspects of the present invention, reference should be made to the following detailed description of the invention and the accompanying drawings, which are provided for purposes of reference only and are not intended to limit the invention.
Drawings
FIG. 1 is a schematic flow chart of a method for electroplating a through hole of a circuit board according to an embodiment of the invention;
FIG. 2 is a graph showing experimental data of current density versus number of corner cracks during a copper plating step according to an embodiment of the present invention;
FIG. 3 is a diagram showing experimental data of hole density versus number of corner cracks of a circuit board according to an embodiment of the present invention;
FIG. 4 is a schematic diagram showing the operation of the polishing brush wheel for polishing a copper plating layer according to an embodiment of the present invention;
FIG. 5 is a schematic diagram showing another operation of the polishing brush wheel for polishing a copper plating layer according to an embodiment of the present invention.
Symbol description
S100 electroplating method of circuit board through hole
S101, providing step
S103 baking step
S105, drilling step
S107 copper plating step
S109 grinding step
100 circuit board
1 through hole
2 copper plating layer
200 grinding brush wheel
Detailed Description
The following specific examples are given to illustrate the embodiments of the present invention disclosed herein with respect to "plating method of circuit board via", and those skilled in the art will appreciate the advantages and effects of the present invention from the disclosure herein. The invention is capable of other and different embodiments and its several details are capable of modification and variation in various respects, all from the point of view and application, all without departing from the spirit of the present invention. The drawings of the present invention are merely schematic illustrations, and are not intended to be drawn to actual dimensions. In addition, the following description should be taken in conjunction with the accompanying drawings, as noted below, or as illustrated in the accompanying drawings, in order to emphasize the fact that the relevant content described in the following description is mostly present in the specific drawings, but not to limit the fact that the following description refers only to the specific drawings. The following embodiments will further illustrate the related art content of the present invention in detail, but the disclosure is not intended to limit the scope of the present invention.
It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms. These terms are used primarily to distinguish one element from another element or signal from another signal. In addition, the term "or" as used herein shall include any one or combination of more of the associated listed items as the case may be.
Referring to fig. 1 to 5, which are examples of the present invention, it should be noted that the drawings corresponding to the present invention and the related numbers and shapes thereof are only used for illustrating the embodiments of the present invention in detail, so as to facilitate understanding of the present invention, and not to limit the scope of the present invention.
As shown in fig. 1 and 5, an embodiment of the present invention provides a method S100 for electroplating a through hole of a circuit board, which sequentially includes: a providing step S101, a baking step S103, a drilling step S105, a copper plating step S107, and a polishing step S109, but the present invention is not limited thereto. For example, in other embodiments of the invention not shown, the plating method S100 of the circuit board through hole may not include the baking step S103 and the polishing step S109.
The providing step S101, the baking step S103, the drilling step S105, the copper plating step S107, and the polishing step S109 will be described in order for convenience of explanation and understanding. As shown in fig. 1, 4 and 5, in the providing step S101, a circuit board 100 is provided, and the circuit board 100 includes a circuit Layer (not shown), and the circuit board 100 is preferably a Multi-Layer PCB (Multi-Layer PCB) in the present embodiment, but the invention is not limited thereto. For example, in other embodiments of the present invention, the circuit board 100 may be a Single-sided circuit board (Single-Layer PCB) or a Double-sided circuit board (Double-Layer PCB).
Since the providing step S101 is not a major improvement of the present invention, the description is omitted here. The baking step S103 will be described below. As shown in fig. 1, in the baking step S103, the circuit board 100 is baked at a temperature of 120 to 130 ℃. Therefore, the residual stress of the circuit board 100 in the previous manufacturing process can be effectively eliminated, so that the yield of the circuit board 100 in the subsequent steps is improved.
The baking step S103 is described so far, and the drilling step S105 will be described below. As shown in fig. 1 to 5, in the drilling step S105, the circuit board 100 is drilled so as to form a plurality of through holes 1 (not shown) corresponding to the circuit board 100. Since the drilling step S105 is not a major improvement of the present invention, the description thereof is omitted.
The copper plating step S107 will be described below, and as shown in fig. 1 to 5, in the copper plating step S107, the circuit board 100 is subjected to electroplating so that the inner walls of the plurality of through holes 1 are respectively formed with a copper plating layer 2. Wherein the current density at the time of the copper plating step S107 is performed is inversely proportional to the thickness of the copper plating layer 2.
Further, after the copper plating layer 2 is plated on the plurality of through holes 1 of the circuit board 100, a series of other related manufacturing processes and Reflow (Reflow) are usually performed, and particularly, infrared Reflow is often used. However, the through holes 1 after the current electroplating are subjected to multiple infrared reflow, so that corner cracks are likely to occur at the corners of the through holes 1.
In contrast, when the copper plating step S107 is performed, if the current density at the time of performing the copper plating step S107 is reduced, for example, the current density at the time of performing the copper plating step S107 is limited to between 10ASF and 20ASF, the thickness of the copper plating layer 2 at the corners of the plurality of through holes 1 (hereinafter, simply referred to as corner copper thickness for convenience of description) increases, and thus the probability of occurrence of corner cracks at the corners is significantly reduced. Specifically, as shown in table 1 below and as shown in fig. 2, the experimental group with higher current density when the copper plating step S107 is performed typically has a relatively thick corner copper thickness under the condition that a plurality of the through holes 1 have the same pore diameter and the same pore density. For example, the corner copper thickness of experimental group 1.1 with a current density of 10.18 will be relatively thicker for experimental group 1.1 compared to experimental group 3.1.
The test groups shown in table 1 were each subjected to 10 tests, and the corner copper thicknesses of each group in table 1 were the average value of the corner copper thicknesses of each of the 10 tests. To avoid misunderstanding, this is described.
TABLE 1
It should be noted that the thickness of the copper plating layer 2 (corner copper thickness) may be adjusted by adjusting the hole density of the plurality of through holes 1. Wherein the thickness of the copper plating layer 2 is inversely proportional to the hole density of the plurality of through holes 1, and in the present embodiment, the hole density of the plurality of through holes 1 is between 70 pieces/cm 2 About 210/cm 2 Between them.
Specifically, as shown in table 1 above and in fig. 3, when the copper plating step S107 is performed, it can be found that the lower the hole density of the plurality of through holes 1, the greater the thickness of corner copper will be under the same conditions. For example, the lower the hole density of the plurality of said through holes 1, the corner copper thickness will be relatively larger compared to experimental groups 1.1 to 1.6.
It should be noted that the thickness of the copper plating layer 2 may be adjusted by adjusting the pore diameters of the plurality of through holes 1. Wherein the thickness of the copper plating layer 2 is inversely proportional to the pore diameters of the plurality of through holes 1. Specifically, as carried out in table 1 above, when the copper plating step S107 is carried out, it can be found that the smaller the aperture of the plurality of through holes 1, the greater the thickness of corner copper will be under the same conditions. For example, the corner copper thickness of experimental group 1.1, having a pore size of 7.9mil, was relatively greater for experimental group 1.1 compared to experimental group 2.1.
Although the thickness of the copper plating layer 2 at the corners of the plurality of through holes 1 has a tendency to be related to the current density at the time of the copper plating step S107, the pore diameter of the plurality of through holes 1, and the pore density of the plurality of through holes 1, the present invention is not limited thereto. Specifically, in the present embodiment, the opening size of each of the through holes 1 is at least 1 times as large as the total thickness of the copper plating layer 2 corresponding thereto, and the current density, the pore diameter of the plurality of through holes 1 and the pore density of the plurality of through holes 1 at the time of the copper plating step S107 are not increased or decreased without limitation, otherwise the openings of the plurality of through holes 1 are caused to be closed. In addition, the thickness of the copper plating layer 2 at the corners of the plurality of through holes 1 is also limited by the line width of the wiring layer, and further, the line width of the wiring layer is proportional to the thickness of the copper plating layer 2.
The copper plating step S107 is described so far, and the polishing step S109 will be described below. As shown in fig. 1, in the polishing step S109, a polishing brush wheel 200 polishes the copper plating layer 2 and cuts the copper plating layer 2 on the opening of each through hole 1, and in this embodiment, the polishing brush wheel 200 is preferably a winding type polishing brush wheel, and the material of the polishing brush wheel 200 is selected from the group consisting of nylon, ceramic, diamond, and non-woven fabric. Wherein, the polishing brush wheel 200 is not a bristle-planting polishing brush wheel.
Further, assuming that the polishing brush wheel 200 is a bristle-mounted polishing brush wheel, when the copper plating layer 2 is polished by the polishing brush wheel 200, since bristles (not shown) of the bristle-mounted polishing brush wheel are radial, the bristles are liable to be excessively scraped to corner edges of the opening of each through hole 1 due to excessively long bristles, resulting in cutting the opening of each through hole 1 in a large proportion.
When the grinding brush wheel 200 is a wound grinding brush wheel, since the wound grinding brush wheel is almost entirely in contact with the opening of each through hole 1 and has no bristles, the opening of each through hole 1 is not cut in a large proportion. In more detail, as shown in table 2 below, it can be observed that the average copper reduction of the wound grinding brush wheel for the copper plating layer 2 is significantly smaller than that of the brush wheel for the bristle-implanted copper plating layer 2 at the same corner copper thickness.
TABLE 2
Advantageous effects of the embodiment
The electroplating method S100 for the through hole of the circuit board provided by the invention has the beneficial effects that the electroplating method S100 can be used for performing the copper plating step S107: electroplating the circuit board 100 to form the copper plating layers 2 on the inner walls of the through holes 1; the current density of the copper plating step S107 is inversely proportional to the thickness of the copper plating layer 2, so as to solve the problem of corner cracking of the through hole 1 of the circuit board 100.
Furthermore, the electroplating method S100 of the through hole of the circuit board can reduce the average copper reduction of the copper plating layer 2 by the technical means that the polishing brush wheel 200 is a winding type polishing brush wheel, and the material of the polishing brush wheel 200 is selected from the group consisting of nylon, ceramic, diamond and non-woven fabric, thereby reducing the probability of corner cracks at the corners of a plurality of through holes 1.
The foregoing disclosure is only illustrative of the preferred embodiments of the present invention and is not to be construed as limiting the scope of the appended claims, and all changes that come within the meaning and range of equivalency of the description and drawings are therefore intended to be embraced therein.
Claims (10)
1. A method of electroplating a circuit board via, comprising:
providing: providing a circuit board;
drilling: drilling the circuit board to form a plurality of through holes corresponding to the circuit board; and
copper plating: electroplating the circuit board to form copper plating layers on the inner walls of the through holes respectively; wherein the current density at which the copper plating step is performed is inversely proportional to the thickness of the copper plating layer.
2. The method for plating a through hole of a circuit board according to claim 1, further comprising a baking step of: baking the circuit board at 120-130 ℃; wherein the baking step is performed before the drilling step.
3. The method of electroplating a circuit board via of claim 1, further comprising the step of grinding: and grinding the copper plating layer by a grinding brush wheel, and cutting the copper plating layer on the opening of each through hole.
4. The method for plating a through hole of a circuit board according to claim 3, wherein the grinding brush wheel is a wound grinding brush wheel, and the material of the grinding brush wheel is selected from the group consisting of nylon, ceramic, diamond, and non-woven cloth.
5. The method for plating a through hole of a circuit board according to claim 3, wherein the grinding brush wheel is not a brush wheel for brush-hair-planting.
6. The plating method of a circuit board via hole according to claim 1, wherein the thickness of the copper plating layer is inversely proportional to the hole density of the plurality of the via holes.
7. The plating method of circuit board vias as claimed in claim 6, wherein a hole density of a plurality of said vias is between 70/cm 2 About 210/cm 2 Between them.
8. The method of electroplating a circuit board via of claim 1, wherein the copper plating step is performed at a current density between 10ASF and 20 ASF.
9. The plating method of circuit board vias of claim 1, wherein the opening size of each of said vias is at least 1 times the total thickness of its corresponding copper plated layer.
10. The plating method of a circuit board via hole of claim 1, wherein the circuit board comprises a wiring layer, and a line width of the wiring layer is proportional to a thickness of the copper plating layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111651241.9A CN116426993A (en) | 2021-12-30 | 2021-12-30 | Electroplating method of circuit board through hole |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111651241.9A CN116426993A (en) | 2021-12-30 | 2021-12-30 | Electroplating method of circuit board through hole |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116426993A true CN116426993A (en) | 2023-07-14 |
Family
ID=87085996
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111651241.9A Pending CN116426993A (en) | 2021-12-30 | 2021-12-30 | Electroplating method of circuit board through hole |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116426993A (en) |
-
2021
- 2021-12-30 CN CN202111651241.9A patent/CN116426993A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102034357B1 (en) | Wiring component | |
| WO2017071393A1 (en) | Printed circuit board and fabrication method therefor | |
| EP2413674B1 (en) | Method of manufacturing a printed circuit board | |
| WO2019216012A1 (en) | Printed wiring board and method for manufacturing printed wiring board | |
| KR20130117292A (en) | Laminated ceramic electronic parts and manufacturing method thereof | |
| US20200107456A1 (en) | Circuit board structure | |
| KR102028259B1 (en) | Method for manufacturing planar coil | |
| CN109587968A (en) | One kind preventing consent or the undesirable PCB production method of plated hole | |
| US6254715B1 (en) | Process for production of electronic component having terminal electrode | |
| CN116426993A (en) | Electroplating method of circuit board through hole | |
| CN111343800B (en) | Processing technology for local electroplating of blind buried hole | |
| TWI804174B (en) | Electroplating method of through holes of circuit board | |
| WO2016133090A1 (en) | Chip electronic component and module | |
| CN116546736A (en) | PCB (printed circuit board) manufacturing method containing two surface treatments and PCB | |
| CN104105354A (en) | Method of manufacturing high-aperture ratio fine printed circuit board | |
| US20190254176A1 (en) | Implementing customized pcb via creation through use of magnetic pads | |
| CN116546750A (en) | Automatic copper drawing method for PCB | |
| CN110785012A (en) | Drilling and positioning manufacturing method for ultra-long multilayer board | |
| CN113194635B (en) | Impedance line manufacturing method, impedance line and circuit board | |
| KR20140015870A (en) | Process for preparing a flexible metal-clad film by double side sputter metalizing method | |
| KR20140072409A (en) | Method for processing a flexible cupper clad laminated film | |
| CN114173492B (en) | Through blind hole design method for detecting hole filling capability of circuit board | |
| JP2008106291A (en) | Plated substrate | |
| CN111531412A (en) | Polishing process of N-Si substrate | |
| JP2007317782A (en) | Flexible wiring board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |