CN116406457A

CN116406457A - Switching envelope tracking

Info

Publication number: CN116406457A
Application number: CN202080107096.5A
Authority: CN
Inventors: 耿继风
Original assignee: Zheku Technology Co ltd
Current assignee: Zeku Technology Shanghai Corp Ltd
Priority date: 2020-11-20
Filing date: 2020-11-20
Publication date: 2023-07-07
Also published as: WO2021042088A3; WO2021042088A2

Abstract

Embodiments of a circuit, apparatus, and method for switching envelope tracking are disclosed. In one example, a method for switching envelope tracking may include receiving an input signal representative of an intended transmission. The input signal may comprise symbols. The method may further include receiving information about the symbol separately from receiving the input signal. The method may further include selecting a processing path from at least two processing paths based on the information about the symbol. The method may further include processing the input signal based on the selected processing path to provide a control signal. The method may further comprise providing the control signal and the modified version of the input signal in parallel to the power amplifier.

Description

Switching envelope tracking

Background

Embodiments of the present disclosure relate to an apparatus and method for switching envelope tracking.

Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcast. In cellular communications, such as fourth generation (4 th-generation, 4G) long term evolution (long term evolution, LTE) and fifth generation (5 th-generation, 5G) New Radio (NR), the third generation partnership project (3rd generation partnership project,3GPP) defines a protocol stack comprising a set of layers collectively referred to as layer 2: in the stack, from high to low is a packet data convergence protocol (packet data convergence protocol, PDCP) layer, a radio link control (radio link control, RLC) layer, and medium access control (medium access control, MAC). These layers are located above a physical layer (PHY) in a stack. PHY is also referred to as layer 1. The data to be transmitted may be generated by an application on top of the protocol stack, passed down through a layer 2 process to a layer 1 process, and finally transmitted through one or more antennas.

Disclosure of Invention

Embodiments of an apparatus and method for switching envelope tracking are disclosed herein.

In one example, a method for switching envelope tracking may include receiving an input signal representative of an intended transmission. The input signal may comprise symbols. The method may further include receiving information about the symbol separately from receiving the input signal. The method may further include selecting a processing path from at least two processing paths based on the information about the symbol. The method may further include processing the input signal based on the selected processing path to provide a control signal. The method may further comprise providing the control signal and the modified version of the input signal in parallel to the power amplifier.

In another example, an apparatus for switching envelope tracking may include an envelope generator to receive an input signal representative of an intended transmission. The input signal may comprise symbols. The apparatus may further include a controller to receive information about the symbol. The information about the symbol may be received separately from the input signal. The controller may also be configured to select a processing path from at least two processing paths based on the information about the symbol. The input signal may be processed based on the selected processing path to provide a control signal. The controller may also be used to provide the control signal and the modified version of the input signal in parallel to the power amplifier.

In another example, an RF chip may include a power amplifier and an envelope generator to receive an input signal representative of an intended transmission to be amplified in the power amplifier. The input signal may comprise symbols. The RF chip may further include a controller for receiving information about the symbol. The information about the symbol may be received separately from the input signal. The controller may also be configured to select a processing path from at least two processing paths based on the information about the symbol. The input signal may be processed based on the selected processing path to provide a control signal. The controller may also be used to provide a control signal to the power amplifier. The RF may also include a digital-to-analog converter for converting the input signal from digital form to analog form and providing the analog form of the input signal to the power amplifier.

Drawings

The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the disclosure and to enable a person skilled in the pertinent art to make and use the disclosure.

Fig. 1A shows a constant level power tracker.

Fig. 1B shows a fast or real-time envelope tracker.

Fig. 1C shows a multi-level envelope tracker.

Fig. 2 illustrates a control scheme for switching envelope tracking in accordance with certain embodiments of the present disclosure.

Fig. 3 illustrates a system for switching envelope tracking in accordance with certain embodiments.

Fig. 4 illustrates a comparison of various tracking methods according to some embodiments of the present disclosure.

Fig. 5 illustrates a switching envelope tracking method according to some embodiments of the present disclosure.

Fig. 6 illustrates an example node in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure.

Fig. 7 illustrates a block diagram of an apparatus including a baseband chip, an RF chip, and a host chip, according to some embodiments of the disclosure.

Fig. 8 illustrates an example wireless network in which some aspects of the present disclosure may be implemented, in accordance with certain embodiments of the present disclosure.

Embodiments of the present disclosure will be described with reference to the accompanying drawings.

Detailed Description

Although specific configurations and arrangements are discussed, it should be understood that this is for illustrative purposes only. One skilled in the relevant art will recognize that other configurations and arrangements may be used without departing from the spirit and scope of the disclosure. It will be apparent to those skilled in the relevant art that the present disclosure may also be used in a variety of other applications.

Note that reference in the specification to "one embodiment," "an embodiment," "example embodiment," "some embodiments," "certain embodiments," etc., means that the described embodiment may include a particular feature, structure, or characteristic, but every embodiment does not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the relevant art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

Generally, the terms may be understood, at least in part, from the usage in the context. For example, the term "one or more" as used herein may be used to describe any feature, structure, or characteristic in the singular or may be used to describe a combination of features, structures, or characteristics in the plural, depending at least in part on the context. Similarly, terms such as "a," "an," or "the" may be construed to convey a singular usage or a plural usage, depending at least in part on the context. Furthermore, the term "based on" may be understood as not necessarily intended to convey a set of exclusive factors, but rather may allow for the presence of other factors not necessarily explicitly described, again depending at least in part on the context.

Various aspects of a wireless communication system will now be described with reference to various apparatus and methods. These apparatus and methods are described in the following detailed description and are illustrated in the accompanying drawings in the form of various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as "elements"). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system.

The techniques described herein may be used for various wireless communication networks such as code division multiple access (code division multiple access, CDMA) systems, time division multiple access (time division multiple access, TDMA) systems, frequency division multiple access (frequency division multiple access, FDMA) systems, orthogonal frequency division multiple access (orthogonal frequency division multiple access, OFDMA) systems, single-carrier frequency division multiple access (SC-carrier frequency division multiple access, FDMA) systems, and other networks. The terms "network" and "system" are often used interchangeably. The CDMA network may implement radio access technologies (radio access technology, RAT) such as universal terrestrial radio access (universal terrestrial radio access, UTRA), evolved UTRA (E-UTRA), CDMA 2000, and the like. TDMA networks may implement RATs, such as GSM. The OFDMA network may implement a RAT, such as LTE or NR. The techniques described herein may be used for the wireless networks and RATs described above as well as other wireless networks and RATs.

For example, orthogonal frequency division multiplexing (orthogonal frequency division multiplexing, OFDM) is used in OFDMA communication systems including 5G NR to provide efficient modulation for wireless communications. In an OFDM transmitter, the set of bits to be transmitted are converted into complex symbols and converted into a time domain waveform using, for example, an inverse fast fourier transform (inverse fast Fourier transform, IFFT). The generated digital waveform may be converted to analog form, amplified, and transmitted wirelessly to a receiver.

Fig. 1A shows a constant level power tracker. In this approach, a digital front-end circuit (DFEC) 110 may include a crest factor reduction (crest factor reduction, CFR) circuit 120. The CFR circuit 120 may be used to reduce a peak-to-average-power-ratio (PAPR) of a signal to be transmitted. PAPR reduction may make the operation of the power amplifier more efficient.

The pre-DPD gain (preddgain) amplifier 130 may amplify the signal before providing the signal to a digital pre-distorter (DPD) 140. Predistortion is a class of techniques that may be used to improve the linearity of wireless transmitter amplifiers, such as power amplifiers. If the amplifier is non-linear, an inaccurate representation of the input signal may be generated at the output. To address this nonlinearity, the predistorter may compensate for the nonlinearity such that the input of the predistorter is accurately represented by the output of the power amplifier. Distortion in a power amplifier may have a number of factors including, but not limited to, the amount of power used by the amplifier, with higher power levels generally resulting in greater distortion.

Meanwhile, a digital predistortion version of the signal may be provided to a pre-digital-to-analog-conversion gain (PreDACGain) amplifier 150 to amplify the signal. A real-to-analog (IQ) digital-to-analog converter (DAC) 160 may convert the signal to an analog signal and provide an analog version of the signal to a Power Amplifier (PA) 170. The IQ DAC 160 may be included in a Radio Frequency (RF) -Transmit (TX) chip 180.

The bias voltage Vcc of the power amplifier 170 may be provided by a switching power supply (switched mode power supply, SMPS 192. The SMPS 192 may be a conventional SMPS or alternatively a multi-level ET tracker. The conventional SMPS may switch levels relatively slowly while the multi-level ET tracker may provide all levels at the same time so that a relatively fast switching may be made in an average power tracking (average power tracking, APT) mode.

The method of fig. 1A does not rely on envelope tracking (envelope tracking, ET). Envelope tracking is a power tracking technique that improves the efficiency of a power amplifier. The signal to be amplified by the power amplifier may be a complex waveform with a large amount of bandwidth and variability. Proper envelope tracking may allow the power amplifier to operate efficiently and properly.

The envelope tracker may be designed to immediately track the signal envelope and provide sufficient current for the envelope tracking power amplifier. Typically, the envelope bandwidth is 3 times the signal bandwidth. For fifth generation (5G) wireless communications, in order to support signals with bandwidths up to 100MHz, envelope trackers typically track single-sided signals up to 150 MHz. This bandwidth causes various considerations in the design of the envelope tracker. These considerations may include trading efficiency for speed.

Fig. 1B shows a fast or real-time envelope tracker. This is interchangeably referred to herein as "fast" or "real-time" because the envelope signal (sometimes simply referred to as the envelope) may be the absolute value of the original signal and thus may follow the original signal accurately and instantaneously. This may be in contrast to "slow" or "filtered" envelope signals (these terms are also used interchangeably herein), which, while based on and forming the envelope of the original signal, may not vary precisely and instantaneously with the original signal. These may be in contrast to multi-level envelopes, which although not necessarily filtered, may only track the original signal periodically. As described below, filtering may also be applied to multi-level envelopes, which may produce slow or filtered envelope signals.

As shown in fig. 1B, DFEC 110 may include CFR circuit 120, as shown in fig. 1A. The pre-dpdgain amplifier 130 may amplify the signal before providing the signal to the DPD 140. ET path element 194 may read the signal before or after digital predistortion, or alternatively before and after digital predistortion. The ET path element 194 may provide a fast or real-time tracked version of the signal to an envelope DAC (ENV DAC) 165. The analog output of ENV DAC165 may be provided to continuous envelope tracker 196. In turn, the continuous envelope tracker 196 may provide a higher amperage version of the analog version of the fast tracking or real-time envelope tracking to the power amplifier 170.

Meanwhile, as also shown in fig. 1B, a digitally pre-distorted version of the signal may be provided to the predacain amplifier 150 to amplify the signal. IQ DAC 160 may convert the signal to an analog signal and provide an analog version of the signal to power amplifier 170. Both the IQ DAC 160 and ENV DAC165 may be included in the RF-TX chip 180. The output of the power amplifier may ultimately be one or more antennas 199.

Fig. 1C shows a multi-level envelope tracker. As shown in fig. 1C, DFEC 110 may include CFR circuit 120 that provides a crest factor reduction signal to predvain amplifier 130. The output of the PreDPDgain amplifier 130 may be provided to a multi-level generator 197 and DPD 140, and the DPD 140 may be a two-dimensional (2D) DPD. The multi-level generator 197 may provide a signal to the multi-level envelope tracker 193 and the filtered envelope generator 198. The filter envelope generator 198 may provide a signal to the DPD 140. Otherwise, the multi-level envelope tracker 193 may be similar to the fast or real-time envelope tracker described above with reference to fig. 1B.

Certain embodiments of the present disclosure may take advantage of certain advantages. Fig. 2 illustrates a control scheme in accordance with certain embodiments of the present disclosure. As shown in fig. 2, the system may make power level determinations at 210 on a symbol-by-symbol basis for each symbol. The power level determination may be determining an average power of the symbols. The system may compare the power level to a threshold. If the power level is below the threshold, the system may perform constant level power tracking on the symbol. Thus, the power amplifier may receive a single power level value from the SMPS or similar device.

If it is determined at 210 that the power level is above the threshold, the system may further determine the signal quality at 220. If the signal quality of the symbol needs to be above a certain threshold level, constant level power tracking may be used at 230. On the other hand, if the signal quality of the symbol can be below a given threshold, then at 240 the system can apply multi-level envelope tracking.

Thus, at higher power levels, where signal quality requirements are lower, such as quadrature phase shift keying (quaternary phase shift keying, QPSK), 16-point quadrature amplitude modulation (16point quadrature amplitude modulation,16QAM), or 64QAM, the system may select multiple levels ET for optimum efficiency. On the other hand, when the power level is higher but the signal quality requirement is higher, such as 256QAM or 1024QAM, the system can choose constant level power tracking to improve the signal quality at the cost of reduced efficiency. At low power levels, the system can simply always use constant level power tracking, regardless of signal quality requirements, which can provide simplicity and high signal quality.

Average power tracking may still be applied, so in some embodiments, the input Vcc of the power amplifier may still change, but only at the symbol level. Since the multi-level ET tracker can generate various constant levels, switching between multi-level ET and constant level power tracking can be performed simply and quickly.

Fig. 3 illustrates a system according to some embodiments. Fig. 3 is a simplified block diagram. Thus, for example, although digital-to-analog conversion may be performed as shown in the previous example, the digital-to-analog conversion element is not shown in this figure.

As shown in fig. 3, an input signal x (t) may be provided to DPD 140 and multi-level generator 197. The multi-level generator 197 may be used to generate the step signal described above with or without further filtering or smoothing described above. The multi-level generator 197 may provide its output to the controller 310 or other element for selecting between envelope and constant control. The controller 310 may also receive information about a given symbol, for example, from a higher layer of a protocol stack (not shown). The information may include information such as a required or desired signal quality level of the symbol and/or an average power level of the symbol. A symbol is used as an example of any data unit that can be processed by the system as a group. Thus, for example, the evaluation or decision may be made at a different granularity than a single symbol. For example, the symbol constellation may be considered together, or another unit may be considered, such as a transport block or a protocol data unit. The signal quality level may be indicated in terms of quality of service (quality of service, qoS), target signal-to-noise ratio (signal to noise ratio, SNR), or any other desired signal quality metric. The signal quality level may also be indicated more indirectly, for example by indicating that the symbol corresponds to a control or data packet. Thus, for example, in some embodiments, control packets may require higher signal quality, while data packets may tolerate lower signal quality. Thus, the controller 310 can infer the signal quality level from whether the symbol corresponds to control or data.

Fig. 4 shows a comparison of various tracking methods. As shown in fig. 4, the fast or real-time tracking signal 410 may correspond to an absolute value of the input signal. The horizontal axis may represent time and the vertical axis may represent voltage with voltage zero and any starting time as the lower left corner of the graph in fig. 4. The multi-level tracking signal 420 may periodically round the value up to the next half-volt level. As shown in this example, the filtered tracking signal 430 may be a low pass filtered version of the multi-level tracking signal 420. In contrast to these methods, the constant power level tracking method can simply apply a uniform power level to the entire symbol. The uniform power level may correspond to any of the illustrated horizontal lines representing various voltage levels, or may correspond to a higher value than illustrated. There may be various tradeoffs. For example, constant power level tracking methods may reduce switching noise of a device, while other methods may provide higher power efficiency.

Fig. 5 illustrates a method according to some embodiments. As shown in fig. 5, a method may include, at 510, receiving an input signal representative of an intended transmission, wherein the input signal includes symbols. The input signal may correspond to x (t) in fig. 3.

As also shown in fig. 5, the method may further include receiving information about the symbol separately from receiving the input signal at 520. Thus, the reception at 510 may be accomplished by a different device within the RF chip 704 shown in FIG. 7, for example. In other words, as shown in fig. 3, x (t) may be received at the multi-level generator 197 and the symbol information may be received at the controller 310, and both the multi-level generator 197 and the controller 310 may be part of the digital front end of the RF chip.

As shown in fig. 5, the method may further include selecting a processing path from at least two processing paths based on the information about the symbol, at 530. This selection may be made once for each symbol or other transmission unit. This selection may be performed using the logic shown in fig. 2.

As further shown in fig. 5, the method may include processing the input signal based on the selected processing path to provide a control signal at 540. The control signal may be a single voltage level or a signal corresponding to, for example, the envelope of the input signal. Several examples of the latter are shown in fig. 4.

As shown in fig. 5, the method may further include providing the control signal and the modified version of the input signal to the power amplifier in parallel at 550. The modified form of the input may be, for example, a predistorted analog version of the input signal, which may be a digital signal.

The information about the symbol may be a signal quality level of the symbol, power level information of the signal, or other information about the symbol, such as whether the symbol corresponds to control plane or user plane information.

The selection at 530 may include comparing the signal quality level to a threshold signal quality level, as shown at 220 in fig. 2. More specifically, the selecting at 530 may include selecting a constant level power tracking for the symbol when the signal quality level is above a threshold and/or selecting a multi-level envelope tracking for the symbol when the signal quality level is below a threshold. The threshold value may be arbitrarily set such that the value is always above or below the threshold value. Alternatively, "above the threshold" may mean "equal to or above the threshold," or, alternatively, "below the threshold" may mean "equal to or below the threshold. Thus, the threshold itself may be considered to match the "above" or "below" path shown in fig. 2.

As described above, the information about the symbol may include power level information of the symbol. The power level information may include an average power of the symbol. Other power level information may be used, such as maximum power, minimum power, etc. The power level information may be indicated explicitly or implicitly.

The selecting at 530 may include selecting a constant level power track for the symbol when the power level indicated in the power level information is below a threshold and/or performing a further determination when the power level indicated in the power level information is above a threshold, as shown at 210 in fig. 2. Further determination may be as shown at 220 in fig. 2, to determine whether the signal quality level of the symbol is above or below a threshold. The selecting may then further comprise selecting a constant level power track for the symbol when the signal quality level is above a threshold and/or selecting a multi-level envelope track for the symbol when the signal quality level is below the threshold. Thus, the selection at 220 may be performed alone or as a subsequent step to the power level determination at 210.

Fig. 6 illustrates a node in accordance with certain embodiments. As shown in fig. 6, node 600 may include a processor 602, a memory 604, and a transceiver 606. These components are shown as being connected to each other by a bus 608, but other connection types are also permitted. When the node 600 is a user device 802 (see FIG. 8, described below), other components may also be included, such as User Interfaces (UIs), sensors, and the like. Similarly, when node 600 is configured as core network element 806 (see fig. 8, described below), node 600 may be implemented as a blade (blade) in a server system. Other embodiments are also possible.

Transceiver 606 may include any suitable device for transmitting and/or receiving data. Transceiver 606 may include the circuitry shown in fig. 2 and may implement the method of fig. 6. Although only one transceiver 606 is shown for simplicity of illustration, node 600 may include one or more transceivers. Antenna 610 is shown as a possible communication mechanism for node 600. Multiple antennas and/or antenna arrays may be utilized. Further, examples of node 600 may communicate using wired technology instead of or in addition to wireless technology. For example, the access node 804 may communicate wirelessly with the user equipment 802 and may communicate with the core network element 806 via a wired connection (e.g., via fiber optic cable or coaxial cable). Other communication hardware such as network interface cards (network interface card, NIC) may also be included.

As shown in fig. 6, node 600 may include a processor 602. Although only one processor is shown, it should be understood that multiple processors may be included. The processor 602 may include a microprocessor, microcontroller, digital signal processor (digital signal processor, DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), programmable logic device (programmable logic device, PLD), state machine, gate logic, discrete hardware circuits, and other suitable hardware for performing the various functions described herein. The processor 602 may be a hardware device having one or more processing cores. The processor 602 may execute software. Whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise, should be broadly interpreted as instructions, instruction sets, code segments, program code, programs, subroutines, software modules, applications, software packages, routines, subroutines, objects, executable files, threads of execution, procedures, functions, and the like. The software may include computer instructions written in an interpreted language, compiled language, or machine code. Other techniques for indicating hardware may also fall into the broad category of software. The processor 602 may be a baseband chip, such as baseband chip 702 in fig. 7. Node 600 may also include other processors not shown, such as a central processing unit of a device, a graphics processor, etc. The processor 602 may include internal memory (also referred to as local memory, not shown in fig. 6) that may be used as memory for L2 data. The processor 602 may include, for example, an RF chip integrated in a baseband chip, or the RF chip may be provided separately. Processor 602 may function as a modem for node 600 or may be an element or component of a modem. Other arrangements and configurations are also permissible.

As shown in fig. 6, node 600 may also include memory 604. Although only one memory is shown, it should be understood that multiple memories may be included. Memory 604 may broadly include both memory and storage. For example, the memory 604 may include random-access memory (RAM), read-only memory (ROM), SRAM, dynamic RAM (DRAM), ferroelectric RAM (FRAM), electrically erasable programmable ROM (electrically erasable programmable ROM, EEPROM), CD-ROM, or other optical disk storage, a Hard Disk Drive (HDD), such as a magnetic disk storage or other magnetic storage device, a flash drive, a solid-state drive (SSD), or any other medium that may be used to carry or store desired program code in the form of instructions that may be accessed and executed by the processor 602. In general, the memory 604 may be implemented as any computer-readable medium, such as a non-transitory computer-readable medium. The memory 604 may be the external memory 708 in fig. 7. Memory 604 may be shared by processor 602 and other components of node 600, such as a graphics processor or central processing unit, not shown.

Fig. 7 illustrates a block diagram of an apparatus 700 including a baseband chip 702, an RF chip 704, and a host chip 706, according to some embodiments of the disclosure. The apparatus 700 may be an example of any suitable node of the wireless network 800 of fig. 8, such as the user equipment 802 or the access node 804.

As shown in fig. 7, apparatus 700 may include a baseband chip 702, an RF chip 704, a host chip 706, and one or more antennas 710. In some embodiments, baseband chip 702 is implemented by processor 602 and memory 604, and RF chip 704 is implemented by processor 602, memory 604, and transceiver 606, as described above with respect to fig. 6. In addition to on-chip memory (also referred to as "internal memory" or "local memory," e.g., registers, buffers, or caches) on each

chip

702, 704, or 706, apparatus 700 may also include external memory 708 (e.g., system memory or main memory) that may be shared by each

chip

702, 704, or 706 over the system/main bus. Although baseband chip 702 is shown in fig. 7 as a stand-alone SoC, it is to be understood that in one example, baseband chip 702 and radio frequency chip 704 may be integrated as one SoC; in another example, baseband chip 702 and host chip 706 may be integrated into one SoC; in another example, baseband chip 702, RF chip 704, and host chip 706 may be integrated into one SoC, as described above. Thus, for example, the circuitry shown in fig. 3 may be implemented on the RF chip 704 and the baseband chip 702, or on a single chip. Other embodiments are also possible.

RF chip 704 alone or in combination with baseband chip 702 may implement the method shown in fig. 5 and may implement the logic shown in fig. 2. Thus, for example, input signals and symbol information (or input signals or symbol information) may be provided from baseband chip 702 to RF chip 704. Other implementations are possible, as are non-limiting examples.

For transmission (sometimes also referred to as uplink), host chip 706 may generate and send raw data to baseband chip 702 for encoding, modulation, and mapping. The baseband chip 702 may also access raw data generated by the host chip 706 and stored in the external memory 708, for example, using direct memory access (direct memory access, DMA). Baseband chip 702 may first encode the raw data (e.g., by source encoding and/or channel encoding) and modulate the encoded data using any suitable modulation technique, such as multi-phase pre-shared key (MPSK) modulation or quadrature amplitude modulation (quadrature amplitude modulation, QAM). Baseband chip 702 may perform any other function, such as symbol or layer mapping, to convert raw data into a signal that may be used to modulate a carrier frequency for transmission. In the uplink, baseband chip 702 may transmit a modulated signal to RF chip 704. The RF chip 704 may convert the modulated signal in digital form to an analog signal, i.e., a radio frequency signal, via a transmitter (Tx), and perform any suitable front-end radio frequency function, such as filtering, up-conversion, or sample rate conversion. The antenna 710 (e.g., an antenna array) may transmit radio frequency signals provided by a transmitter of the RF chip 704.

In the downlink, an antenna 710 may receive radio frequency signals and communicate the radio frequency signals to a receiver (Rx) of the RF chip 704. RF chip 704 may perform any suitable front-end radio frequency functions, such as filtering, down-conversion, or sample rate conversion, and convert radio frequency signals to low frequency digital signals (baseband signals) that may be processed by baseband chip 702. In the downlink, baseband chip 702 may demodulate and decode baseband signals to extract the raw data that may be processed by host chip 706. Baseband chip 702 may perform other functions such as error checking, demapping, channel estimation, descrambling, and the like. The raw data provided by baseband chip 702 may be sent directly to host chip 706 or stored in external memory 708.

Fig. 8 illustrates a wireless network in accordance with certain embodiments. As shown in fig. 8, a wireless network 800 may include a network of nodes, such as a UE 802, an access node 804, and a core network element 806. The user device 802 may be any terminal device, such as a mobile phone, desktop computer, laptop computer, tablet computer, vehicle computer, gaming machine, printer, location device, wearable electronic device, smart sensor, or any other device capable of receiving, processing, sending information, such as a internet of vehicles (vehicle to everything, V2X) network, any member of a cluster network, smart grid node, or internet of things (IoT) node. It should be understood that user device 802 is shown as a mobile telephone by way of illustration only and not limitation.

The access Node 804 may be a device in communication with the user equipment 802, such as a wireless access point, a Base Station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation Node B (gnob or gNB), a cluster master Node, etc. The access node 804 may be wired to the user equipment 802, wireless to the user equipment 802, or any combination thereof. The access node 804 may be connected to the user equipment 802 through a plurality of connections, and the user equipment 802 may also be connected to other access nodes than the access node 804. The access node 804 may also be connected to other UEs. It is to be appreciated that access node 804 is shown by way of illustration and not limitation as a radio tower.

The core network element 806 may serve the access node 804 and the user equipment 802 to provide core network services. Examples of core network elements 806 may include a home subscriber server (home subscriber server, HSS), a mobility management entity (mobility management entity, MME), a Serving Gateway (SGW), or a packet data network gateway (packet data network gateway, PGW). These are examples of core network elements of an evolved packet core (evolved packet core, EPC) system, which is the core network of an LTE system. Other core network elements may be used in LTE and other communication systems. In some embodiments, the core network element 806 includes an access and mobility management function (access and mobility management function, AMF) device, a session management function (session management function, SMF) device, or a user plane function (user plane function, UPF) device of the core network of the NR system. It should be appreciated that core network element 806 is shown by way of illustration and not limitation as a set of rack-mounted servers.

The core network element 806 may be connected to a large network, such as the internet 808 or another IP network, to communicate packet data at any distance. Thus, data from the user device 802 may be transferred to other UEs connected to other access points (including, for example, a computer 810 connected to the internet 808) using, for example, a wired or wireless connection, or to a tablet 812 wirelessly connected to the internet 808 via a router 814. Thus, computer 810 and tablet 812 provide other examples of possible UEs, and router 814 provides an example of another possible access node.

A general example of a rack server is provided as an illustration of a core network element 806. However, there may be multiple network elements in the core network, including database servers, such as database 816, and security and authentication servers, such as authentication server 818. For example, database 816 may manage data related to users subscribing to network services. The home location register (home location register, HLR) is an example of a standardized database of subscriber information for cellular networks. Likewise, authentication server 818 can handle authentication of users, sessions, and the like. In an NR system, an authentication server function (authentication server function, AUSF) device may be a specific entity performing user equipment authentication. In some embodiments, a single server chassis may handle multiple such functions, such that the connections between core network element 806, authentication server 818, and database 816 may be local connections within the single chassis.

Although the above description uses uplink processing of signals in the UE as an example in various discussions, similar techniques may be used for other processing directions and processing in other devices such as access nodes and core network nodes as well. For example, any device that transmits signals using a power amplifier may benefit some embodiments of the present disclosure even if not specifically listed above or shown in the example network of fig. 8.

Each network element of fig. 8 may be considered a node of wireless network 800. Further details regarding possible implementations of the node are provided by way of example in the description of node 600 in fig. 6 above. The node 600 may be configured as a user equipment 802, an access node 804, or a core network element 806 in fig. 8. Similarly, node 600 may also be configured as a computer 810, router 814, tablet 812, database 816, or authentication server 818 in fig. 8.

In various aspects of the disclosure, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium. Computer readable media includes computer storage media. A storage medium may be any available medium that can be accessed by a computing device, such as node 600 in fig. 6. Such computer-readable media may include, for example, but is not limited to, RAM, ROM, EEPROM, CD-ROM, or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, flash drives, SSDs, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system (e.g., a mobile device or computer). Disk and disc, as used herein, includes CD, laser disc, optical disc, DVD and floppy disk wherein the disk typically reproduces data magnetically and the disc reproduces data optically by laser. Combinations of the above should also be included within the scope of computer-readable media.

In accordance with an aspect of the disclosure, a method for switching envelope tracking may include receiving an input signal representative of an intended transmission. The input signal may comprise symbols. The method may further include receiving information about the symbol separately from receiving the input signal. The method may further include selecting a processing path from at least two processing paths based on the information about the symbol. The method may further include processing the input signal based on the selected processing path to provide a control signal. The method may further comprise providing the control signal and the modified version of the input signal in parallel to the power amplifier.

In some embodiments, the information about the symbol may include a signal quality level of the symbol.

In some embodiments, the selecting may include comparing the signal quality level to a threshold value of the signal quality level.

In some embodiments, the selecting may include selecting a constant level power tracking for the symbol when the signal quality level is above a threshold.

In some embodiments, the selecting may include selecting a multi-level envelope tracking for the symbol when the signal quality level is below a threshold.

In some embodiments, the information about the symbol may include power level information of the symbol.

In some embodiments, the power level information may include an average power of the symbol.

In some embodiments, the selecting may include selecting a constant level power track for the symbol when the power level indicated in the power level information is below a power level threshold.

In some embodiments, the selecting may include performing a further determination when the power level indicated in the power level information is above a threshold of the power level.

In some embodiments, the above further determination may include determining whether the signal quality level of the symbol is above or below a threshold value of the signal quality level.

In accordance with another aspect of the present disclosure, an apparatus for switching envelope tracking may include an envelope generator (e.g., multi-level generator 197 shown in fig. 3) for receiving an input signal representative of an intended transmission. The input signal may comprise symbols. The apparatus may also include a controller (e.g., controller 310 in fig. 3) for receiving information about the symbol. The information about the symbol may be received separately from the input signal. The controller may also be configured to select a processing path from at least two processing paths based on the information about the symbol. The input signal may be processed based on the selected processing path to provide a control signal. The controller may also be used to provide the control signal and the modified version of the input signal in parallel to the power amplifier.

In some embodiments, the controller may be configured to select the processing path based on a comparison of the signal quality level to a threshold signal quality level.

In some embodiments, the controller may be configured to select a constant level power tracking for the symbol when the signal quality level is above a threshold.

In some embodiments, the controller may be configured to select a multi-level envelope tracking for the symbol when the signal quality level is below a threshold.

In some embodiments, the controller may be configured to select a constant level power track for the symbol when the power level indicated in the power level information is below a threshold of the power level.

In some embodiments, the controller may be configured to perform a further determination when the power level indicated in the power level information is above a threshold of the power level.

According to another aspect of the disclosure, an RF chip may include a power amplifier and an envelope generator for receiving an input signal representative of an intended transmission to be amplified in the power amplifier. The input signal may comprise symbols. The RF chip may further include a controller for receiving information about the symbol. The information about the symbol may be received separately from the input signal. The controller may also be configured to select a processing path from at least two processing paths based on the information about the symbol. The input signal may be processed based on the selected processing path to provide a control signal. The controller may also be used to provide a control signal to the power amplifier. The RF may also include a digital-to-analog converter for converting the input signal from digital to analog and providing the analog form of the input signal to the power amplifier.

The foregoing description of the specific embodiments will so reveal the general nature of the disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such specific embodiments without undue experimentation, without departing from the general concept of the present disclosure. Accordingly, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

The embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specific functions and relationships thereof. For ease of description, the boundaries of these functional building blocks are arbitrarily defined herein. Alternate boundaries may be defined so long as the specified functions and relationships thereof are appropriately performed.

The summary and abstract sections may set forth one or more, but not all exemplary embodiments of the disclosure as contemplated by the inventors, and are therefore not intended to limit the disclosure and appended claims in any way.

Various functional blocks, modules, and steps have been described above. The particular arrangements provided are illustrative and not limiting. Accordingly, the functional blocks, modules, and steps may be reordered or combined in a different manner than the examples provided above. Also, certain embodiments include only a subset of the functional blocks, modules, and steps and allow for any such subset.

The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. A method for switching envelope tracking, the method comprising:

receiving an input signal representing an intended transmission, wherein the input signal comprises symbols;

receiving information about the symbol separately from receiving the input signal;

selecting a processing path from at least two processing paths based on the information about the symbol;

processing the input signal based on the selected processing path to provide a control signal; and

the control signal and the modified version of the input signal are provided in parallel to a power amplifier.

2. The method of claim 1, wherein the information about the symbol comprises a signal quality level of the symbol.

3. The method of claim 2, wherein the selecting comprises comparing the signal quality level to a threshold value of the signal quality level.

4. A method according to claim 3, wherein the selecting comprises selecting a constant level power track for the symbol when the signal quality level is above the threshold.

5. A method according to claim 3, wherein the selecting comprises selecting multi-level envelope tracking for the symbol when the signal quality level is below the threshold.

6. The method of claim 1, wherein the information about the symbol comprises power level information of the symbol.

7. The method of claim 6, wherein the power level information comprises an average power of the symbols.

8. The method of claim 6, wherein the selecting comprises selecting a constant level power tracking for the symbol when a power level indicated in the power level information is below a threshold of the power level.

9. The method of claim 6, wherein the selecting comprises performing a further determination when a power level indicated in the power level information is above a threshold of the power level.

10. The method of claim 9, wherein the further determining comprises determining whether a signal quality level of the symbol is above or below a threshold of the signal quality level.

11. The method of claim 10, wherein the selecting comprises selecting a constant level power tracking for the symbol when the signal quality level is above the threshold.

12. The method of claim 10, wherein the selecting comprises selecting multi-level envelope tracking for the symbol when the signal quality level is below the threshold.

13. An apparatus for switching envelope tracking, the apparatus comprising:

an envelope generator for receiving an input signal representing an intended transmission, wherein the input signal comprises symbols; and

a controller for receiving information about the symbol, wherein the information about the symbol is received separately from the input signal,

wherein the controller is further configured to select a processing path from at least two processing paths based on the information about the symbol, wherein the input signal is processed based on the selected processing path to provide a control signal, and

Wherein the controller is further configured to provide the control signal and the modified version of the input signal in parallel to the power amplifier.

14. The apparatus of claim 13, wherein the information about the symbol comprises a signal quality level of the symbol.

15. The apparatus of claim 14, wherein the controller is configured to select the processing path based on a comparison of the signal quality level to a threshold value of the signal quality level.

16. The apparatus of claim 15, wherein the controller is configured to select a constant level power tracking for the symbol when the signal quality level is above the threshold.

17. The apparatus of claim 15, wherein the controller is configured to select multi-level envelope tracking for the symbol when the signal quality level is below the threshold.

18. The apparatus of claim 13, wherein the information about the symbol comprises power level information of the symbol.

19. The apparatus of claim 18, wherein the controller is configured to select a constant level power tracking for the symbol when a power level indicated in the power level information is below a threshold of the power level.

20. The apparatus of claim 18, wherein the controller is configured to perform further determination when a power level indicated in the power level information is above a threshold of the power level.

21. A Radio Frequency (RF) chip comprising:

a power amplifier;

an envelope generator for receiving an input signal representing an intended transmission to be amplified in the power amplifier, wherein the input signal comprises symbols;

a controller for receiving information about the symbol, wherein the information about the symbol is received separately from the input signal, wherein the controller is further for selecting a processing path from at least two processing paths based on the information about the symbol, wherein the input signal is processed based on the selected processing path to provide a control signal, and wherein the controller is further for providing the control signal to the power amplifier; and

a digital-to-analog converter for converting the input signal from a digital form to an analog form and providing the analog form of the input signal to the power amplifier.