CN116406165A - Antiferroelectric memory and preparation method thereof - Google Patents
Antiferroelectric memory and preparation method thereof Download PDFInfo
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- CN116406165A CN116406165A CN202310358538.9A CN202310358538A CN116406165A CN 116406165 A CN116406165 A CN 116406165A CN 202310358538 A CN202310358538 A CN 202310358538A CN 116406165 A CN116406165 A CN 116406165A
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- 230000015654 memory Effects 0.000 title claims abstract description 22
- 238000002360 preparation method Methods 0.000 title claims abstract description 8
- 239000003990 capacitor Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 claims abstract description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052735 hafnium Inorganic materials 0.000 claims abstract description 8
- 229910052726 zirconium Inorganic materials 0.000 claims abstract description 8
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims abstract description 7
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims abstract description 7
- 230000008569 process Effects 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 238000004151 rapid thermal annealing Methods 0.000 claims abstract description 6
- 239000012298 atmosphere Substances 0.000 claims abstract description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 6
- 238000000231 atomic layer deposition Methods 0.000 claims description 5
- 238000005229 chemical vapour deposition Methods 0.000 claims description 2
- 238000005566 electron beam evaporation Methods 0.000 claims description 2
- 238000001659 ion-beam spectroscopy Methods 0.000 claims description 2
- 238000004549 pulsed laser deposition Methods 0.000 claims description 2
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 230000005684 electric field Effects 0.000 abstract description 23
- 230000010287 polarization Effects 0.000 abstract description 21
- 230000033228 biological regulation Effects 0.000 abstract description 5
- 229920006395 saturated elastomer Polymers 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000000137 annealing Methods 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 230000001276 controlling effect Effects 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000006104 solid solution Substances 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- FIWXUAGPOBLSIJ-UHFFFAOYSA-N [Hf].[Zr].[O] Chemical compound [Hf].[Zr].[O] FIWXUAGPOBLSIJ-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000005620 antiferroelectricity Effects 0.000 description 1
- WUKWITHWXAAZEY-UHFFFAOYSA-L calcium difluoride Chemical group [F-].[F-].[Ca+2] WUKWITHWXAAZEY-UHFFFAOYSA-L 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000005621 ferroelectricity Effects 0.000 description 1
- INIGCWGJTZDVRY-UHFFFAOYSA-N hafnium zirconium Chemical compound [Zr].[Hf] INIGCWGJTZDVRY-UHFFFAOYSA-N 0.000 description 1
- KQHQLIAOAVMAOW-UHFFFAOYSA-N hafnium(4+) oxygen(2-) zirconium(4+) Chemical compound [O--].[O--].[O--].[O--].[Zr+4].[Hf+4] KQHQLIAOAVMAOW-UHFFFAOYSA-N 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention relates to an antiferroelectric memory and a preparation method thereof. A method of fabricating an antiferroelectric memory comprising an antiferroelectric capacitor, the method of fabricating the antiferroelectric capacitor comprising: providing a substrate; sequentially depositing a bottom electrode, an antiferroelectric layer and a top electrode on the substrate; then carrying out rapid thermal annealing treatment at 400-600 ℃, wherein the treatment atmosphere is preferably nitrogen; wherein the antiferroelectric layer adopts HZO with the thickness of 6-10 nm, and the molar ratio of hafnium Hf to zirconium Zr in the antiferroelectric layer is 2:8-3:7. The invention realizes the regulation and control of the corresponding voltage (electric field) when the polar phase of the antiferroelectric device changes to the nonpolar phase by controlling a plurality of conditions in the process, and simultaneously obviously increases the saturation polarization intensity of the antiferroelectric device.
Description
Technical Field
The invention relates to the field of memories, in particular to an antiferroelectric memory and a preparation method thereof.
Background
The HZO material with a fluorite structure is a novel antiferroelectric material, has strong ferroelectricity or antiferroelectricity under the ultra-thin thickness of several nanometers to tens of nanometers by adjusting the ratio of Hf and Zr, and can be applied to advanced process nodes; the semiconductor device has excellent CMOS process compatibility, does not contain Pb and other elements, has small pollution to the environment, and has very wide application scenes.
Typically, antiferroelectric devices based on hafnium zirconium oxide solid solutions are mainly made of pure zirconia materials, but in this case, the polarization state of the antiferroelectric device needs a large applied electric field to be maintained, and the saturated polarization intensity is small. In the prior art, it is difficult to reduce the voltage at the time of converting the antiferroelectric polar phase into the nonpolar phase (so that the polarization state of the antiferroelectric device can be maintained under a smaller external electric field), and also to reduce the voltage at the time of converting the antiferroelectric polar phase into the nonpolar phase to 0, which greatly limits the application range of the antiferroelectric device based on the hafnium-zirconium-oxygen solid solution.
For this purpose, the present invention is proposed.
Disclosure of Invention
The invention mainly aims to provide an antiferroelectric memory and a preparation method thereof, which realize the regulation and control of voltage during the transition from polar phase to nonpolar phase of an antiferroelectric device through controlling a plurality of conditions in a process and remarkably increase the saturation polarization intensity of the antiferroelectric device.
In order to achieve the above object, the present invention provides the following technical solutions.
A first aspect of the invention provides a method of manufacturing an antiferroelectric memory device, comprising an antiferroelectric capacitor,
the preparation method of the antiferroelectric capacitor comprises the following steps:
providing a substrate;
sequentially depositing a bottom electrode, an antiferroelectric layer and a top electrode on the substrate;
then carrying out rapid thermal annealing treatment at 400-600 ℃, wherein the treatment atmosphere is preferably nitrogen;
wherein the antiferroelectric layer adopts HZO with the thickness of 6-10 nm, and the molar ratio of hafnium Hf to zirconium Zr in the antiferroelectric layer is 2:8-3:7. According to the invention, the quantity of the polar O phase in the system is greatly increased by regulating and controlling a plurality of comprehensive conditions such as the molar ratio of hafnium Hf to zirconium Zr, the thickness of the antiferroelectric layer, the annealing temperature and the like, so that the built-in electric field of O to T is increased, the regulation and control of the voltage of the antiferroelectric from the polar phase to the nonpolar phase are realized, and the voltage of the antiferroelectric device from the polar phase to the nonpolar phase is obviously reduced.
In addition, the invention also obviously increases the saturation polarization intensity of the antiferroelectric device, even the saturation polarization intensity of the preferred scheme exceeds 32uC/cm 2 。
The invention can jointly realize the reduction of the voltage (electric field) and the increase of the saturated polarization intensity when the polar phase is converted into the nonpolar phase, and the intensity of the corresponding electric field is basically reduced to 0 when the polar phase is converted into the nonpolar phase, and the saturated polarization intensity is very high.
Wherein the thickness of the antiferroelectric layer can be any thickness in the range of 6 to 10nm, preferably 8nm. The molar ratio of hafnium Hf to zirconium Zr in the antiferroelectric layer is suitably controlled within the range of 2:8 to 3:7, and any value within this range may be taken, including but not limited to 2:8, 2.3:8, 2.5:8, 3:8, 3:7, etc., preferably 3:7. The annealing temperature may optionally be in the range of 400-600 ℃, including but not limited to 400 ℃, 420 ℃, 450 ℃, 470 ℃, 500 ℃, 520 ℃, 550 ℃, 570 ℃,600 ℃, and the like.
The materials and thicknesses of the layers in the antiferroelectric capacitor can be further optimized on the basis of the above, as listed below.
Further, the bottom electrode is made of titanium nitride.
Further, the top electrode is made of titanium nitride.
Further, the thickness of the bottom electrode is 20-100 nm.
Further, the thickness of the top electrode is 20-100 nm.
A second aspect of the invention provides an antiferroelectric memory obtained by the above method.
In conclusion, compared with the prior art, the invention achieves the following technical effects:
(1) The invention reduces the corresponding voltage (electric field) when the polar phase of the antiferroelectric device changes to the nonpolar phase.
(2) The saturation polarization of the antiferroelectric device is significantly increased.
(3) The voltage (electric field) and saturation polarization increase upon decreasing the polarity-to-nonpolar phase transition are collectively achieved.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention.
FIG. 1 is a schematic diagram of a portion of an antiferroelectric capacitor in an antiferroelectric memory according to an embodiment of the present invention;
FIG. 2 is a diagram showing the voltage (electric field) regulation of the antiferroelectric memory in the embodiment of the present invention when the antiferroelectric polar phase changes to the nonpolar phase by adjusting the ratio of Hf to Zr in the HZO layer under the condition of other experiments, wherein the abscissa corresponding to 6 circles in the diagram is the electric field strength (voltage) corresponding to the occurrence of the phase change macroscopically;
fig. 3 is a graph showing the increase of saturated polarization intensity of an antiferroelectric device by adjusting the ratio of Hf to Zr in an HZO layer and keeping other experimental conditions unchanged, wherein three curves are typical polarization intensity-external electric field curves.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is only exemplary and is not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the concepts of the present disclosure.
Various structural schematic diagrams according to embodiments of the present disclosure are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated for clarity of presentation and may have been omitted. The shapes of the various regions, layers and relative sizes, positional relationships between them shown in the drawings are merely exemplary, may in practice deviate due to manufacturing tolerances or technical limitations, and one skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present therebetween. In addition, if one layer/element is located "on" another layer/element in one orientation, that layer/element may be located "under" the other layer/element when the orientation is turned.
The invention increases the built-in electric field of ferroelectric O relative to antiferroelectric T phase by adjusting the thickness of antiferroelectric layer, zirconium-hafnium ratio, annealing temperature and other process and material conditions, thereby regulating and controlling the voltage (electric field) when the antiferroelectric polar phase changes to the nonpolar phase, and realizing the reduction of the corresponding voltage (electric field) when the antiferroelectric device changes to the nonpolar phase. Meanwhile, the invention obviously increases the saturation polarization intensity of the antiferroelectric device, and can jointly realize the reduction of voltage (electric field) and the increase of the saturation polarization intensity when the polar phase changes to the nonpolar phase.
In particular, the antiferroelectric memory provided by the invention comprises antiferroelectric capacitors and other necessary structures (field effect transistors and the like). The antiferroelectric capacitor comprises a bottom electrode, an antiferroelectric layer and a top electrode which are sequentially stacked, wherein the antiferroelectric layer adopts HZO, the thickness is 6-10 nm, and the molar ratio of hafnium Hf to zirconium Zr is controlled within the range of 2:8-3:7.
The antiferroelectric capacitor is prepared by adopting a specific annealing treatment method, which comprises the following steps: providing a substrate; sequentially depositing a bottom electrode, an antiferroelectric layer and a top electrode on the substrate; then carrying out rapid thermal annealing treatment at 400-600 ℃, wherein the treatment atmosphere is preferably nitrogen.
The bottom electrode and the top electrode in the antiferroelectric capacitor can be W, ti, ta, ru, pd, tiN, taN, irO 2 And the like, tiN is preferable. The thickness of the two can be adjusted according to the device requirement, and any thickness in the range of 20-100 nm, such as 40nm, is preferably adopted.
The thickness of the antiferroelectric layer in the antiferroelectric capacitor is preferably 6 to 10nm, more preferably 8nm. The memory having the above features has the following common features.
(1) The amount of the polar O phase in the system is increased, so that the built-in electric field of the ferroelectric O relative to the antiferroelectric T phase is increased, the regulation and control of the electric field when the antiferroelectric is converted from the polar phase to the nonpolar phase are realized, and the voltage (electric field) when the polar phase of the antiferroelectric device is converted to the nonpolar phase is reduced. In particular device No. 3, the strength of the electric field drops substantially to 0 when the phase change occurs.
(2) The saturation polarization of the antiferroelectric device, especially the device No. 3, is obviously increased, and the saturation polarization exceeds 32uC/cm 2 。
The invention can jointly realize the reduction of the voltage (electric field) and the increase of the saturated polarization intensity when the polar phase is converted into the nonpolar phase, and the intensity of the electric field is basically reduced to 0 when the polar phase is converted into the nonpolar phase, and the saturated polarization intensity is very high.
The substrate of the present invention may be any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as silicon-on-insulator (SOI), bulk silicon (bulk silicon), germanium, silicon germanium, gallium arsenide, or germanium on insulator; or a semiconductor substrate on which other structures (e.g., field effect transistors, etc.) have been formed.
The deposition of the layers may be performed by means typical in the art, for example, by forming the bottom and top electrodes by one of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, ion beam sputtering, atomic layer deposition, sputtering, and depositing the antiferroelectric layer by ALD.
The invention also provides the following examples.
Example 1
An antiferroelectric capacitor structure in an antiferroelectric memory is shown in FIG. 1 and is formed by the following process.
A layer of 40nm titanium nitride was sputtered by PVD ion beam on the substrate as bottom electrode 1.
Then, an HZO antiferroelectric layer 2 was deposited by ALD method, wherein the molar ratio of Hf to Zr was controlled at 3:7, and the film thickness was 8nm.
Next the PVD ion beam sputters TiN 40nm as top electrode 3.
Thereafter, a 40nm Pt layer 4 was deposited by PVD method as a masking layer to pattern the TiN top electrode.
Final Rapid Thermal Annealing (RTA), N 2 Atmosphere, 600 ℃.
Comparative example 1
The only difference from example 1 is that the molar ratio of Hf to Zr in the antiferroelectric layer is 0:10.
Comparative example 2
The only difference from example 1 is that the molar ratio of Hf to Zr in the antiferroelectric layer is 1:9.
As shown in FIGS. 2 and 3, the CV and PV diagrams of the memories obtained in the above examples and comparative examples clearly observe the decrease in voltage (electric field) and increase in saturation polarization at the time of switching from antiferroelectric polar to nonpolar in the device of the present invention, the decrease in voltage (electric field) at the time of switching from antiferroelectric polar to nonpolar in example 1 was nearly 0 and the saturation polarization exceeded 32uC/cm 2 。
The embodiments of the present disclosure are described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be made by those skilled in the art without departing from the scope of the disclosure, and such alternatives and modifications are intended to fall within the scope of the disclosure.
Claims (9)
1. The preparation method of the antiferroelectric memory is characterized by comprising antiferroelectric capacitors, and the preparation method of the antiferroelectric capacitors comprises the following steps:
providing a substrate;
sequentially depositing a bottom electrode, an antiferroelectric layer and a top electrode on the substrate;
then carrying out rapid thermal annealing treatment at 400-600 ℃, wherein the treatment atmosphere is preferably nitrogen;
wherein the antiferroelectric layer adopts HZO with the thickness of 6-10 nm, and the molar ratio of hafnium Hf to zirconium Zr in the antiferroelectric layer is 2:8-3:7.
2. The method of manufacturing an antiferroelectric memory according to claim 1, wherein the bottom electrode is W, ti, ta, ru, pd, tiN, taN, irO 2 One or more of the following.
3. The method of manufacturing an antiferroelectric memory according to claim 2, wherein the top electrode is W, ti, ta, ru, pd, tiN, taN, irO 2 One or more of the following.
4. A method of fabricating an antiferroelectric memory according to claim 3 wherein the bottom electrode has a thickness of 20 to 100nm.
5. A method of fabricating an antiferroelectric memory according to claim 3 wherein the top electrode has a thickness of 20 to 100nm.
6. The method of claim 1, wherein the bottom electrode and the top electrode are formed by one of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, ion beam sputtering, atomic layer deposition, and sputtering.
7. The method of fabricating an antiferroelectric memory according to claim 1 wherein the antiferroelectric layer is deposited by an ALD process.
8. The method of manufacturing an antiferroelectric memory device according to claim 1, wherein the molar ratio of hafnium Hf to zirconium Zr in the antiferroelectric layer is 3:7.
9. An antiferroelectric memory prepared by the process for preparing an antiferroelectric memory of any one of claims 1 to 8.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310358538.9A CN116406165A (en) | 2023-04-06 | 2023-04-06 | Antiferroelectric memory and preparation method thereof |
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| CN202310358538.9A CN116406165A (en) | 2023-04-06 | 2023-04-06 | Antiferroelectric memory and preparation method thereof |
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| CN116406165A true CN116406165A (en) | 2023-07-07 |
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