CN116383091B - Starting method and starting device of eMMC verification platform and storage medium - Google Patents
Starting method and starting device of eMMC verification platform and storage medium Download PDFInfo
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Abstract
The application discloses a starting method, a starting device and a storage medium of an eMMC verification platform, wherein the starting method comprises the steps of entering a miniaturized kernel operation stage after a preset boot loader is loaded when a system starting instruction of an upper computer is received; generating an interrupt at the running stage of the miniaturized kernel, suspending the boot loader and generating an instruction input window; receiving a test instruction sent by an upper computer through an instruction input window; and calling a test case according to the test instruction to test and verify the eMMC chip. According to the embodiment of the application, the starting flow of the system of the eMMC verification platform is regulated, the system of the eMMC verification platform is interrupted in the running stage of the miniaturized kernel in the starting process, and a user can input a test instruction through the upper computer, so that the eMMC chip is verified and tested in the environment without entering the system, and the problem that the system of the eMMC verification platform is directly started and cannot be tested for eliminating the system environment is solved.
Description
Technical Field
The present application relates to the field of memory chips, and in particular, to a method and apparatus for starting an eMMC verification platform, and a storage medium.
Background
eMMC (Embedded Multi Media Card) is an embedded memory standard specification defined by the MMC society and mainly aimed at products such as mobile phones and tablet computers. Memory chips of eMMC specifications are widely used in the field of semiconductor memory, and memory chips of eMMC specifications can be generally used as eMMC chips.
In the development and production process of the eMMC chip, the eMMC chip needs to be verified to determine data such as read-write performance and communication performance. The current eMMC verification platform is quite partially based on an MTK platform architecture, the MTK platform is started by a boot loader (BootLoader) boot system, and after entering the system, a tester can verify the eMMC chip through corresponding test instructions. However, after the system is started, the eMMC can only perform testing in the environment based on the system, and some relatively underlying test instructions or test environments that need to exclude the influence of the system cannot be realized.
Disclosure of Invention
The embodiment of the application provides a starting method, a starting device and a storage medium of an eMMC verification platform, which can realize the test verification of eMMC in the miniaturized kernel operation stage.
In a first aspect, an embodiment of the present application provides a method for starting an eMMC verification platform, where the eMMC verification platform is used as a host to connect an eMMC chip for verification, and the eMMC verification platform is further connected to an upper computer to receive a test instruction of the upper computer and issue and execute the test instruction;
the starting method comprises the following steps:
when a system starting instruction of the upper computer is received, loading a preset boot loader program and entering a miniaturized kernel operation stage;
generating an interrupt at the running stage of the miniaturized kernel, suspending the boot loader and generating an instruction input window;
displaying the instruction input window through the upper computer, and receiving a test instruction sent by the upper computer through the instruction input window;
and calling a test case according to the test instruction to test and verify the eMMC chip.
In some embodiments, the loading the preset boot loader and entering the mini-kernel operation stage includes:
loading boot code from a boot memory and loading a preloaded program according to the boot code;
initializing a first temporary storage space of the eMMC verification platform according to a preloaded program;
and loading the miniaturized kernel into a miniaturized kernel running stage under the condition that the preloaded program is loaded into the first temporary storage space.
In some embodiments, the generating an interrupt at the miniaturized kernel runtime phase, suspending the boot loader and generating an instruction input window includes:
loading an interrupt statement of a miniaturized kernel to interrupt the boot loader;
loading a preset window assembly in a second temporary storage space;
and sending a generation instruction to the upper computer so that the upper computer generates an instruction input window.
In some embodiments, the calling the test case according to the test instruction to test and verify the eMMC chip includes:
calling a test mapping table, wherein the test mapping table records the corresponding relation between a test instruction and a test case;
analyzing the test instruction and calling a test case corresponding to the test instruction according to the test mapping table;
and executing the test case to test and verify the eMMC chip.
In some embodiments, the calling, according to the test mapping table, a test case corresponding to the test instruction includes:
and loading the test data contained in the test case into the second temporary storage space, or acquiring the test data from an external interface according to the test case and loading the test data into the second temporary storage space.
In some embodiments, the test instruction of the upper computer is generated based on a Python development environment, the test instruction is a custom short sentence, and the eMMC verification platform is configured with an analysis module of the test instruction to analyze and determine a test case corresponding to the short sentence.
In some embodiments, after the test case is called according to the test instruction to test and verify the eMMC chip, the starting method further includes:
after the test verification is executed, the instruction input window is kept not to exit so as to receive the next test instruction;
and when the instruction input into the instruction input window is an ending instruction, exiting the instruction input window.
In some embodiments, after exiting the instruction input window, the method of starting further comprises:
restoring the boot loader execution;
and jumping from the miniaturized kernel operation stage to kernel initialization, and continuously starting the system of the eMMC verification platform.
In a second aspect, an embodiment of the present application provides a starting apparatus, including: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the start-up method according to the first aspect when the computer program is executed.
In a third aspect, embodiments of the present application provide a computer-readable storage medium storing computer-executable instructions for causing a computer to perform the start-up method according to the first aspect.
The starting method, the starting device and the storage medium of the eMMC verification platform provided by the embodiment of the application have at least the following beneficial effects: according to the embodiment of the application, the starting flow of the system of the eMMC verification platform is regulated, interruption is generated in the running stage of the miniaturized kernel in the system starting process of the eMMC verification platform, an instruction input window is generated to the upper computer, and a user can input a test instruction through the upper computer, so that the eMMC chip is subjected to verification test in the environment without entering the system.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. The objectives and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate and do not limit the application.
FIG. 1 is an overall flow chart of a startup method provided by an embodiment of the present application;
FIG. 2 is a flow chart of loading a miniaturized kernel by a preloaded program according to an embodiment of the present application;
FIG. 3 is a flow chart of generating an instruction input window provided by an embodiment of the present application;
FIG. 4 is a flow chart of invoking a test mapping table to determine test cases provided by an embodiment of the present application;
FIG. 5 is a flow chart of two ways of loading test data provided by an embodiment of the present application;
FIG. 6 is a flow chart of an embodiment of the present application that provides for the input instruction window not to be automatically exited and exited by an end instruction;
fig. 7 is a flowchart of a system for continuing to start an eMMC verification platform after exiting an input command window according to an embodiment of the present application.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
The eMMC verification platform is usually a development board based on manufacturers, after the system in the development board is started, a tester can issue test verification related instructions through an upper computer, the development board analyzes the instructions and then controls the eMMC chip to execute related operations such as reading, writing, erasing and the like, and can collect data of the eMMC chip for executing the related operations, so that a data analysis basis is provided for verification of the eMMC chip.
In general, the test instruction needs to be supported by a development board, and a system of the development board has a certain limit on the implementation of the test instruction, so that on one hand, a tester needs to write the test instruction in the functional range supported by the development board, and on the other hand, if the tester wants to eliminate the influence of the system on the verification test, another path is needed; in order to facilitate completing various tests in the same eMMC verification, the current conventional eMMC verification process is changed.
Based on this, the embodiment of the application provides a starting method, a starting device and a storage medium of an eMMC verification platform, in the starting process of the eMMC verification platform, the starting method, the starting device and the storage medium are interrupted in a miniaturized kernel operation stage (lk stage) and provide a command input window for a user, the user can realize verification test under a non-system environment through the command input window, and the end command input window can continuously enter the system to carry out verification test, so that the verification test under the original system environment can be satisfied, and the verification test under the non-system environment can also be satisfied.
Embodiments of the present application will be further described below with reference to the accompanying drawings.
Referring to the flowchart shown in fig. 1, the embodiment of the application provides a starting method of an eMMC verification platform, wherein the eMMC verification platform is used as a host to be connected with an eMMC chip for verification, and the eMMC verification platform is also connected with an upper computer to receive a test instruction of the upper computer and issue and execute the test instruction; the starting method includes, but is not limited to, the following steps:
step S100, when a system starting instruction of an upper computer is received, loading a preset boot loader program and entering a miniaturized kernel operation stage;
step S200, generating an interrupt at the running stage of the miniaturized kernel, suspending the boot loader and generating an instruction input window;
step S300, displaying an instruction input window through the upper computer, and receiving a test instruction sent by the upper computer through the instruction input window;
step S400, calling a test case according to the test instruction to test and verify the eMMC chip.
The eMMC verification platform is connected with the upper computer, receives a test instruction issued by the upper computer, and is also connected with the eMMC chip for issuing a specific operation instruction. The embodiment of the application adjusts the boot loader of the eMMC verification platform, automatically interrupts when entering the running stage of the miniaturized kernel, and generates the instruction input window so as to provide the test conditions under the non-system environment for the user.
Specifically, after the eMMC verification platform is powered on, when a system start instruction of the upper computer is received, the eMMC verification platform starts the system and loads a boot loader stored in a boot memory (boot rom), the boot loader operates before a system kernel operates, and can initialize hardware devices and establish a memory space map, so that the software and hardware environment of the system is brought to a proper state, and a correct environment is prepared for finally calling the operating system kernel. The loading program is guided to run and enter a miniaturized kernel running stage to be interrupted, corresponding codes are executed to generate an instruction input window, and the instruction input window can be displayed on the upper computer, so that the upper computer receives a display instruction returned by the eMMC verification platform, and the instruction input window is displayed on a display screen of the upper computer. The style of the instruction input window can be set according to actual needs, different codes can generate different window styles, for example, the instruction input window can be similar to a command line window operated under a Windows system, and richer user interface elements can be called to obtain the command window.
The user can input corresponding test instructions through the instruction input window, and the test instructions are issued to the eMMC verification platform through the upper computer to be analyzed, so that the eMMC verification platform issues test operations to the eMMC chip according to the test instructions.
It will be appreciated that there are a variety of forms of host computers, more commonly PC hosts, that are connected to the eMMC authentication platform via corresponding data transfer interfaces. The upper computer forming test instruction can be based on different development environments, such as an instruction programmed by adopting a C language, an instruction programmed by java, an instruction programmed by Python, and the like. Under the related technology, the test instruction which can be validated by the upper computer under the conventional verification test environment can also be used for test verification of the miniaturized kernel operation stage. Meanwhile, the embodiment of the application also supports the user to customize some test instructions in the test verification of the running stage of the miniaturized kernel. Specifically, under the condition that the running stage of the miniaturized kernel is interrupted, a test mapping table can be called, the test mapping table records the corresponding relation between the test instruction and the test case, then the customized test instruction is preset in the test mapping table, and the eMMC verification platform analyzes the customized test instruction and then executes the test case corresponding to the customized test instruction, so that a user can be helped to quickly realize some fixed verification tests.
Referring to the flowchart shown in fig. 2, in some embodiments, after loading the preset boot loader in step S100, the method enters the mini-kernel operation stage, which includes the following steps:
step S110, loading boot codes (boot codes) from a boot memory and loading preloaded programs (pre-loader) according to the boot codes;
step S120, initializing a first temporary storage space of the eMMC verification platform according to a preloaded program;
in step S130, in the case that the preloaded program is loaded into the first temporary storage space, the loaded mini-kernel enters the mini-kernel running phase.
Boot loader launch is divided into two phases, one is the phase where the preloaded program loads the miniaturized kernel and the other is the miniaturized kernel loading kernel phase. In the embodiment of the application, the interrupt occurs in the process of loading the running stage of the miniature kernel, before entering the running stage of the miniature kernel, the boot loader loads the boot code from the boot memory, the boot memory is a read-only storage area, the boot code is stored in the boot memory, and when the eMMC verification platform is powered on and started, the boot code runs first, and the boot code can check system hardware and load an operating system. In this embodiment, the boot code may execute loading the preloaded program into the first temporary storage space, where the first temporary storage space may be an ISRAM (i.e. internal RAM) or may be a temporary storage space in other RAM forms, where the ISRAM may be generally used directly after initialization, and if the ISRAM is a temporary storage space in other RAM forms, it is generally required to first partition a space with a specific capacity and then use the space after initialization. And after the preloaded program is loaded, the miniaturized kernel is guided to start, and the miniaturized kernel enters the running stage.
It should be noted that, entering the running stage of the mini-kernel means that the running stage of the mini-kernel is entered, and not the running stage of the mini-kernel is ready to be entered. The miniaturized kernel runtime phase will occupy a second temporary storage space to execute a large amount of data, including test instructions and corresponding test cases, as will be described later.
Referring to the flowchart shown in FIG. 3, in some embodiments, generating an interrupt at the miniaturized kernel runtime phase, pausing the boot loader and generating an instruction input window in step S200, includes the steps of:
step S210, loading an interrupt statement of the miniaturized kernel to interrupt the boot loader;
step S220, loading a preset window component in the second temporary storage space;
step S230, sending a generation instruction to the upper computer to enable the upper computer to generate an instruction input window.
In this embodiment, the miniaturized kernel embeds the interrupted code, and the interrupted code automatically pauses when being executed, that is, interrupts the boot loader boot startup process. And then turn to executing code that generates the window component. Before the initialization of the second temporary storage space is completed by the preloaded program when the running stage of the miniature kernel is entered, the miniature kernel is loaded into the second temporary storage space to run, and then the code for generating the window assembly also runs in the second temporary storage space, so that the preset window assembly is loaded and generated. The preset window component can correspondingly display a corresponding instruction input window on a display of the upper computer. The second temporary storage space may be a DRAM (here, may refer to a memory on hardware specifically, and conversely, the first temporary storage space may be a cache), or may be another temporary storage space that is further divided.
Referring to the flowchart shown in fig. 4, in some embodiments, the step S400 of calling the test case according to the test instruction to test and verify the eMMC chip includes:
step S410, a test mapping table is called, and the corresponding relation between the test instruction and the test case is recorded in the test mapping table;
step S420, analyzing the test instruction and calling the test case corresponding to the test instruction according to the test mapping table;
step S430, executing the test case to test and verify the eMMC chip.
The miniaturized kernel operation stage loads the test mapping table in the DRAM at the same time, as before, the test mapping table is used for searching the test case corresponding to the test instruction, when the test instruction is the instruction which can be directly supported by the eMMC verification platform in a conventional way, the test mapping table can not be searched, but when the test instruction is in a self-defined statement, the test mapping table is required to be searched to determine the test case. Because the function of the self-defining test instruction is provided, a user can execute a preset test case by using a shorter test instruction, for example, a test instruction 'CCC' is preset in a test mapping table, the corresponding test case is to write operation on an eMMC chip by using 4k random data for 1 hour, then the number of increased erasing times of the eMMC chip is calculated, then the user inputs 'CCC' in an instruction input window, and the user can instruct an eMMC verification platform to execute the writing operation on the eMMC chip by using 4k random data for 1 hour, and then the number of increased erasing times of the eMMC chip is calculated.
Referring to the flowchart shown in fig. 5, in some embodiments, the calling the test case corresponding to the test instruction according to the test mapping table in step S420 includes:
step S421, the test data contained in the test case is loaded into the second temporary storage space, or the test data is obtained from the external interface according to the test case and loaded into the second temporary storage space.
The loading of the test case and the corresponding test data in the second temporary storage space is mentioned, if the test case itself contains a certain test data, the test data can be directly loaded in the second temporary storage space; however, the boot loader starting process is often lightweight, so that the miniaturized kernel running stage cannot often contain a large amount of test data, and when the large amount of test data needs to be executed, the test data can be pulled through an external interface to be loaded into the second temporary storage space. It will be appreciated that, since the second temporary storage space may be a DRAM, for example, the data loaded into the DRAM cannot be automatically maintained and needs to be continuously refreshed to maintain the data, for these large amounts of test data, the test data is not required after the test is completed, which is that the DRAM can easily release these test data, and the usability of the storage space of the DRAM is ensured.
Referring to the flowchart shown in fig. 6, in some embodiments, after the test case is called according to the test instruction to test and verify the eMMC chip, the starting method further includes:
step S510, after test verification is executed, the instruction input window is kept not to exit so as to receive the next test instruction;
in step S520, when the instruction input window is the end instruction, the instruction input window is exited.
The instruction input window does not automatically exit, and at this time, the user can sequentially input test instructions to perform a plurality of verification tests. Each time a user inputs a test instruction, the instruction input window automatically waits after the execution is determined, two waiting modes can be provided, one is that the instruction input window displays the execution progress of the current test instruction, the user can input another test instruction after the current test instruction is completely executed, and the other is that the user can continuously input a plurality of test instructions in the instruction input window, and the eMMC verification platform sequentially executes the test instructions. When the user needs to exit the instruction input window, an ending instruction can be input, and the eMMC verification platform closes the instruction input window after receiving the ending instruction.
Referring to the flowchart shown in FIG. 7, in some embodiments, after exiting the instruction input window, the method of starting further comprises:
step S610, resuming boot loader execution;
step S620, jumping to kernel initialization from the miniaturized kernel operation stage, and continuing to start the system of the eMMC verification platform.
And exiting the instruction input window, namely continuing to execute the boot loader, and continuing to start the system of the eMMC verification platform. At this time, the miniaturized kernel operation stage jumps to the kernel initialization, and then the subsequent starting process is continuously executed.
As can be seen from the above steps, the embodiment of the present application adjusts the start-up flow of the system of the eMMC verification platform, generates an interrupt in the miniaturized kernel operation stage during the system start-up process of the eMMC verification platform, and generates an instruction input window to the upper computer, so that a user can input a test instruction through the upper computer, thereby performing a verification test on the eMMC chip in an environment where the system is not entered.
The embodiment of the application also provides a starting device, which comprises: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the start-up method of the above steps when the computer program is executed.
Embodiments of the present application also provide a computer-readable storage medium storing computer-executable instructions for causing a computer to perform a startup method as in the embodiments of the second aspect.
The terms "first," "second," "third," "fourth," and the like in the description of the application and in the above figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the application described herein may be implemented, for example, in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or apparatus.
It should be understood that in the present application, "at least one (item)" means one or more, and "a plurality" means two or more. "and/or" for describing the association relationship of the association object, the representation may have three relationships, for example, "a and/or B" may represent: only a, only B and both a and B are present, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b or c may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.
It should be understood that in the description of the embodiments of the present application, plural (or multiple) means two or more, and that greater than, less than, exceeding, etc. are understood to not include the present number, and that greater than, less than, within, etc. are understood to include the present number.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of elements is merely a logical functional division, and there may be additional divisions of actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
It should also be appreciated that the various embodiments provided by the embodiments of the present application may be arbitrarily combined to achieve different technical effects.
While the preferred embodiment of the present application has been described in detail, the present application is not limited to the above embodiments, and those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit and scope of the present application, and these equivalent modifications or substitutions are included in the scope of the present application as defined in the appended claims.
Claims (10)
1. The starting method of the eMMC verification platform is characterized in that the eMMC verification platform is used as a host to be connected with an eMMC chip for verification, and the eMMC verification platform is also connected with an upper computer to receive a test instruction of the upper computer and issue and execute the test instruction;
the starting method comprises the following steps:
when a system starting instruction of the upper computer is received, loading a preset boot loader program and entering a miniaturized kernel operation stage;
generating an interrupt at the running stage of the miniaturized kernel, suspending the boot loader and generating an instruction input window;
displaying the instruction input window through the upper computer, and receiving a test instruction sent by the upper computer through the instruction input window;
and calling a test case according to the test instruction to test and verify the eMMC chip.
2. The method according to claim 1, wherein the step of entering the mini-kernel run phase after loading the predetermined boot loader comprises:
loading boot code from a boot memory and loading a preloaded program according to the boot code;
initializing a first temporary storage space of the eMMC verification platform according to a preloaded program;
and loading the miniaturized kernel into a miniaturized kernel running stage under the condition that the preloaded program is loaded into the first temporary storage space.
3. The method of starting up of claim 2, wherein generating an interrupt during the miniaturized kernel runtime phase, suspending the boot loader and generating an instruction input window, comprises:
loading an interrupt statement of a miniaturized kernel to interrupt the boot loader;
loading a preset window assembly in a second temporary storage space;
and sending a generation instruction to the upper computer so that the upper computer generates an instruction input window.
4. The method according to claim 3, wherein the calling a test case according to the test instruction to test and verify the eMMC chip includes:
calling a test mapping table, wherein the test mapping table records the corresponding relation between a test instruction and a test case;
analyzing the test instruction and calling a test case corresponding to the test instruction according to the test mapping table;
and executing the test case to test and verify the eMMC chip.
5. The method according to claim 4, wherein the calling the test case corresponding to the test instruction according to the test mapping table includes:
and loading the test data contained in the test case into the second temporary storage space, or acquiring the test data from an external interface according to the test case and loading the test data into the second temporary storage space.
6. The starting method according to claim 1, wherein the test instruction of the upper computer is generated based on a Python development environment, the test instruction is a custom short sentence, and the eMMC verification platform is configured with an analysis module of the test instruction to analyze and determine a test case corresponding to the short sentence.
7. The startup method according to claim 1, characterized in that after calling a test case according to the test instruction to test and verify the eMMC chip, the startup method further comprises:
after the test verification is executed, the instruction input window is kept not to exit so as to receive the next test instruction;
and when the instruction input into the instruction input window is an ending instruction, exiting the instruction input window.
8. The startup method according to claim 7, wherein after exiting the instruction input window, the startup method further comprises:
restoring the boot loader execution;
and jumping from the miniaturized kernel operation stage to kernel initialization, and continuously starting the system of the eMMC verification platform.
9. A starting device, comprising: memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the start-up method according to any one of claims 1 to 8 when the computer program is executed.
10. A computer-readable storage medium storing computer-executable instructions for causing a computer to perform the start-up method according to any one of claims 1 to 8.
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