Disclosure of Invention
The invention aims to solve the technical problem that in the prior art, a static time slot allocation mode cannot meet the allocation requirement of SPN small-particle service.
The invention adopts the following technical scheme:
in a first aspect, the present invention provides a method for allocating centralized timeslots for small SPN grains, including:
according to the time slot time delay information reported by the forwarding plane, analyzing and obtaining an incoming time delay sequence and an outgoing time delay sequence of the network element; the incoming time slot time delay in the incoming time delay sequence and the outgoing time slot time delay in the outgoing time delay sequence are arranged in an incremental mode;
calculating to obtain a delay difference array according to the incoming delay sequence and the outgoing delay sequence, and analyzing to obtain an incoming delay subscript change rule of the same-value delay difference according to the delay difference array;
finding an equivalent interval of a target delay difference in the delay difference array, searching an unoccupied access delay combination of the target delay difference according to the equivalent interval and an access delay index change rule of the same-value delay difference, and performing time slot allocation on the network element according to the access delay combination so as to meet the end-to-end bidirectional delay difference requirement.
Preferably, the calculating to obtain the delay difference array according to the incoming delay sequence and the outgoing delay sequence specifically includes:
subtracting the N-i outgoing delay in the outgoing delay sequence from the i-th incoming delay in the incoming delay sequence for each i value to obtain the i-th delay difference in the delay difference array; wherein i is an integer, and i is smaller than N, where N is the number of corresponding time slot delays in the incoming delay sequence or the outgoing delay sequence.
Preferably, the finding the equivalent interval of the target delay difference in the delay difference array specifically includes:
finding out a midpoint of a basic interval, comparing the target delay difference with the delay difference of the midpoint, and performing interval shrinkage according to a comparison result to obtain a shrinkage interval until the starting delay difference and the ending delay difference of the final shrinkage interval are equal to the target delay difference, wherein the final shrinkage interval is an equivalent interval where the target delay difference is located; the time delay difference array is used for obtaining a time delay difference value set, wherein a time delay difference value set is used for obtaining a time delay difference value set, and the time delay difference value set is used for obtaining a time delay difference value set;
and performing interval shrinkage according to the comparison result to obtain a shrinkage interval, wherein the method specifically comprises the following steps of:
If the comparison result is that the target time delay difference is larger than the time delay difference of the middle point, the starting point of a shrinkage interval obtained by shrinkage is the middle point, and the end point of the shrinkage interval is the end point of the basic interval;
if the comparison result is that the target time delay difference is smaller than the time delay difference of the midpoint, obtaining a starting point of the shrinkage interval as a starting point of the basic interval and an ending point of the shrinkage interval as the midpoint;
and if the comparison result is that the target delay difference is equal to the delay difference of the midpoint, expanding and searching the starting point and the ending point of the equivalent section to the two sides of the reference point by taking the midpoint as the reference point of the equivalent section.
Preferably, the step of analyzing to obtain the variation rule of the access delay subscript of the same-value delay difference according to the delay difference array specifically includes:
finding a median time delay difference in the time delay difference array, and calculating an in-out time delay index change rule in a first direction and a second direction according to an index centrPoint of the median time delay difference;
in the first direction, the variation rule of the access delay subscript is upperrightslope=centrpoint ≡ (N-1-centrpoint);
in the second direction, the variation rule of the access delay subscript lowerletslope= (N-1-centrpoint ≡centrpoint), where N is the number of corresponding time slot delays in the incoming delay sequence or the outgoing delay sequence.
Preferably, the searching for the unoccupied access delay combination of the target delay difference according to the change rule of the access delay subscript of the equivalent interval and the equivalent delay difference specifically includes:
judging whether the access time delay combination corresponding to the target time delay difference is occupied one by one according to the incoming time delay subscript and the outgoing time delay subscript of each target time delay difference in the equivalent interval;
if the unoccupied access time delay combination is not found in the equivalent interval, starting from the equivalent interval, searching along the first direction and/or the second direction until the unoccupied access time delay combination with the target time delay difference is found.
Preferably, starting from the equal-value interval, searching along the first direction and/or the second direction until the unoccupied access delay combination of the target delay difference is found, which specifically includes:
determining a target area, and searching in the target area; if all the access delay combinations in the target area are occupied, carrying out next search until unoccupied access delay combinations are obtained;
when the first search is carried out, a target area is determined according to the equivalent section, the target area searched for in the last time is used as a reference area searched for in the next time in the subsequent search, and the target area is determined according to the change rule of the index of the access time delay of the reference area and the same-value time delay difference;
Or determining an equivalent domain of the target delay difference according to the change rule of the access delay subscript of the equivalent interval and the equivalent delay difference;
and sequentially taking each target time delay difference of the equivalent interval as an initial searching position, starting searching from the initial searching position, searching for one access time delay combination, judging whether the access time delay combination is positioned in the equivalent domain, if the access time delay combination is positioned in the equivalent domain, further judging whether the access time delay combination is occupied, and if the access time delay combination is not positioned in the equivalent domain or the access time delay combination is occupied, continuing searching for the next access time delay combination until the access time delay combination which is positioned in the equivalent domain and is unoccupied is obtained.
Preferably, the searching from the initial searching position specifically includes:
when searching along the first direction, calculating to obtain an incoming time slot delay index m=i+1 and an outgoing time slot delay index n=j+upperRightSlope of the current searching position according to an incoming time slot delay index i and an outgoing time slot delay index j of the reference position;
when searching along the second direction, according to the incoming time slot delay index i and the outgoing time slot delay index j of the reference position, calculating to obtain an incoming time slot delay index m=i-1 and an outgoing time slot delay index n=j-lowerliftslope of the current searching position;
The current searching position searched for in the last time is used as the reference position searched for in the next time, and the initial searching position is used as the reference position searched for in the first time.
Preferably, when the unoccupied access delay combination of the target delay difference cannot be found, the method further includes:
and adding or subtracting a preset deviation value from the target time delay difference to obtain a new target time delay difference, using the new target time delay difference to find an unoccupied access time delay combination corresponding to the new target time delay difference, and performing time slot allocation on the network element according to the access time delay combination.
Preferably, the allocating the time slot to the network element according to the access delay combination specifically includes:
mapping the incoming time slot delay subscript in the incoming time slot combination to obtain a corresponding incoming time slot number according to a first mapping relation between the incoming time slot delay subscript and the incoming time slot number;
mapping the outbound time slot delay subscript in the access time delay combination according to a second mapping relation between the outbound time slot delay subscript and the outbound time slot number to obtain a corresponding outbound time slot number; the first mapping relation and the second mapping relation are recorded and obtained when an incoming delay sequence and an outgoing delay sequence of a corresponding network element are obtained;
And allocating the incoming time slot number and the outgoing time slot number to a network element.
In a second aspect, the present invention further provides a centralized timeslot allocation device facing the SPN small granule, which is configured to implement the centralized timeslot allocation method facing the SPN small granule in the first aspect, where the device includes:
at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor for performing the SPN granule oriented centralized time slot allocation method of the first aspect.
In a third aspect, the present invention also provides a non-volatile computer storage medium storing computer executable instructions for execution by one or more processors to perform the method of the first aspect for SPN granule oriented centralized time slot allocation.
The invention provides a time slot allocation method, which is used for realizing the shrinkage of a search position by determining the position of a target time delay difference after determining the position of the target time delay difference through analyzing the change rule of an access time delay subscript of the same-value time delay difference without constructing the time delay difference matrix so as to search the unoccupied outgoing time slot time delay and the unoccupied incoming time slot time delay. Because the time delay difference matrix is not required to be constructed, the algorithm complexity of the embodiment is reduced, so that the time consumed by the algorithm is shortened, the resource occupation in the algorithm execution process is reduced, the position shrinkage is realized through the change rule of the access time delay subscript, the time consumed in the search process in the algorithm is further reduced, and the execution efficiency of the algorithm is improved.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
In addition, the technical features of the embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Example 1:
In the prior art, the time slots required by the service bandwidth are generally allocated sequentially, the time slot delay is given to a value, and the overall time slot allocation mode is represented as static allocation. However, for the SPN small-particle service, based on the principle of bidirectional delay difference, the bidirectional delay difference of the link is zero, if a fixed value is still assigned to the time slot delay of the network element according to the static allocation mode, the requirement of the end-to-end bidirectional delay difference cannot be ensured, the end-to-end bidirectional delay difference may exceed the upper limit requirement of relay protection, and relay protection is further triggered, so that the service quality is affected. Therefore, the key of the evaluation is the magnitude of the bidirectional delay difference between the end-to-end network elements, and the above static allocation method cannot meet the requirements of the power industry. To solve this problem, the present embodiment provides a centralized slot allocation method for small SPN grains.
In order to facilitate understanding and explanation of the method, the present embodiment also provides a second time slot allocation method, where the second time slot allocation method is based on the principle of the second time slot allocation method, so in the following description of the present embodiment, the second time slot allocation method will be preferentially explained, and the second time slot allocation method is explained based on the principle of the second time slot allocation method.
The second time slot allocation method is shown in fig. 1, and specifically includes:
in step 201, according to the time slot delay information reported by the forwarding plane, the ingress delay sequence inputSlotArray [ n ] = { inA1, inA2, & gt, inAn } and the egress delay sequence outputSlotArray [ n ] = { outA1, outA2, & gt, outAn } of the corresponding network element are obtained through analysis and arrangement, and the mapping relation Map between the time slot number and the arranged time delay array is recorded. The time delay of the incoming time slot in the incoming time delay sequence and the time delay of the outgoing time slot in the outgoing time delay sequence are arranged in an incremental mode. In the method, the outbound time delay sequence and the inbound time delay sequence are expressed in the form of an array, and can also be expressed in various forms such as a list, an ordered set and the like in actual use.
The time slot time delay information comprises time delay values generated by pairing time delay of a single network element with a time slot number of 0 and all time slots of the single network element, and time intervals of adjacent time slots, namely time delay fixed offset of adjacent time slots, so that an incoming time slot time delay diagram and an outgoing time slot time delay diagram can be generated according to the time slot time delay information, an outgoing time delay sequence is obtained according to the outgoing time slot time delay diagram, and an incoming time delay sequence is obtained according to the incoming time slot time delay diagram.
In step 202, a delay difference matrix of the network element is constructed according to the incoming delay sequence and the outgoing delay sequence, and the delay difference matrix is specifically: with inputSlotArray [ n ]]Subtracting the output slot array [ n ] from the first delay inA1]Is the last delay of the output an, i.e. inputSlotArray [0 ]]-outputSlotArray[n-1]Obtaining an access delay difference div11, and subtracting the output SlotArray [ n ] from the InA1]The penultimate delay outran-1 gets div12, i.e., inputSlotArray [0 ]]-outputSlotArray[n-2]And so on, down to the outputSlotArray [ n ]]The first delay outA1 gets div1n, thus n numbers div11, div 12. And then the inputSlotArray [ n ]]The second number inA2 of the network element continues the same difference operation, thus obtaining n groups of n input/output time delay differences, namely the time of the network elementThe delay matrix is shown in fig. 2. The algorithm time complexity required for this step is O (N 2 )。
In step 203, the upper limit of the end-to-end bidirectional delay difference is recorded as tP2P, which is obtained by those skilled in the art according to the delay difference requirement and empirical analysis, the number of end-to-end network elements is neNum, and the target delay difference upper limit of the single network element tnemax=tpe2p≡num is calculated according to the mean value, and the target delay difference is determined according to the target delay difference upper limit, for example, any time slot delay difference smaller than or equal to the target delay difference upper limit is selected in the delay difference matrix as the target delay difference, and the target delay difference is also expressed by tNe in the subsequent embodiments as an alternative expression.
Starting from the upper right corner of the matrix, looking from the upper right corner to the lower left corner of the matrix, the matrix is approximately a binary search tree, so that the target delay difference tNe of the network element and the matrix value slotdiffMatrix [ i ] [ j ] are compared from the upper right corner, and a value close to tNe is found, wherein i is a matrix row number, and j is a matrix column number.
If tNe > slotDiffMatrix [ i ] [ j ], meaning that the target value is in the bottom right half of the matrix (the right tree of the binary search tree), then the column of positions of the slotDiffMatrix [ i ] [ j ] for comparison is shifted one column to the right with its column index value j=j++; if tNe < slotDiffMatrix [ i ] [ j ] means that the target value is in the upper left half of the matrix (left tree of binary search tree), then the slotDiffMatrix [ i ] [ j ] position for comparison is shifted row-wise by one row with index value i=i—; and searching the matrix element which is closest to the absolute value and the target value and is unoccupied according to the mode, and then mapping Map to matrix row i and matrix column j where the element is located to find the corresponding outgoing time slot number and incoming time slot number, namely the time slot number which is required to be allocated to the network element.
Based on the time delay difference matrix constructed in the time slot allocation method, the time delay difference matrix performs characteristic analysis, taking the small-scale time delay difference matrix shown in fig. 3 as an example, the time delay difference matrix is obtained and has the following characteristics:
When constructing the time delay difference matrix, the first row element is obtained by respectively making differences between the minimum value of the time delay of the incoming time slot and the value of the time delay of each outgoing time slot, the second row element is obtained by respectively making differences between the second minimum value of the time delay of the incoming time slot and the value of the time delay of each outgoing time slot, and so on.
Assuming that the minimum value of the incoming time slot delay is DelayInMin_1 and the second minimum value of the incoming time slot delay is DelayInMin_2, the outgoing time slot delay ranges from [ DelayOutMin_1, delayOutMax_1], then there is a first row of values ranging from [ DelayInMin_1-DelayOutMax_1, delayInMin_1-DelayOutMin_1], a second row of values ranging from [ DelayInMin_2-DelayOutMax_1, delayInMin_2-DelayOutMin_1], and so on, a third row of values ranging from [ DelayInMin_3-DelayMax_1, delayInMin_3-DelayOutMin_1] can be obtained, and the k row of values ranging from [ DelayInMin_k-DelayInMin_1, delayInkInkInkInkIndInkIndInkIndInk1 ].
The value range shows equivalent offsets in rows, and the equivalent offsets are delay fixed offsets of adjacent time slots. The connecting line from the upper left corner to the lower right corner of the matrix is taken as a main diagonal, and the connecting line from the upper right corner to the lower left corner of the matrix is approximately taken as a secondary diagonal.
Because of the characteristics of the access time delay map, the time delay offset interval is a fixed value, and the difference between the maximum value and the minimum value of the access time delay is also about a fixed value under the condition that the number of time slots is fixed.
For ease of calculation, integers are used as the precision of the delay difference matrix. The number of time slots is N, the time delay difference between the maximum value and the minimum value of each row in the time delay difference matrix is delta, and the time delay difference of the elements in the same column between the rows is the time delay map offset value. Whereby there are successive rows of sub-matrices of elements in the delay matrix arranged in a stepwise fashion, the sub-matrix blocks of N/delta slot delays on average are identical.
The dimensions sχt of such a submatrix are: all combinations of rounding up (N/. DELTA.) and rounding down (N/. DELTA.). The submatrices with the same element values are called as 'same-value fields', and as shown in fig. 3, each submatrix of 5×5 surrounded by a frame is a same-value field, as can be seen from the analysis, the delay difference matrices are distributed in a step shape by taking the same-value field as a unit. The range of the matrix combining the fields with the same element values is called as an 'equal value range', as in fig. 3, the time delay difference-68 corresponds to four sub-matrices, which are also called as equal value fields, and the four equal value fields are distributed in sequence from the lower left corner to the upper right corner, and form an equal value range.
In summary, the delay matrix is a matrix with the same value domain as a unit and the equivalent domain is approximately parallel to the secondary diagonal, as shown in fig. 4, the primary diagonal is a solid line from the upper left corner of the matrix to the lower right corner of the matrix, and the secondary diagonal is a dotted line from the upper right corner of the matrix to the lower left corner of the matrix. The delay-difference matrix is divided into two parts along the main diagonal (i.e. the line between the upper left and lower right corners of the delay-difference matrix), the lower left part and the upper right part. Because of the matrix construction process, the element values of the lower left and upper right parts are in myopia symmetry, when i=j, the main diagonal line formed by slotDiffMatrix [ i ] [ j ] comprises the arrangement combination of most time slots, and the lower left and upper right parts comprise the arrangement combination of all access time slots.
It should be noted that fig. 3 and fig. 4 are only schematic diagrams of the delay-difference matrix, and do not represent the delay-difference matrix in actual use, and in actual situations, the delay-difference matrix is usually larger in scale, for example, the matrix size is 480×480.
Based on the time delay data change characteristics of the access time delay diagram, the embodiment constructs a bidirectional time delay difference matrix in a mode of subtracting the reverse order as a target range of the optimal time slot. And the binary search tree mode is utilized to improve the search efficiency, the complicated time slot optimization problem is converted into the mathematical problem, and an essential solution is provided for the goal of optimizing the time slot.
A general complexity of searching for a target-compliant term in an nxn matrix is O (N2). The embodiment firstly utilizes the characteristic of time delay of each access time slot to construct a matrix which increases from left to right from top to bottom. Secondly, according to the direction of searching the matrix from the upper right corner to the lower left corner, the matrix can be approximated as a binary search tree, the complexity of searching the number in the binary search tree is O (log 2N), and compared with the progressive search, the complex level of searching is remarkably reduced.
The algorithm has the advantage of being capable of accurately finding out the desired time delay difference combination. However, in practical tests, the comprehensive time complexity of the process of constructing and searching the delay difference matrix is found to be O (N2+log2N), and a great deal of time is consumed in the process of optimizing time slots on a network element by network element basis on a route. Especially when the service delivery fails, it needs to be recalculated, which is more time-consuming.
In order to further optimize the algorithm, based on the above characteristics of the delay difference matrix, the embodiment provides a centralized time slot allocation method for small SPN grains, as shown in fig. 6, where the method includes:
in step 301, according to the time slot delay information reported by the forwarding plane, an incoming delay sequence and an outgoing delay sequence of a corresponding network element are obtained by analysis; the time delay of the incoming time slot in the incoming time delay sequence and the time delay of the outgoing time slot in the outgoing time delay array are arranged in an incremental mode.
The input delay sequence is the input slot array [ n ] and the output delay sequence is the output slot array [ n ].
In step 302, a delay difference array is calculated according to the incoming delay sequence and the outgoing delay sequence; and analyzing and obtaining the variation rule of the access delay subscript of the same-value delay difference according to the delay difference array.
It should be noted that the delay difference array should be distinguished from the delay difference matrix, where the delay difference array is equivalent to a main diagonal in the delay difference matrix, where an ith delay difference in the delay difference array is obtained by subtracting an ith incoming time slot delay in the incoming time delay sequence from an nth-i outgoing time slot delay in the outgoing time delay sequence; and i is an integer and is smaller than N, wherein N is the number of corresponding time slot delays in the incoming delay sequence or the outgoing delay sequence. In practical use, the number of incoming time slot delays is generally the same as the number of outgoing time slot delays, i.e. the incoming time delay sequence contains N incoming time slot delays, and the outgoing time delay sequence should also contain N outgoing time slot delays.
The time delay difference matrix is obtained by subtracting the time delay combination of the corresponding incoming time slot time delay and the corresponding outgoing time slot time delay in the incoming time delay sequence and the outgoing time delay sequence, the time delay difference array is equivalent to the main diagonal of the time delay difference matrix, and the time delay difference array can cover most of the time delay differences in the time delay difference matrix. The combination of the incoming time slot delay and the outgoing time slot delay is also referred to as an incoming time delay combination in the following. The variation rule of the access delay subscript of the same-value delay difference is the distribution rule of the access delay combination with the same delay difference in the delay difference matrix.
As shown in fig. 3, the distribution rule of the access delay combination with the same delay is equal to the distribution rule of the equivalent domain in the delay matrix, and the equivalent domain and the distribution rule thereof are described in the above embodiment and are not described herein.
In step 303, an equivalent interval of the target delay difference is found in the delay difference array, and according to the equivalent interval and the variation rule of the delay subscript of the same-value delay difference, an unoccupied delay combination of the target delay difference is found, and according to the delay combination, time slot allocation is performed on the network element, so as to meet the requirement of the end-to-end bidirectional delay difference.
The embodiment also provides an optional implementation manner for determining the target delay difference of each network element from end to end, which specifically includes: the target delay difference of the network element is determined according to the end-to-end bidirectional delay difference requirement, and specifically comprises the following steps: dividing the end-to-end bidirectional delay difference requirement by the number of network elements between the ends to obtain a target delay difference upper limit tNeMax=tP2P/neNum of each network element, selecting any delay difference smaller than or equal to the target delay difference upper limit from the delay difference array as a target delay difference tNe, wherein the target delay difference upper limit of the network element can also be calculated by adopting a weight strategy mode or an extreme mode (for example, the target delay difference upper limit of two network elements in a route is set to tP2P/2, and the delay differences of other network elements are set to 0).
The equivalent interval is an interval in which each delay difference in the delay difference array is a target delay difference, and in the delay difference matrix, the equivalent interval is expressed as a segment in a main diagonal, and delay differences at the segment positions are all the target delay differences.
The access time delay combination is an incoming time slot time delay and an outgoing time slot time delay which correspond to the time delay difference, and when any one of the incoming time slot time delay and the outgoing time slot time delay corresponds to the time slot is occupied, the access time delay combination is occupied.
In this embodiment, the delay difference matrix does not need to be constructed, and the change rule of the in-out delay subscript of the same-value delay difference is obtained through analysis, so that after the position of one target delay difference is determined, the position of the delay difference with the same value as the target delay difference is determined through the change rule of the in-out delay subscript, and the limit of the search position is realized, so that the unoccupied out-going time slot delay and the unoccupied in-going time slot delay are searched, and distribution is performed. Because the time delay difference matrix is not required to be constructed, the algorithm complexity of the embodiment is reduced, so that the time consumed by the algorithm is shortened, the resource occupation in the algorithm execution process is reduced, the position shrinkage is realized through the change rule of the access time delay subscript, the time consumed in the search process in the algorithm is further reduced, and the execution efficiency of the algorithm is improved.
Because of the symmetrical characteristic of the delay difference matrix, the values on the main diagonal of the matrix contain all possible delay differences in all the matrices, and based on this characteristic, the present embodiment also provides the following optional implementation manners for calculating the part of the delay difference array in the above embodiment, which specifically includes:
Subtracting the N-i outgoing delay in the outgoing delay sequence from the i-th incoming delay in the incoming delay sequence for each i value to obtain the i-th delay difference in the delay difference array; wherein i is an integer, and i is smaller than N (i.e. the value range of i is [0, N-1 ]), where N is the number of corresponding time slot delays in the incoming delay sequence or the outgoing delay sequence. The algorithmic complexity of this step is O (N).
Similarly, based on the characteristics of the delay difference matrix, it can be known that the equivalent domain of each delay difference is basically distributed in a step shape according to the direction of the secondary diagonal. The equivalent domain where the median delay difference is located has the largest number of steps, the change rule of the access delay subscript is relatively easy to analyze, and the change rule of the equivalent domain of all delay differences can be represented almost. Based on this principle, the present embodiment further provides the following preferred implementation manner, that is, the method analyzes and obtains the variation rule of the in-out delay subscript of the same-value delay difference according to the delay difference array, which specifically includes:
and finding a median time delay difference in the time delay difference array, and calculating an access time delay index change rule in the first direction and the second direction according to an index centrPoint of the median time delay difference.
In the first direction, the variation rule of the access delay index is upperright slope=centrPoint ≡ (N-1-centrPoint).
In the second direction, the variation rule of the access delay subscript lowerletslope= (N-1-centrpoint ≡centrpoint).
And when the delay difference array is slotDiffArry [ N-1], the median delay difference midslotdiff= (slotDiffArry [0] +slotdiffarry [ N-1 ])/-2.
The delay difference array can cover most delay differences, when the intermediate delay difference is positioned in the delay difference array, the subscript centrPoint in the delay difference array can be obtained by continuously performing range shrinkage through a dichotomy, if the median delay difference exists in the obtained range shrinkage, namely the obtained value interval of the median delay difference is obtained by shrinkage, the central position of the value interval is taken as the median delay difference position, and the subscript of the median delay difference position participates in calculation. The process of finding the median delay difference is based on the same concept as that of searching the target delay difference in the subsequent embodiment, and is not described herein, and the complexity of the algorithm is O (2×log2n). When the middle value time delay difference is not located in the time delay difference array, a section closest to the middle value time delay difference can be obtained through binary method shrinkage, namely, the starting point of the section is a value smaller than and closest to the middle value time delay difference in the time delay difference array, the ending point of the section is a value larger than and closest to the middle value time delay difference in the time delay difference array, the central position of the section is used as the middle value time delay difference position, and the subscript of the middle value time delay difference position participates in calculation.
Because the subscript of each delay difference in the delay difference array is the same as the corresponding ingress time slot delay subscript and egress time slot delay subscript, the subscript centrPoint of the median delay difference can identify the position of the median delay difference. The position of the median time delay difference is equivalent to the central position of the time delay difference matrix, the connecting line between the central position and the lower left corner of the time delay difference matrix (namely the second direction) and the connecting line between the central position and the upper right corner of the time delay difference matrix (namely the first direction) are the auxiliary diagonal lines, the equivalent domains of the median time delay difference are distributed in a step shape along the auxiliary diagonal lines, and the distribution rule of the equivalent domains of the median time delay difference can represent the distribution rule of the equivalent domains of all the time delay differences in the time delay difference matrix. Namely, starting from any time delay difference position in the time delay difference array, making a line parallel to the first direction, and the equivalent domain of the time delay difference is distributed in a step along the line. Therefore, the shrinkage limit of the search range can be performed through the change rule of the access delay subscript and the position of the target delay difference in the delay difference array.
After the change rule of the index of the access time delay is obtained, a corresponding equivalent domain can be obtained through the corresponding target time delay difference, and the access time slot is searched in the equivalent domain.
Since all delay differences in the delay difference matrix exist in the main diagonal, and the main diagonal exists in the form of a delay difference array, the corresponding target delay difference can be found in the delay difference array, and the embodiment provides the following optional implementation modes, which specifically include:
finding out a midpoint of a basic interval, comparing the target delay difference with the delay difference of the midpoint, and performing interval shrinkage according to a comparison result to obtain a shrinkage interval until the starting delay difference and the ending delay difference of the final shrinkage interval are equal to the target delay difference, wherein the final shrinkage interval is an equivalent interval where the target delay difference is located; the time delay difference array is used for obtaining a time delay difference value set, wherein the time delay difference value set is used for obtaining a time delay difference value set, and the time delay difference value set is used for obtaining a time delay difference value set.
And performing interval shrinkage according to the comparison result to obtain a shrinkage interval, wherein the method specifically comprises the following steps of:
and if the comparison result is that the target time delay difference is larger than the time delay difference of the middle point, the starting point of the shrinkage interval obtained by shrinkage is the middle point, and the end point of the shrinkage interval is the end point of the basic interval.
And if the comparison result is that the target time delay difference is smaller than the time delay difference of the middle point, obtaining the starting point of the shrinkage interval as the starting point of the basic interval, and the ending point of the shrinkage interval as the middle point.
And if the comparison result is that the target delay difference is equal to the delay difference of the midpoint, expanding and searching the starting point and the ending point of the equivalent section to the two sides of the reference point by taking the midpoint as the reference point of the equivalent section.
It should be noted that, in the above-mentioned "last time reduction" and "next time reduction" in this embodiment, for example, three times of reduction have been performed by a certain time, and for convenience of description, these three times of reduction are referred to as: the first shrinkage, the second shrinkage and the third shrinkage are the last shrinkage of the second shrinkage, the second shrinkage is the next shrinkage of the first shrinkage, the second shrinkage is the last shrinkage of the third shrinkage, and the third shrinkage pair is the next shrinkage of the second shrinkage.
For example, at the first reduction, the value of centrPoint=rounded up [ (0+N-1)/2 ] is calculated on the basis of the interval [0, N-1 ]. And judging the size of the delay difference slotDiffArry [ centrPoint ] of the position of the centrPoint and the size of the target delay difference u. If slotDiffArry [ centrPoint ] is smaller than u, the equivalent interval of the target delay difference u falls within the (centrPoint, N-1), the reduction is carried out to obtain a reduced interval as (centrPoint, N-1), the second reduction is carried out by taking the interval range (centrPoint, N-1) as a basic interval, calculating the value of the midpoint of the interval again until the equivalent interval of the target delay difference u is found (targetSIdx, targetEIdx), otherwise, if slotDiffArry [ centrPoint ] is larger than u, the equivalent interval of the target delay difference u falls at [0, centrPoint ], the reduction is carried out to obtain a reduced interval as [0, centrPoint), and the second reduction is carried out by taking the interval range as a basic interval, calculating the value of the midpoint of the interval again until the equivalent interval of the target delay difference u is found (targetSIdx, targetEIdx).
After the target delay difference is obtained, searching the unoccupied access delay combination of the target delay difference according to the change rule of the access delay subscript of the equivalent interval and the same-value delay difference, as shown in fig. 7, and specifically including:
in step 401, whether the access delay combination corresponding to the target delay difference is occupied or not is judged one by one according to the ingress time slot delay subscript and the egress time slot delay subscript of each target delay difference in the equivalent interval.
In step 402, if the unoccupied access delay combination is not found in the equivalent interval, each target delay difference in the equivalent interval is sequentially used as an initial searching position, and searching is performed from the equivalent interval along the first direction and/or the second direction until the unoccupied access delay combination of the target delay difference is found.
As shown in fig. 8, the main diagonal is taken as a boundary, the upper right direction of the main diagonal is taken as a first direction, and the lower left direction of the main diagonal is taken as a second direction, specifically, as shown by an arrow in fig. 8, the first direction is parallel to the upper right part of the main diagonal, the second direction is parallel to the lower left direction of the main diagonal, the first direction and the second direction can be understood as the distribution direction of equivalent domains of corresponding delay differences, and the searching range can be reduced and the searching efficiency can be improved by searching along the two directions.
When the unoccupied access time delay combination is not found in the first direction, the access time delay combination can be found in the second direction, or vice versa, the access time delay combination can be found in the second direction first, and then the access time delay combination can be found in the first direction.
Starting from the equivalent interval, searching along a first direction and/or a second direction until the unoccupied access delay combination of the target delay difference is found, wherein the two following implementation modes exist:
the first implementation manner is shown in fig. 9, and specifically includes:
in step 501, a target area is determined and a search is performed within the target area. When searching, the access time delay combinations in the target area can be traversed in any mode, for example, the access can be traversed to the first direction and/or the second direction according to the subscript change rule of the same-value time delay difference, and the access can be sequentially performed to each row or each column in the boundary according to the boundary of the target area.
In step 502, if all the access delay combinations in the target area are occupied, the next search is performed until the unoccupied access delay combination is obtained.
And determining a target area according to the equivalent section when the first search is performed, taking the target area searched for last time as a reference area searched for next time in the subsequent search, and determining the target area according to the change rule of the reference area and the in-out time delay subscript of the same-value time delay difference.
The target area may be expressed by any boundary point of the area and the size of the target area, for example, expressed as:
S={(i,j,(s,t,k}
wherein S represents a target area, (i, j represents a boundary point of the upper left corner of the target area, (S, t represents that the size of the target area is s×t, k represents whether the target area is the target area for the first search, if the target area is the target area for the first search, k is 1, otherwise, k is 0.
In the first searching, i is the minimum value of the incoming time slot time delay subscript in the equivalent interval, j is the minimum value of the incoming time slot time delay subscript in the equivalent interval, s is the value obtained by subtracting i from the maximum value of the incoming time slot time delay subscript in the equivalent interval, t is the value obtained by subtracting j from the maximum value of the outgoing time slot time delay subscript in the equivalent interval, and k is 1, so that a target area is formed.
K is 1 when searching along the first direction, and k is 1 when searching along the second direction, and k is 1 when the ingress time slot time delay subscript of each ingress time delay combination in the target area is larger than the ingress time slot time delay subscript.
In the subsequent searching, the boundary point corresponding to the target area can be calculated according to the boundary point of the reference interval, so as to determine the target area, wherein the reference interval is as follows:
S 0 ={(i 0 ,j 0 ),(s,t,k}
When searching is carried out along the first direction, determining the obtained target area according to the reference area as follows:
S={(i 0 +s,j 0 -upperRightSlope×s,9s,t,0}
when searching is carried out along the second direction, determining the obtained target area according to the reference area as follows:
S={(i 0 -s,j 0 +lowerLeftSlope×s),(s,t,0}
in actual use, said j 0 -upperRightSlope x s and j 0 The value of +lowerlefslope x s may not be an integer value, and it may be approximated to be rounded to obtain the subscript of the integer.
The target area may be approximately regarded as the same value area in the delay difference matrix (in the first search, the target area may be regarded as the portion of the corresponding same value area on the right upper or left lower side of the main diagonal, specifically, which portion is determined by the direction of the search), for example, as shown in fig. 10, if the target delay difference is-67, the corresponding equivalent interval is the line segment between the subscripts (10, 10) and the subscripts (14, 14) in the main diagonal in fig. 10, if the search is performed along the first direction, the determined target area is the first target area in fig. 10 in the first search, the determined target area is the second target area in fig. 10 in the second search, and so on, if the second target area continues to the first direction, and there is a third target area, if the search results in that all the access delay combinations in the second target area are occupied, then the third target area is continued to be searched.
The second implementation manner is shown in fig. 11, and specifically includes:
in step 601, an equivalent range of the target delay difference is determined according to the variation rule of the access delay subscript of the equivalent interval and the equivalent delay difference.
In step 602, each target delay difference of the equivalent interval is sequentially taken as an initial searching position, and searching is performed from the initial searching position.
In step 603, each time an access delay combination is searched, it is determined whether the access delay combination is located in the equivalent domain, if the access delay combination is located in the equivalent domain, it is further determined whether the access delay combination is occupied, if the access delay combination is not located in the equivalent domain or the access delay combination is occupied, the next access delay combination is continuously searched until the access delay combination which is located in the equivalent domain and not occupied is obtained.
The method comprises the steps of determining an equivalent region of a target delay difference and determining the target region based on the same conception, namely determining a first target region according to an equivalent region and a subscript change rule of the equivalent delay difference, determining a second target region according to the first target region, and the like until all target regions are determined, wherein the equivalent region is formed by all target regions.
The method comprises the steps of judging whether the access time delay combination is located in the equivalent domain, determining the access time delay combination directly through comparing the time delay subscript of the access time delay combination with the equivalent domain, and calculating the time delay difference of each access time delay combination without searching the access time delay combination, so that the searching efficiency is improved.
The searching from the initial searching position, as shown in fig. 12, specifically includes:
in step 701, when searching along the first direction, according to the incoming time slot delay index i and the outgoing time slot delay index j of the reference position, an incoming time slot delay index m=i+1 and an outgoing time slot delay index n=j+upperright slope of the current search position are calculated.
In step 702, when searching along the second direction, the incoming time slot delay index m=i-1 and the outgoing time slot delay index n=j-lowerlefslot of the current searching position are calculated according to the incoming time slot delay index i and the outgoing time slot delay index j of the reference position.
The current searching position searched for in the last time is used as the reference position searched for in the next time, and the initial searching position is used as the reference position searched for in the first time.
It should be noted that, in the "last search" and "next search" described in this embodiment, for example, three searches have been performed by a certain time, and for convenience of description, these three searches are referred to as: the first search is the "last search" of the second search, the second search is the "next search" of the first search, the second search is the "last search" of the third search, and the third search is the "next search" of the second search.
In practical use, the values obtained by the j+upsurightslope and the j-lowerleftsslope may not be integer values, and the values need to be approximately rounded to obtain subscripts of integers.
The two implementation modes are carried out based on the characteristics of the time delay difference matrix, the first implementation mode is to search for each same-value field in the time delay difference matrix, and after the search of the part in the corresponding direction in one same-value field is finished, the search is carried out in the next same-value field; and in the second implementation mode, directly determining an equivalent domain, traversing according to the change rule of the access time delay subscript of the same-value time delay difference, possibly passing through a plurality of same-value domains in traversing, and screening the access time delay combinations by judging and determining whether the access time delay combination is positioned in the equivalent domain or not when traversing each access time delay combination.
The algorithm complexity of the first implementation is O (log 2N), so the algorithm complexity of the process is O (num×log2n), where num is the number of rounds of searching, and in terms of algorithm complexity estimation in the subsequent embodiment, the first implementation still performs. The algorithm complexity of the second implementation mode is increased, but the complexity is still relatively low compared with that of searching in the whole time delay difference matrix, so that the searching efficiency is greatly improved.
It should be emphasized here that, in this embodiment, the ingress time slot delay subscript, the egress time slot delay subscript, the ingress time slot delay, the egress time slot delay, the ingress time delay combination, and the delay difference are all related, the delay difference is calculated by the ingress time slot delay and the egress time slot delay, the ingress time delay combination is a combination of the ingress time slot delay and the egress time slot delay, the ingress time slot delay subscript marks the position of the ingress time slot delay in the ingress time delay sequence, and the egress time slot delay subscript marks the position of the egress time slot delay in the egress time delay sequence.
Meanwhile, descriptions such as an equivalent interval, a target area, a reference area, and an equivalent area in the embodiment are all abstract concepts, and do not absolutely mean that the interval or the area contains one of the above-mentioned incoming time slot delay subscript, outgoing time slot delay subscript, incoming time slot delay, outgoing time slot delay, incoming time delay combination or time delay difference. For ease of understanding, a region or area may be understood to include one or more of the above objects in a storage structure, while other objects that result from the combination of the included objects with the ingress and egress delay sequences are also included in the region or area in a logical structure, e.g., when a region is running on a computer program, the actually stored objects are ingress and egress delay combinations, and then logically, the ingress and egress slot delay subscripts, ingress and egress slot delays, and egress slot delays that result from the ingress and egress delay combinations should be considered to be included in the region.
For convenience of description, in this embodiment, the description is made on the section or the area where different inclusion objects may be selected according to the directions in which the corresponding steps are focused when corresponding to each other, for example, when describing the equivalent section, the description is mainly made in such a way that the inclusion objects in the equivalent section are time delay differences, and when describing the target area, the description is mainly made in such a way that the inclusion objects in the target area are time delay combinations, which should not be interpreted as unclear recognition as the technical disclosure.
In an actual application scenario, the incoming time slot delay and the incoming time slot delay of each network element may not be integer values, and directly using the non-integer values to participate in calculation increases the calculation difficulty, and more calculation resources need to be provided for the calculation process.
Generating an incoming time slot delay diagram and an outgoing time slot delay diagram according to time slot delay information reported by a forwarding plane, serializing the incoming time slot delay diagram to obtain an original incoming time delay sequence, serializing the outgoing time slot delay diagram to obtain an original outgoing time delay sequence, and rounding down or up the original incoming time slot delay and the original outgoing time slot delay in the original incoming time delay sequence and the original outgoing time delay sequence to obtain an incoming time delay sequence and an outgoing time delay sequence of a corresponding network element.
Because the time delay is rounded when the incoming time delay sequence and the outgoing time delay sequence are obtained by sorting, deviation exists between each time delay difference obtained by the access time delay combination and the original time delay difference, and when the change rule of the access time delay index is obtained by the analysis, the change rule of the access time delay index of the median time delay difference is used for replacing the integral change rule, in actual use, tiny deviation exists in the change rule of the access time delay index of different time delay differences, so that when the target time delay difference exists, the unoccupied access time delay combination cannot be found, and in order to solve the problem, the following preferred implementation mode exists, namely when the unoccupied access time delay combination of the target time delay difference cannot be found, the method further comprises:
and adding or subtracting a preset deviation value from the target time delay difference to obtain a new target time delay difference, using the new target time delay difference to find an unoccupied access time delay combination corresponding to the new target time delay difference, and performing time slot allocation on the network element according to the access time delay combination.
The preset deviation value is obtained by analyzing the incoming delay sequence and the outgoing delay sequence by a person skilled in the art.
In practical use, there is also the following optional implementation manner, that is, the time slot allocation is performed on the network element according to the access delay combination, which specifically includes:
and mapping the incoming time slot delay subscript in the access time delay combination to obtain a corresponding incoming time slot number according to a first mapping relation between the incoming time slot delay subscript and the incoming time slot number.
Mapping the outbound time slot delay subscript in the access time delay combination according to a second mapping relation between the outbound time slot delay subscript and the outbound time slot number to obtain a corresponding outbound time slot number; the first mapping relation and the second mapping relation are recorded when an incoming delay sequence and an outgoing delay sequence of the corresponding network element are obtained. And allocating the incoming time slot number and the outgoing time slot number to a network element.
In summary, the above embodiments can be seen that the overall algorithm complexity of the SPN granule-oriented centralized time slot allocation method provided by the present embodiment is O (n+num×log2n), and compared with the second time slot allocation method, the present embodiment reduces the algorithm complexity by one dimension. The algorithm obtains different precision in different ranges according to the time delay difference matrix formed by different time delay maps. The actual test shows that the range of the level us is about + -and the value is positively correlated with the moving value of the algorithm and the degree of conforming to the model rule of the time delay difference matrix. The moving step number of the algorithm is equal to the dimension number of s multiplied by t, so that the complexity of the algorithm is reduced to a great extent, and the calculation efficiency is remarkably improved.
Example 2:
fig. 13 is a schematic diagram of an architecture of an SPN granule-oriented centralized slot allocation apparatus according to an embodiment of the present invention. The SPN granule oriented centralized slot allocation apparatus of this embodiment includes one or more processors 21 and a memory 22. In fig. 13, a processor 21 is taken as an example.
The processor 21 and the memory 22 may be connected by a bus or otherwise, for example in fig. 13.
The memory 22 serves as a non-volatile computer-readable storage medium that can be used to store non-volatile software programs and non-volatile computer-executable programs, such as the SPN-granule oriented centralized slot allocation method of embodiment 1. The processor 21 executes the SPN granule oriented centralized slot allocation method by running non-volatile software programs and instructions stored in the memory 22.
The memory 22 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 22 may optionally include memory located remotely from processor 21, which may be connected to processor 21 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The program instructions/modules are stored in the memory 22, which when executed by the one or more processors 21, perform the SPN small granule oriented centralized time slot allocation method of embodiment 1 described above.
It should be noted that, because the content of information interaction and execution process between modules and units in the above-mentioned device and system is based on the same concept as the processing method embodiment of the present invention, specific content may be referred to the description in the method embodiment of the present invention, and will not be repeated here.
Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the embodiments may be implemented by a program that instructs associated hardware, the program may be stored on a computer readable storage medium, the storage medium may include: read Only Memory (ROM), random access Memory (RAM, random Access Memory), magnetic or optical disk, and the like.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.