CN116364539A - Wafer thinning processing method - Google Patents

Wafer thinning processing method Download PDF

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Publication number
CN116364539A
CN116364539A CN202310346293.8A CN202310346293A CN116364539A CN 116364539 A CN116364539 A CN 116364539A CN 202310346293 A CN202310346293 A CN 202310346293A CN 116364539 A CN116364539 A CN 116364539A
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CN
China
Prior art keywords
wafer
adhesive
edge
thickness
trimming
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Pending
Application number
CN202310346293.8A
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Chinese (zh)
Inventor
张善春
王冬冬
郭雨杭
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Hefei Big Grid Technology Partnership LP
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Hefei Big Grid Technology Partnership LP
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Priority to CN202310346293.8A priority Critical patent/CN116364539A/en
Publication of CN116364539A publication Critical patent/CN116364539A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a wafer thinning processing method, which comprises the following steps: the wafer has a first face and a second face; trimming the edge of the wafer to enable the side of the first surface of the wafer to be a vertical side surface; spin-coating an adhesive on the first side to form an adhesive layer, wherein the Young's modulus value of the adhesive is 1.8GPa; the first side of the wafer is bonded to the support substrate by an adhesive layer using a wafer bonder. Trimming the edge of the wafer to prevent the edge from chipping and cracking. Then, an adhesive is spin-coated on the wafer. In the spin coating process, the adhesive at the edge portion of the wafer rises due to surface tension. This phenomenon is known as edge bead. Since the edge bead is crushed during the temporary bonding, the edge bead becomes lower than the coating state. Increasing the adhesion force compared to the target thickness results in high edge bead breakage and reduces the thickness of the peripheral portion adhesive. Therefore, the edge bead should be as low as possible to reduce wafer chipping and cracking.

Description

Wafer thinning processing method
Technical Field
The invention relates to the technical field of wafer production and processing, in particular to a wafer thinning processing method.
Background
In the integrated circuit manufacturing process, hundreds of processes are required to be performed on a wafer, and thus, a wafer having a certain thickness must be used. And after the integrated circuit fabrication is completed, the integrated circuit needs to be packaged. In the subsequent process stage before packaging the integrated circuit, the wafer (the silicon wafer with the front surface provided with the circuit) needs to be subjected to back surface thinning (backfilling) processing before subsequent dicing, pressure welding and packaging so as to reduce the packaging mounting height, reduce the packaging volume of the chip, improve the thermal diffusion efficiency, the electrical performance and the mechanical performance of the chip and reduce the processing amount of dicing.
When the wafer thickness is too thin, the wafer is subjected to severe stresses, which may lead to chipping and cracking.
Disclosure of Invention
The invention aims to solve the problem that when the thickness of a wafer is too thin, the wafer is subjected to serious stress, which may cause chipping and cracking, and provides a wafer thinning processing method.
The aim of the invention can be achieved by the following technical scheme:
a wafer thinning processing method comprises the following steps:
the wafer has a first face and a second face;
trimming the edge of the wafer to enable the side of the first surface of the wafer to be a vertical side surface;
spin-coating an adhesive on the first side to form an adhesive layer, wherein the Young's modulus value of the adhesive is 1.8GPa;
bonding a first surface of a wafer to a support substrate through an adhesive layer using a wafer bonding machine;
thinning the second surface of the wafer by using a chemical mechanical polishing process, stopping when the thickness of the wafer reaches a set first thickness in the thinning process, flushing the edge of the second surface of the wafer to remove the exposed adhesive, and continuously thinning the thickness of the wafer to a target thickness after cleaning the adhesive smeared on the periphery of the wafer;
the support substrate is de-bonded from the wafer.
As a further scheme of the invention: the vertical side of the trimming wafer margin has the following values:
the thickness of the wafer is 525 mu m;
the trimming width is 800 μm;
the trimming depth is 0-240 μm.
As a further scheme of the invention: the minimum edge bead 210 height is achieved with a trim depth of 160 μm.
As a further scheme of the invention: the first thickness in stopping when the thickness of the wafer in the thinning process reaches the set first thickness is 300 μm.
The invention has the beneficial effects that: the edge of the wafer is trimmed first to prevent the resulting edge chipping and wafer cracking. Then, an adhesive is spin-coated on the wafer. In the spin coating process, the adhesive at the edge portion of the wafer rises due to surface tension. This phenomenon is known as edge bead. Since the edge bead is crushed during the temporary bonding, the edge bead becomes lower than the coating state. Increasing the adhesion force compared to the target thickness results in high edge bead breakage and reduces the thickness of the peripheral portion adhesive. Therefore, the edge bead should be as low as possible to reduce wafer chipping and cracking.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a schematic view of a structure for trimming an edge of a wafer;
FIG. 2 is a schematic illustration of the location of an adhesive on a wafer;
FIG. 3 is a schematic view of a wafer and a support substrate;
FIG. 4 is a schematic view of the structure of a wafer after polishing and thinning;
FIG. 5 is a schematic diagram of the wafer separated from the support substrate after polishing and thinning;
fig. 6 is a schematic view of the positions of the wafer trim width and trim depth.
In the figure: 100. a wafer; 110. a first face; 120. a second face; 130. a vertical side; 200. an adhesive layer; 210. edge beads; 300. and supporting the substrate.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The first embodiment of the present invention is a wafer thinning processing method, including:
as shown in fig. 1, a wafer 100 has a first side 110 and a second side 120;
trimming the edge of the wafer 100, wherein the edge trimming (shown in the figures) may be performed using a full-automatic dicing saw model DFD6860 disco, such that the sides of the first side 110 of the wafer 100 are vertical sides 130, wherein the vertical sides 130 are trimmed to form an L-shaped right angle, and the sides of the second side 120 remain arc-shaped;
in addition to the disco full-automatic dicing saw, the arcuate side surface of the first face 110 may be cut off with a diamond grinding wheel (not shown in the drawing) to form the vertical side surface 130, and in particular, with a diamond grinding wheel having diamond particles of a smaller diameter in a diameter range of 100 μm to 1000 μm. Cutting the wafer 100 with a diamond wheel having diamond particles in the diameter ranges described above has several advantages: firstly, the diameter of diamond particles is smaller, so that a plane obtained by cutting is smoother; secondly, due to the smaller diameter of the diamond particles, the wafer 100 is not easy to crack, peel and the like in the cutting process; and thirdly, the diameter of the diamond particles is smaller, so that the particle size of the particles generated by cutting is smaller, and the particles are easy to clean in the follow-up process. Whereas if the diameter of the diamond particles is smaller, it may result in low cutting efficiency and short life. The rotation speed range of the diamond grinding wheel is 20000 rpm-40000 rpm, the diamond grinding wheel can rapidly cut the wafer 100 in the middle rotation speed range, and the temperature is not too high during cutting.
As shown in fig. 2, spin-coating an adhesive on the first side 110 with an adhesive layer 200 having a young's modulus value of 1.8GPa, wherein it is noted that the use of a relatively hard (having a higher young's modulus value) temporary adhesive minimizes chipping of the outer periphery of the wafer 100. However, relatively hard adhesives always have a low thermal resistance;
as shown in fig. 3, the first side 110 of the wafer 100 is bonded to the support substrate 300 through the adhesive layer 200 using a wafer bonder;
as shown in fig. 4, the second surface 120 of the wafer 100 is thinned by using a chemical mechanical polishing process, wherein chemical mechanical polishing is a surface global planarization technology, by means of relative movement between the wafer and the grinding head and adding an abrasive therebetween, a surface layer which is relatively easy to remove is formed by chemical reaction between the wafer surface material and the abrasive, the surface layer is polished by means of relative movement between the abrasive and the polishing pad and the abrasive and the polishing pressure in the abrasive, the thickness of the wafer 100 is stopped when reaching a set first thickness in the thinning process, and the edge of the second surface 120 of the wafer 100 is rinsed to remove the exposed adhesive, wherein the rinsing can be performed in a simple and economical manner by firstly obtaining ozone water without additional chemical supply, and only one ozone generator is needed to convert common deionized water into ozone water, thereby saving cost and reducing the safety risk caused by using chemicals. Secondly, as the components to be cleaned are mainly silicon dust particles generated after cutting, ozone water can oxidize the particles to form oxide particles which are easy to separate from the wafer 100, and then under the scrubbing action of the ozone water, the oxide particles can be removed completely, and after the adhesive smeared on the periphery of the wafer 100 is cleaned, the thickness of the wafer 100 is continuously thinned to be a target thickness.
As shown in fig. 5, the support substrate 300 is de-bonded from the wafer 100.
The second embodiment of the present invention is a wafer thinning processing method, including:
as shown in fig. 1, a wafer 100 has a first side 110 and a second side 120;
trimming the edge of the wafer 100, wherein the edge trimming (shown in the figures) may be performed using a full-automatic dicing saw model DFD6860 disco, such that the sides of the first side 110 of the wafer 100 are vertical sides 130, wherein the vertical sides 130 are trimmed to form an L-shaped right angle, and the sides of the second side 120 remain arc-shaped;
as shown in fig. 6, the vertical side 130 of the trimming wafer 100 margin has the following values: the thickness of the wafer 100 is 525 μm; the trimming width is 800 μm; the trimming depth is 0-240 μm.
In addition to the disco full-automatic dicing saw, the arcuate side surface of the first face 110 may be cut off with a diamond grinding wheel (not shown in the drawing) to form the vertical side surface 130, and in particular, with a diamond grinding wheel having diamond particles of a smaller diameter in a diameter range of 100 μm to 1000 μm. Cutting the wafer 100 with a diamond wheel having diamond particles in the diameter ranges described above has several advantages: firstly, the diameter of diamond particles is smaller, so that a plane obtained by cutting is smoother; secondly, due to the smaller diameter of the diamond particles, the wafer 100 is not easy to crack, peel and the like in the cutting process; and thirdly, the diameter of the diamond particles is smaller, so that the particle size of the particles generated by cutting is smaller, and the particles are easy to clean in the follow-up process. Whereas if the diameter of the diamond particles is smaller, it may result in low cutting efficiency and short life. The rotation speed range of the diamond grinding wheel is 20000 rpm-40000 rpm, the diamond grinding wheel can rapidly cut the wafer 100 in the middle rotation speed range, and the temperature is not too high during cutting.
As shown in fig. 2, spin-coating an adhesive on the first side 110 with an adhesive layer 200 having a young's modulus value of 1.8GPa, wherein it is noted that the use of a relatively hard (having a higher young's modulus value) temporary adhesive minimizes chipping of the outer periphery of the wafer 100. However, relatively hard adhesives always have a low thermal resistance;
as shown in fig. 3, the first side 110 of the wafer 100 is bonded to the support substrate 300 through the adhesive layer 200 using a wafer bonder;
as shown in fig. 4, the second surface 120 of the wafer 100 is thinned by using a chemical mechanical polishing process, wherein chemical mechanical polishing is a surface global planarization technology, by means of relative movement between the wafer and the grinding head and adding an abrasive therebetween, a surface layer which is relatively easy to remove is formed by chemical reaction between the wafer surface material and the abrasive, the surface layer is polished by means of relative movement between the abrasive and the polishing pad and the abrasive and the polishing pressure in the abrasive, the thickness of the wafer 100 is stopped when reaching a set first thickness in the thinning process, and the edge of the second surface 120 of the wafer 100 is rinsed to remove the exposed adhesive, wherein the rinsing can be performed in a simple and economical manner by firstly obtaining ozone water without additional chemical supply, and only one ozone generator is needed to convert common deionized water into ozone water, thereby saving cost and reducing the safety risk caused by using chemicals. Secondly, as the components to be cleaned are mainly silicon dust particles generated after cutting, ozone water can oxidize the particles to form oxide particles which are easy to separate from the wafer 100, and then under the scrubbing action of the ozone water, the oxide particles can be removed completely, and after the adhesive smeared on the periphery of the wafer 100 is cleaned, the thickness of the wafer 100 is continuously thinned to be a target thickness.
As shown in fig. 5, the support substrate 300 is de-bonded from the wafer 100.
In a third embodiment, the present invention is a wafer thinning processing method, including:
as shown in fig. 1, a wafer 100 has a first side 110 and a second side 120;
trimming the edge of the wafer 100, wherein the edge trimming (shown in the figures) may be performed using a full-automatic dicing saw model DFD6860 disco, such that the sides of the first side 110 of the wafer 100 are vertical sides 130, wherein the vertical sides 130 are trimmed to form an L-shaped right angle, and the sides of the second side 120 remain arc-shaped;
as shown in fig. 6, the vertical side 130 of the trimming wafer 100 margin has the following values: the thickness of the wafer 100 is 525 μm; the trimming width is 800 μm; the minimum edge bead 210 height is achieved with a trim depth of 160 μm.
In addition to the disco full-automatic dicing saw, the arcuate side surface of the first face 110 may be cut off with a diamond grinding wheel (not shown in the drawing) to form the vertical side surface 130, and in particular, with a diamond grinding wheel having diamond particles of a smaller diameter in a diameter range of 100 μm to 1000 μm. Cutting the wafer 100 with a diamond wheel having diamond particles in the diameter ranges described above has several advantages: firstly, the diameter of diamond particles is smaller, so that a plane obtained by cutting is smoother; secondly, due to the smaller diameter of the diamond particles, the wafer 100 is not easy to crack, peel and the like in the cutting process; and thirdly, the diameter of the diamond particles is smaller, so that the particle size of the particles generated by cutting is smaller, and the particles are easy to clean in the follow-up process. Whereas if the diameter of the diamond particles is smaller, it may result in low cutting efficiency and short life. The rotation speed range of the diamond grinding wheel is 20000 rpm-40000 rpm, the diamond grinding wheel can rapidly cut the wafer 100 in the middle rotation speed range, and the temperature is not too high during cutting.
As shown in fig. 2, spin-coating an adhesive on the first side 110 with an adhesive layer 200 having a young's modulus value of 1.8GPa, wherein it is noted that the use of a relatively hard (having a higher young's modulus value) temporary adhesive minimizes chipping of the outer periphery of the wafer 100. However, relatively hard adhesives always have a low thermal resistance;
as shown in fig. 3, the first side 110 of the wafer 100 is bonded to the support substrate 300 through the adhesive layer 200 using a wafer bonder;
as shown in fig. 4, the second surface 120 of the wafer 100 is thinned by using a chemical mechanical polishing process, wherein chemical mechanical polishing is a surface global planarization technology, by means of relative movement between the wafer and the grinding head and adding an abrasive therebetween, a surface layer which is relatively easy to remove is formed by chemical reaction between the wafer surface material and the abrasive, the surface layer is polished by means of relative movement between the abrasive and the polishing pad and the abrasive and the polishing pressure in the abrasive, the thickness of the wafer 100 is stopped when reaching a set first thickness in the thinning process, and the edge of the second surface 120 of the wafer 100 is rinsed to remove the exposed adhesive, wherein the rinsing can be performed in a simple and economical manner by firstly obtaining ozone water without additional chemical supply, and only one ozone generator is needed to convert common deionized water into ozone water, thereby saving cost and reducing the safety risk caused by using chemicals. Secondly, as the components to be cleaned are mainly silicon dust particles generated after cutting, ozone water can oxidize the particles to form oxide particles which are easy to separate from the wafer 100, and then under the scrubbing action of the ozone water, the oxide particles can be removed completely, and after the adhesive smeared on the periphery of the wafer 100 is cleaned, the thickness of the wafer 100 is continuously thinned to be a target thickness.
As shown in fig. 5, the support substrate 300 is de-bonded from the wafer 100.
In the fourth embodiment, the first thickness in the stop when the thickness of the wafer 100 in the thinning process reaches the set first thickness is 300 μm on the basis of the first embodiment, the second embodiment or the third embodiment.
The edge of the wafer 100 is first trimmed to prevent the resulting edge chipping and cracking of the wafer 100. Then, an adhesive is spin-coated on the wafer 100. In the spin coating process, the adhesive at the edge portion of the wafer 100 rises due to surface tension. This phenomenon is referred to as edge bead 210. Since the edge bead 210 is crushed during the temporary bonding, the edge bead 210 becomes lower than the coating state. Increasing the adhesion force compared to the target thickness results in the high edge bead 210 breaking and reducing the thickness of the peripheral portion adhesive. Therefore, the edge bead 210 should be as low as possible.
The foregoing describes one embodiment of the present invention in detail, but the description is only a preferred embodiment of the present invention and should not be construed as limiting the scope of the invention. All such equivalent changes and modifications as come within the scope of the following claims are intended to be embraced therein.

Claims (4)

1. A wafer thinning processing method is characterized by comprising the following steps:
the wafer has a first face and a second face;
trimming the edge of the wafer to enable the side of the first surface of the wafer to be a vertical side surface;
spin-coating an adhesive on the first side to form an adhesive layer, wherein the Young's modulus value of the adhesive is 1.8GPa;
bonding a first surface of a wafer to a support substrate through an adhesive layer using a wafer bonding machine;
thinning the second surface of the wafer by using a chemical mechanical polishing process, stopping when the thickness of the wafer reaches a set first thickness in the thinning process, flushing the edge of the second surface of the wafer to remove the exposed adhesive, and continuously thinning the thickness of the wafer to a target thickness after cleaning the adhesive smeared on the periphery of the wafer;
the support substrate is de-bonded from the wafer.
2. The method for thinning the wafer according to, wherein the vertical side of the trimming margin has a value of:
the thickness of the wafer is 525 mu m;
the trimming width is 800 μm;
the trimming depth is 0-240 μm.
3. The method of claim 2, wherein the trimming depth is 160 μm.
4. A wafer thinning processing according to any of claims 1 to 3 wherein the first thickness in stopping the thinning process when the thickness of the wafer reaches the set first thickness is 300 μm.
CN202310346293.8A 2023-04-03 2023-04-03 Wafer thinning processing method Pending CN116364539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310346293.8A CN116364539A (en) 2023-04-03 2023-04-03 Wafer thinning processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310346293.8A CN116364539A (en) 2023-04-03 2023-04-03 Wafer thinning processing method

Publications (1)

Publication Number Publication Date
CN116364539A true CN116364539A (en) 2023-06-30

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310346293.8A Pending CN116364539A (en) 2023-04-03 2023-04-03 Wafer thinning processing method

Country Status (1)

Country Link
CN (1) CN116364539A (en)

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