CN116317994A - Power-scalable transconductance operational amplifier - Google Patents

Power-scalable transconductance operational amplifier Download PDF

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CN116317994A
CN116317994A CN202310191131.1A CN202310191131A CN116317994A CN 116317994 A CN116317994 A CN 116317994A CN 202310191131 A CN202310191131 A CN 202310191131A CN 116317994 A CN116317994 A CN 116317994A
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transistor
source
gate
operational amplifier
common
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尹湘坤
李秋怡
王凌
刘术彬
朱樟明
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Xidian University
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Xidian University
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42—Modifications of amplifiers to extend the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Abstract

The invention discloses a power-scalable transconductance operational amplifier, which is formed by connecting N stages of sleeve-type cascoded differential amplifiers in parallel, wherein each stage of differential amplifier is connected with the same differential input end, the same differential output end and the same power ground, so that the bandwidth of the whole operational amplifier is increased by N times when the bandwidth is increased to be single-stage, and the thermal noise and the flicker noise are reduced to be 1/N times of the single-stage without influencing the whole open-loop gain. Each differential amplifier has two pairs of switches connected to the bias voltages of the current sources to control the turning on or off of some of the amplifiers so that the overall operational amplifier is power scalable. The operational amplifier can improve the linearity of the integrator and reduce the noise of the integrator, thereby improving the performance of the sigma-delta modulator.

Description

Power-scalable transconductance operational amplifier
Technical Field
The invention belongs to the technical field of analog integrated circuits, and particularly relates to a power-scalable transconductance operational amplifier.
Background
Analog-to-Digital Converter (ADC) plays an important role in the age of informatization today as a processing medium for Analog and digital signals. With the development of internet of things, the application of the sensor is more and more extensive, so that the high-resolution ADC is more and more favored.
In the field of sensor applications, sigma-delta ADCs are often used to improve the accuracy of signal acquisition and thus the performance of the sensor. Because most of the common sensors are used for collecting low-frequency and low-amplitude signals, such as biological signals (the frequency of human electrocardiosignals is about 0.01-250 Hz), audio signals (the frequency of sounds perceived by human ears is about 20-20000 Hz), and the like, the signals are easily interfered by low-frequency noise. In order to improve the circuit output resolution and signal-to-noise ratio, a low noise and high linearity design is required for sigma-delta modulators.
In addition to quantization noise, which affects the accuracy of the sigma-delta modulator, there are integrator noise, including switching thermal noise and operational amplifier noise, and switching thermal noise, etc. In order to ensure the precision of sigma-delta modulator, how to design an integrating operational amplifier realizing low noise and high linearity is a problem to be solved.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a power-scalable transconductance operational amplifier. The technical problems to be solved by the invention are realized by the following technical scheme:
a power-scalable transconductance operational amplifier includes N-stage identical telescopic cascode differential amplifiers connected in parallel;
the telescopic common-source common-gate differential amplifier is connected with a differential input end, a differential output end and a power ground, a pair of current tubes of the telescopic common-source common-gate differential amplifier are respectively connected with a first bias voltage and a ground end through a pair of control switches, a grid electrode of a tail current source of the telescopic common-source common-gate differential amplifier is connected with a common-mode feedback loop, and a pair of current tubes of a load of the telescopic common-source common-gate differential amplifier are respectively connected with a second bias voltage and a power supply through a pair of switch.
In one embodiment of the invention, the telescopic cascode differential amplifier comprises: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, and a ninth transistor M9;
the gate of the first transistor M1 and the gate of the fifth transistor M5 are connected to the first differential input terminal vin+ and the second differential input terminal VIN-, respectively;
the source of the first transistor M1 and the source of the fifth transistor M5 are both connected to the drain of the ninth transistor M9, the source of the ninth transistor M9 is grounded, and the gate of the ninth transistor M9 is connected to the common mode feedback loop;
the drain of the first transistor M1 is connected to the source of the second transistor M2, and the drain of the fifth transistor M5 is connected to the source of the sixth transistor M6;
the gate of the second transistor M2 and the gate of the sixth transistor M6 are connected to the first bias voltage VBN1 and the ground AGND through a pair of control switches, the drain of the second transistor M2 and the drain of the third transistor M3 are connected to the first differential output VO-, and the drain of the sixth transistor M6 and the drain of the seventh transistor M7 are connected to the second differential output vo+;
the gate of the third transistor M3 and the gate of the seventh transistor M7 are connected and respectively connected to the second bias voltage VBP2 and the power supply AVDD through a pair of switching switches;
the source of the third transistor M3 is connected to the drain of the fourth transistor M4, the source of the seventh transistor M7 is connected to the drain of the eighth transistor M8, and the gate of the fourth transistor M4 and the gate of the eighth transistor M8 are both connected to the third bias voltage VBP 1;
the source of the fourth transistor M4 and the source of the eighth transistor M8 are both connected to the power supply AVDD.
In one embodiment of the present invention, the transconductance of the N-stage telescopic cascode differential amplifier is:
G m ＝G m1 +G m2 +...+G mN ＝NG m1
wherein G is mi (i=1, 2, …, N) represents the transconductance, G, of each stage of telescopic cascode differential amplifier m1 ＝G m2 ＝…＝G mN 。
In one embodiment of the present invention, the output resistance of the N-stage identical telescopic cascode differential amplifier is:
Figure BDA0004105546420000031
wherein R is oi (i=1, 2, …, N) represents the small signal output resistance, R, of each stage of telescopic cascode differential amplifier o1 ＝R o2 ＝…＝R oN 。
In one embodiment of the invention, the open loop gain of an N-stage identical telescopic cascode differential amplifier is:
Figure BDA0004105546420000032
in one embodiment of the invention, the gain bandwidth product of the N-stage telescopic cascode differential amplifier is:
Figure BDA0004105546420000033
wherein C is L Representing the load capacitance.
In one embodiment of the invention, the slew rate of the N-stage telescopic cascode differential amplifier is:
Figure BDA0004105546420000034
wherein I is SS The tail current value of the single-stage sleeve type cascoded differential amplifier.
The invention has the beneficial effects that:
the invention can provide larger input swing amplitude, realize larger gain, realize larger phase margin and bandwidth and be beneficial to improving the resolution, stability and linearity of the circuit by adopting the sleeve type common-source common-gate differential amplifier in a single stage. The N-stage sleeve type common-source common-gate differential amplifier is connected in parallel, so that the bandwidth of the operational amplifier is improved by N times as that of a single-stage operational amplifier, and the integral thermal noise and 1/f noise are reduced by 1/N times as the original thermal noise and 1/f noise, so that the linearity and noise efficiency of the operational amplifier are further improved under the condition that the open-loop gain is not influenced, and the resolution of a sigma-delta ADC is improved. Meanwhile, the parallel series of the differential amplifier is regulated by the control switch and the change-over switch, so that the power scalability of the whole operational amplifier is realized, the noise and the bandwidth of the whole operational amplifier can be improved to a certain extent, the complexity of the structure is reduced due to the simple biasing circuit, and the influence of common-mode voltage errors can be eliminated through the arrangement of a common-mode feedback loop.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic diagram of a power-scalable transconductance operational amplifier according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a single-stage telescopic cascode differential amplifier according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a common mode feedback loop according to an embodiment of the present invention;
fig. 4 is a simplified small-signal equivalent model schematic diagram of a power-scalable transconductance operational amplifier according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but embodiments of the present invention are not limited thereto.
As shown in fig. 1 and 2, the power-scalable transconductance operational amplifier of the present invention is used in the sensor field to construct a sigma-delta ADC integrator. A power-scalable transconductance operational amplifier includes parallel N-stage identical telescopic cascode differential amplifiers AMP i I=1, 2, …, N, all MOS transistors of the operational amplifier are in the saturation region. The telescopic common-source common-gate differential amplifier is connected with a differential input end, a differential output end and a power ground, a pair of current tubes of the telescopic common-source common-gate differential amplifier are respectively connected with a first bias voltage and a ground end through a pair of control switches, a grid electrode of a tail current source of the telescopic common-source common-gate differential amplifier is connected with a common-mode feedback loop, and a pair of current tubes of a load of the telescopic common-source common-gate differential amplifier are respectively connected with a second bias voltage and a power supply through a pair of switch.
In the embodiment, the sleeve type cascode differential amplifier can provide larger input swing, realize larger gain, realize larger phase margin and bandwidth, and be beneficial to improving the resolution and stability of a circuit and improving linearity. And the circuit bias is simple, the integral operational amplifier can be biased by simply using a simple cascode current mirror, and the common mode voltage error is eliminated by introducing CMFB, so that the complexity of circuit design is reduced. Furthermore, the operational amplifier overall power is scalable: when the integral operational amplifier needs to be placed in a low-power consumption mode, the bias of the two pairs of switch control current sources of the single-stage sleeve type differential amplifier can be connected to a power supply or a ground, so that a certain single-stage amplifier is in an off state, the integral power of the operational amplifier can be scaled, and the noise and the bandwidth of the integral operational amplifier can be improved to a certain extent by adjusting the parallel stages of the operational amplifier.
The N-stage sleeve type common-source common-gate differential amplifier is connected in parallel, MOS tubes at corresponding positions of each stage are identical in size, the N-stage differential amplifier is connected in parallel, so that the bandwidth of the operational amplifier is improved to be N times of that of a single-stage operational amplifier, the integral thermal noise and 1/f noise are reduced to be 1/N times of those of the original operational amplifier, the linearity and noise efficiency of the operational amplifier are improved well under the condition that the open-loop gain is not affected, and the sigma-delta ADC resolution is improved.
Specifically, as shown in fig. 2 and 3, a telescopic cascode differential amplifier AMP i Comprising: the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9.
The grid of the first transistor M1 and the grid of the fifth transistor M5 are respectively connected with a first differential input end VIN+ and a second differential input end VIN-, the drain of the first transistor M1 is connected with the source of the second transistor M2, the drain of the fifth transistor M5 is connected with the source of the sixth transistor M6 to realize a common-source common-gate structure, the source of the first transistor M1 and the source of the fifth transistor M5 are both connected with the drain of the ninth transistor M9, the source of the ninth transistor M9 is grounded, the grid of the ninth transistor M9 is connected with a common-mode feedback loop CMFB to serve as a tail current source of the single-stage sleeve type common-source common-gate differential amplifier, the common-mode feedback adopts a switched capacitor feedback structure, and the load common-source common-gate current sources are also respectively connected with bias VBP1 and VBP2, so that a simple common-source common-gate current mirror can be used as a bias circuit for integral operation. The second transistor M2 and the sixth transistor M6 serve as a pair of current pipes, and the gate of the second transistor M2 and the gate of the sixth transistor M6 are connected to the first bias voltage VBN1 and the ground AGND through a pair of control switches S1 and S2, respectively. The drain of the second transistor M2 and the drain of the third transistor M3 are connected to the first differential output VO-, and the drain of the sixth transistor M6 and the drain of the seventh transistor M7 are connected to the second differential output vo+.
The third transistor M3 and the seventh transistor M7 serve as a pair of current pipes of a load, and the gate of the third transistor M3 and the gate of the seventh transistor M7 are connected and are connected to the second bias voltage VBP2 and the power supply AVDD through a pair of switches S3 and S4, respectively. The source of the third transistor M3 is connected with the drain of the fourth transistor M4, the source of the seventh transistor M7 is connected with the drain of the eighth transistor M8 to respectively form a load common-source common-gate current source, and the grid of the fourth transistor M4 and the grid of the eighth transistor M8 are both connected with a third bias voltage VBP 1; the source of the fourth transistor M4 and the source of the eighth transistor M8 are both connected to the power supply AVDD.
In this embodiment, the single-stage operational amplifier uses a differential amplifier structure, which can provide a larger input swing, and is beneficial to improving resolution. Because the secondary point of the sleeve type cascade structure is far away from the origin, larger phase margin can be realized; furthermore, the structure can realize higher bandwidth because Miller compensation is not used. The N-level differential amplifier is connected in parallel, so that the bandwidth of the operational amplifier is improved by N times of that of a single-stage operational amplifier, and the integral thermal noise and 1/f noise are reduced by 1/N times of that of the original operational amplifier, so that the linearity and noise efficiency of the operational amplifier are improved well under the condition of not influencing open loop gain, and the resolution of a sigma-delta ADC is improved.
The linearity and noise analysis of the operational amplifier of the present invention is as follows:
as shown in fig. 4, by half-circuit analysis, it is assumed that the equivalent transconductance of each stage of telescopic cascode differential amplifier is G mi (i=1, 2, …, N), the small signal output resistance is R oi (i=1, 2, …, N), all transconductances are added and the output resistors are connected in parallel according to the simplified small signal equivalent model schematic. Since each stage of differential amplifier has the same structure and size, G m1 ＝G m2 ＝…＝G mN ，R o1 ＝R o2 ＝…＝R oN The equivalent transconductance of the integral operational amplifier is then
G m ＝G m1 +G m2 +...+G mN ＝NG m1 (1)
The integral small signal output resistor is
Figure BDA0004105546420000071
The overall open loop gain is then
Figure BDA0004105546420000072
Under the condition of the same load, the gain bandwidth product is
Figure BDA0004105546420000073
Because the tail current source is multiplied by the parallel connection mode, the slew rate of the operational amplifier can change as follows under the condition of unchanged load
Figure BDA0004105546420000074
Wherein I is SS Is the single-stage tail current, C L Is the load capacitance. Compared with the traditional single-stage amplifier, the transconductance operational amplifier provided by the invention is connected in parallel through the N-stage sleeve type cascoded differential amplifier, the transconductance is increased by N times, the output resistance is reduced by 1/N times, and the whole open loop gain is unchanged. Because of the increase of transconductance, the gain bandwidth product is increased by N times as much as the original gain, and the gain is unchanged, so that the bandwidth is also increased by N times as much as the original bandwidth. The slew rate is also increased by a factor of N due to the multiple increase in tail current. Therefore, the linearity of the whole operational amplifier is greatly improved.
The noise analysis of the single-stage sleeve type cascoded differential amplifier and the transconductance operational amplifier provided by the invention is as follows:
the open loop gain of the single-stage sleeve type cascode differential amplifier is as follows:
A v ＝G m1 R o1 ＝g m1 [g m2 r o2 r o1 ||g m3 r o3 r o4 ](6)
Wherein g m1 、g m2 、g m3 、g m4 The transconductances of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are respectively represented; r is (r) o1 、r o2 、r o3 、r o4 Respectively represent the firstOutput resistances of the transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4.
The input reference thermal noise of the single-stage sleeve type cascoded differential amplifier is as follows:
Figure BDA0004105546420000081
wherein k is a boltzmann constant; t is the temperature; gamma is an empirical factor, typically taken as 1.
The input reference 1/f noise of the single-stage sleeve type cascoded differential amplifier is as follows:
Figure BDA0004105546420000082
wherein K is N And K P Flicker noise coefficients (WL) representing NMOS and PMOS transistors, respectively n Representing the dimensions of each transistor, i.e., the product of the channel width W and the channel length L of the transistor; c (C) ox The capacitance of the gate oxide layer in unit area is a certain determined parameter in circuit design; f is the input signal frequency.
The input reference thermal noise of the transconductance operational amplifier based on the parallel connection of the N-stage sleeve type cascoded differential amplifier is as follows:
Figure BDA0004105546420000083
the input reference 1/f noise of the transconductance operational amplifier based on the parallel connection of the N-stage sleeve type cascoded differential amplifier is as follows:
Figure BDA0004105546420000084
as shown by the analysis, the thermal noise and the 1/f noise of the transconductance operational amplifier are reduced by 1/N times, and the noise performance is improved.
In the description of the present invention, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.

Claims (7)

1. A power scalable transconductance operational amplifier comprising parallel N stages of identical telescopic cascode differential amplifiers;
the telescopic common-source common-gate differential amplifier is connected with a differential input end, a differential output end and a power ground, a pair of current tubes of the telescopic common-source common-gate differential amplifier are respectively connected with a first bias voltage and a ground end through a pair of control switches, a grid electrode of a tail current source of the telescopic common-source common-gate differential amplifier is connected with a common-mode feedback loop, and a pair of current tubes of a load of the telescopic common-source common-gate differential amplifier are respectively connected with a second bias voltage and a power supply through a pair of switch.
2. A power scalable transconductance operational amplifier according to claim 1, wherein the telescopic cascode differential amplifier comprises: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, and a ninth transistor M9;
the gate of the first transistor M1 and the gate of the fifth transistor M5 are connected to the first differential input terminal vin+ and the second differential input terminal VIN-, respectively;
the source of the first transistor M1 and the source of the fifth transistor M5 are both connected to the drain of the ninth transistor M9, the source of the ninth transistor M9 is grounded, and the gate of the ninth transistor M9 is connected to the common mode feedback loop;
the drain of the first transistor M1 is connected to the source of the second transistor M2, and the drain of the fifth transistor M5 is connected to the source of the sixth transistor M6;
the gate of the second transistor M2 and the gate of the sixth transistor M6 are connected to the first bias voltage VBN1 and the ground AGND through a pair of control switches, the drain of the second transistor M2 and the drain of the third transistor M3 are connected to the first differential output VO-, and the drain of the sixth transistor M6 and the drain of the seventh transistor M7 are connected to the second differential output vo+;
the gate of the third transistor M3 and the gate of the seventh transistor M7 are connected and respectively connected to the second bias voltage VBP2 and the power supply AVDD through a pair of switching switches;
the source of the third transistor M3 is connected to the drain of the fourth transistor M4, the source of the seventh transistor M7 is connected to the drain of the eighth transistor M8, and the gate of the fourth transistor M4 and the gate of the eighth transistor M8 are both connected to the third bias voltage VBP 1;
the source of the fourth transistor M4 and the source of the eighth transistor M8 are both connected to the power supply AVDD.
3. The power scalable transconductance operational amplifier of claim 1, wherein the transconductance of the N-stage telescopic cascode differential amplifier is:
G m ＝G m1 +G m2 +...+G mN ＝NG m1
wherein G is mi (i=1, 2, …, N) represents the transconductance, G, of each stage of telescopic cascode differential amplifier m1 ＝G m2 ＝…＝G mN 。
4. A power scalable transconductance operational amplifier according to claim 1, wherein the output resistances of the N-stage identical telescopic cascode differential amplifiers are:
Figure FDA0004105546410000021
wherein R is oi (i=1, 2, …, N) represents the small signal output resistance, R, of each stage of telescopic cascode differential amplifier o1 ＝R o2 ＝…＝R oN 。
5. A power scalable transconductance operational amplifier according to claim 1, wherein the open loop gain of the N-stage identical telescopic cascode differential amplifier is:
Figure FDA0004105546410000022
6. the power scalable transconductance operational amplifier of claim 1, wherein the gain bandwidth product of the N-stage telescopic cascode differential amplifier is:
Figure FDA0004105546410000023
wherein C is L Representing the load capacitance.
7. The power scalable transconductance operational amplifier of claim 1, wherein the slew rate of the N-stage telescopic cascode differential amplifier is:
Figure FDA0004105546410000031
wherein I is SS The tail current value of the single-stage sleeve type cascoded differential amplifier.
CN202310191131.1A 2023-03-01 2023-03-01 Power-scalable transconductance operational amplifier Pending CN116317994A (en)

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