CN116314245B - Light-emitting panel and manufacturing method thereof - Google Patents

Light-emitting panel and manufacturing method thereof Download PDF

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Publication number
CN116314245B
CN116314245B CN202310517418.9A CN202310517418A CN116314245B CN 116314245 B CN116314245 B CN 116314245B CN 202310517418 A CN202310517418 A CN 202310517418A CN 116314245 B CN116314245 B CN 116314245B
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light
type
electrode
epitaxial layer
emitting
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CN116314245A (en
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陈良键
温海键
岳大川
蔡世星
林立
李小磊
伍德民
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Shenzhen Aoshi Micro Technology Co Ltd
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Shenzhen Aoshi Micro Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The disclosure relates to the technical field of display, in particular to a light-emitting panel and a manufacturing method thereof. The light-emitting panel comprises an N-type semiconductor epitaxial layer, a light-emitting epitaxial layer, a P-type electrode, an N-type electrode, a first insulating layer and a second insulating layer; a bowl-shaped first groove and a netlike second groove are formed on the N-type semiconductor epitaxial layer; the light-emitting epitaxial layer and the P-type electrode are formed in the first groove, and the light-emitting epitaxial layer is located between the N-type semiconductor epitaxial layer and the P-type electrode; the N-type electrode and the second insulating layer are formed in the second groove, and the N-type electrode is located between the N-type semiconductor epitaxial layer and the second insulating layer; the first insulating layer covers the light emitting epitaxial layer, the P-type electrode and the second insulating layer. According to the technical scheme, the damage to the side wall of the step can be effectively avoided, and the light efficiency is improved.

Description

Light-emitting panel and manufacturing method thereof
Technical Field
The disclosure relates to the technical field of display, in particular to a light-emitting panel and a manufacturing method thereof.
Background
As Micro projectors and wearable devices are increasingly being put into real production and life, micro light emitting diodes (Micro Light Emitting Diode, micro-LEDs), and organic light emitting diodes (Organic Micro Light Emitting Diode, OLED) are becoming more and more widely used in the field of display technology.
The silicon-based LED chip mainly comprises a silicon substrate, an epitaxial layer, an N-type electrode, a P-type electrode, a protective layer and the like, and the Micro-LED chip is prepared by etching the epitaxial layer on a large wafer by adopting a photoetching process to manufacture steps (Mesa), and then manufacturing the P-type electrode and the N-type electrode on the steps respectively to form each independent light-emitting unit. In the prior art, with the reduction of the step size in the Micro-LED, the damage phenomenon of the step side wall is aggravated, more side wall defects are formed, and the problem of reducing the light efficiency is caused.
Disclosure of Invention
In order to solve the technical problems or at least partially solve the technical problems, the disclosure provides a light-emitting panel and a manufacturing method thereof, which can effectively avoid damage to the side wall of a step and improve the light efficiency.
In a first aspect, embodiments of the present disclosure provide a light emitting panel, including: the light-emitting diode comprises an N-type semiconductor epitaxial layer, a light-emitting epitaxial layer, a P-type electrode, an N-type electrode, a first insulating layer and a second insulating layer;
a bowl-shaped first groove and a netlike second groove are formed on the N-type semiconductor epitaxial layer;
the light-emitting epitaxial layer and the P-type electrode are formed in the first groove, and the light-emitting epitaxial layer is located between the N-type semiconductor epitaxial layer and the P-type electrode;
the N-type electrode and the second insulating layer are formed in the second groove, and the N-type electrode is located between the N-type semiconductor epitaxial layer and the second insulating layer;
the first insulating layer covers the light emitting epitaxial layer, the P-type electrode and the second insulating layer.
In some embodiments, the second insulating layer has a higher coefficient of thermal expansion than the N-type semiconductor epitaxial layer.
In some embodiments, the second insulating layer has a coefficient of thermal expansion greater than 6×10 -6 /K。
In some embodiments, the N-type semiconductor epitaxial layer is N-type GaN, and the second insulating layer is Al 2 O 3
In some embodiments, the first insulating layer is formed with a P-electrode via hole in a central light emitting region of the light emitting panel, and the P-type electrode extends to an outer surface of the first insulating layer through the P-electrode via hole.
In some embodiments, the first insulating layer and the second insulating layer are formed with N-electrode through holes in edge electrode regions of the light emitting panel, and the N-type electrodes extend to the outer surface of the first insulating layer through the N-electrode through holes.
In a second aspect, an embodiment of the present disclosure further provides a method for manufacturing a light emitting panel, including:
forming an N-type semiconductor epitaxial layer on a silicon substrate;
forming a plurality of bowl-shaped first grooves on the N-type semiconductor epitaxial layer by utilizing a photoetching process;
sequentially forming a light-emitting epitaxial material and a P-type metal, etching the light-emitting epitaxial material and the P-type metal outside the first groove, and forming a light-emitting epitaxial layer and the P-type metal in the first groove;
depositing a first insulating material;
etching the first insulating material and the N-type semiconductor epitaxial layer to form a netlike second groove;
sequentially forming N-type metal and a second insulating material, etching the N-type metal and the second insulating material outside the second groove, and forming an N-type metal and a second insulating layer in the second groove;
depositing a first insulating material, etching the first insulating material in the central light-emitting area of the light-emitting panel to form a P electrode through hole, and filling P type metal in the P electrode through hole to form a P type electrode;
and etching the first insulating material and the second insulating material in the edge electrode area of the light-emitting panel to form an N electrode through hole, and filling N-type metal in the N electrode through hole to form an N-type electrode.
In some embodiments, the method of making further comprises:
bonding with the drive substrate and removing the silicon substrate.
In some embodiments, the second insulating material has a higher coefficient of thermal expansion than the N-type semiconductor epitaxial layer.
In some embodiments, the N-type semiconductor epitaxial layer is N-type GaN, and the second insulating material is Al 2 O 3
The light emitting panel provided by the embodiment of the disclosure comprises: the light-emitting diode comprises an N-type semiconductor epitaxial layer, a light-emitting epitaxial layer, a P-type electrode, an N-type electrode, a first insulating layer and a second insulating layer; a bowl-shaped first groove and a netlike second groove are formed on the N-type semiconductor epitaxial layer; the light-emitting epitaxial layer and the P-type electrode are formed in the first groove, and the light-emitting epitaxial layer is positioned between the N-type semiconductor epitaxial layer and the P-type electrode; the N-type electrode and the second insulating layer are formed in the second groove, and the N-type electrode is positioned between the N-type semiconductor epitaxial layer and the second insulating layer; the first insulating layer covers the light emitting epitaxial layer, the P-type electrode and the second insulating layer. In the bowl-shaped first groove, the luminous epitaxial layer and the P-type electrode are bowl-shaped, so that the side wall area of the step of the luminous epitaxial layer is reduced, side wall damage can be effectively avoided, and the light efficiency is improved. Compared with the existing square light-emitting epitaxial layer, the bowl-shaped light-emitting epitaxial layer also greatly improves the light-emitting area and the light-emitting angle, and further improves the light efficiency. In addition, the bowl-shaped P-type electrode and the net-shaped N-type electrode can balance the current in the luminous epitaxial layer, and further improve the photoelectric conversion efficiency.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
In order to more clearly illustrate the embodiments of the present disclosure or the solutions in the prior art, the drawings that are required for the description of the embodiments or the prior art will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
FIG. 1 is a schematic diagram of a conventional light-emitting panel;
fig. 2 is a schematic plan view of a light-emitting panel according to an embodiment of the disclosure;
FIG. 3 is a schematic cross-sectional view of a light-emitting panel according to an embodiment of the disclosure;
fig. 4a to fig. 4i are process flow diagrams of a method for manufacturing a light-emitting panel according to an embodiment of the disclosure.
Detailed Description
In order that the above objects, features and advantages of the present disclosure may be more clearly understood, a further description of aspects of the present disclosure will be provided below. It should be noted that, without conflict, the embodiments of the present disclosure and features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced otherwise than as described herein; it will be apparent that the embodiments in the specification are only some, but not all, embodiments of the disclosure.
Fig. 1 is a schematic structural diagram of a conventional light emitting panel, in which a Micro-LED chip is prepared, firstly, a GaN epitaxial layer 03 and a light emitting epitaxial layer 04 are deposited on a silicon substrate 01 and a buffer layer 02, then, etching is performed by using a photolithography process to manufacture steps, and then, P-type electrode 05 and N-type electrode 06 are respectively manufactured on and under the steps to form each independent light emitting unit, wherein the following problems exist in the prior art:
(1) as the step size in Micro-LEDs decreases (less than 10 μm), step sidewall damage is exacerbated, forming more sidewall defects, resulting in reduced light efficiency;
(2) because the refractive index of the epitaxial layer material is far greater than that of air, when the size of the Micro-LED chip is reduced, the light emitting angle of the light emitting layer is also reduced, so that the total reflection at the interface is enhanced, and the light extraction efficiency of the LED is reduced;
(3) the size is reduced, the current crowding phenomenon is easy to occur, and the light efficiency is reduced;
(4) when the GaN epitaxial layer is deposited on the silicon substrate, larger tensile stress is generated in the GaN epitaxial layer, so that stress defects are brought, the light efficiency is reduced, and the GaN epitaxial layer is easy to break in the subsequent process.
According to the light-emitting panel provided by the embodiment of the disclosure, the bowl-shaped first groove is formed, and then the light-emitting epitaxial layer and the P-type electrode are bowl-shaped, so that the area of the side wall of the step of the light-emitting epitaxial layer is reduced, the damage to the side wall can be effectively avoided, and the light efficiency is improved. Compared with the existing square light-emitting epitaxial layer, the bowl-shaped light-emitting epitaxial layer also greatly improves the light-emitting angle and further improves the light efficiency. In addition, the bowl-shaped P-type electrode and the net-shaped N-type electrode can balance the current in the luminous epitaxial layer, and further improve the photoelectric conversion efficiency.
The light emitting panel and the method for manufacturing the light emitting panel according to the embodiments of the present disclosure are described below with reference to the accompanying drawings.
Fig. 2 is a schematic plan view of a light emitting panel according to an embodiment of the present disclosure, and fig. 3 is a schematic cross-sectional view of a light emitting panel according to an embodiment of the present disclosure. As shown in fig. 2 and 3, a light emitting panel provided in an embodiment of the present disclosure includes an N-type semiconductor epitaxial layer 3, a light emitting epitaxial layer 4, a P-type electrode 5, an N-type electrode 6, a first insulating layer 7, and a second insulating layer 8. An N-type semiconductor epitaxial layer is generally formed on the silicon substrate 1 and the buffer layer 2, and a bowl-shaped first groove and a net-shaped second groove are formed on the N-type semiconductor epitaxial layer 3; the light-emitting epitaxial layer 4 and the P-type electrode 5 are formed in the first groove, and the light-emitting epitaxial layer 4 is positioned between the N-type semiconductor epitaxial layer 3 and the P-type electrode 5; an N-type electrode 6 and a second insulating layer 8 are formed in the second groove, and the N-type electrode 6 is located between the N-type semiconductor epitaxial layer 3 and the second insulating layer 8; the first insulating layer 7 covers the light emitting epitaxial layer 4, the P-type electrode 5, and the second insulating layer 8.
In the first recess of bowl form, luminous epitaxial layer 4 and P type electrode 5 are bowl form too, and luminous epitaxial layer 4 contains many quantum well layer, electric current expansion layer, P type semiconductor, P ohmic contact layer, compares in prior art, and the lateral wall area of bowl form luminous epitaxial layer 4 step reduces, can effectively avoid the lateral wall damage to improve the light efficiency. Compared with the conventional square light-emitting epitaxial layer 4, the bowl-shaped light-emitting epitaxial layer 4 also greatly improves the light-emitting area and the light-emitting angle, and further improves the light efficiency. In addition, the bowl-shaped P-type electrode 5 and the net-shaped N-type electrode 6 can balance the current in the light-emitting epitaxial layer 4, and further improve the photoelectric conversion efficiency.
In some embodiments, the second insulating layer 8 has a higher coefficient of thermal expansion than the N-type semiconductor epitaxial layer 3. The N-type GaN epitaxial layer is usually selected as the N-type GaN epitaxial layer 3, and in the process of manufacturing the light-emitting panel, the N-type GaN epitaxial layer needs to be deposited on the silicon substrate 1, and a larger tensile stress is generated inside the N-type GaN epitaxial layer, so that stress defects are brought, the light efficiency is reduced, and the light efficiency is easy to break in the subsequent process. And the meshed second grooves are filled with a material with a higher thermal expansion coefficient to serve as the second insulating layer 8, so that compressive stress can be generated in the N-type GaN epitaxial layer, and the larger tensile stress in the N-type GaN epitaxial layer can be relieved.
In some embodiments, the second insulating layer 8 has a coefficient of thermal expansion greater than 6×10 -6 and/K. GaN has a thermal expansion coefficient of 5.59X10 -6 and/K, thus having a coefficient of thermal expansion greater than 6X 10 -6 The material of/K is used as the second insulating layer 8, so that enough compressive stress can be generated in the N-type GaN epitaxial layer, and the larger tensile stress in the N-type GaN epitaxial layer can be effectively relieved.
In some embodiments, the N-type semiconductor epitaxial layer 3 is N-type GaN and the second insulating layer 8 is Al 2 O 3 。Al 2 O 3 Can reach a thermal expansion coefficient of 7.7X10 -6 K, and has insulating properties, al 2 O 3 As the second insulating layer 8 for covering the N-type electrode 6, not only can the stable insulating and protecting effects be achieved, but also enough compressive stress can be generated on the N-type GaN epitaxial layer, and the N-type GaN epitaxial layer can be effectively relievedThe tensile stress inside the layer is large.
In some embodiments, the first insulating layer 7 is formed with a P-electrode through hole in the central light emitting region of the light emitting panel, the P-type electrode 5 extends to the outer surface of the first insulating layer 7 through the P-electrode through hole, and the P-type electrode 5 may be electrically connected to an external driving circuit through the P-electrode through hole, and a potential required for light emission is input to the P-type electrode 5.
In some embodiments, the first insulating layer 7 and the second insulating layer 8 are formed with N-electrode through holes in the edge electrode region of the light emitting panel, the N-type electrode 6 extends to the outer surface of the first insulating layer 7 through the N-electrode through holes, and the N-type electrode 6 may be electrically connected to an external driving circuit through the N-electrode through holes, and a potential required for light emission is input to the N-type electrode 6.
The embodiment of the disclosure also provides a manufacturing method of the light-emitting panel, which comprises the following steps:
step A: an N-type semiconductor epitaxial layer is formed on a silicon substrate.
As shown in fig. 4a, a buffer layer 2 is formed on a silicon substrate 1, and an N-type semiconductor epitaxial layer 3 is formed on the buffer layer 2. The N-type semiconductor epitaxial layer 3 may be an N-type GaN layer having a thickness of about 2-4 μm.
And (B) step (B): and forming a plurality of bowl-shaped first grooves on the N-type semiconductor epitaxial layer by utilizing a photoetching process.
As shown in fig. 4b, a plurality of bowl-shaped first grooves 30 are formed on the N-type GaN layer by using a photolithography process, and the depth of the first grooves 31 is about 5000 a.
Step C: the light-emitting epitaxial material and the P-type metal are sequentially formed, the light-emitting epitaxial material and the P-type metal outside the first groove are etched away, and the light-emitting epitaxial layer 4 and the P-type metal 50 are formed in the first groove.
As shown in fig. 4c, on the basis of the step B, a light emitting epitaxial material and a P-type metal are formed, specifically including a multiple quantum well layer, a current expanding layer, a P-type semiconductor, a P-ohmic contact layer and a P-type metal. And then etching out the luminescent epitaxial material and the P-type metal outside the first groove, stopping on the surface of the N-type GaN layer, and forming the bowl-shaped luminescent epitaxial layer 4 and the P-type metal 50.
Step D: a first insulating material is deposited.
As shown in fig. 4d, a layer of a first insulating material 70 is deposited on the basis of step C, protecting the light emitting epitaxial layer 4 and the P-type metal 50. The first insulating material 70 may be SiO 2 And a thickness of about 500 a.
Step E: etching the first insulating material and the N-type semiconductor epitaxial layer to form a netlike second groove.
As shown in fig. 4e, the first insulating material and the N-type GaN layer are etched to form a second recess 32, having a depth of about 7500 a. The second grooves 32 specifically include a mesh-shaped second groove located in the central light emitting region, and a second groove for subsequent bonding (bonding) located in the edge electrode region.
Step F: and sequentially forming N-type metal and a second insulating material, etching the N-type metal and the second insulating material outside the second groove, and forming an N-type metal and a second insulating layer in the second groove.
As shown in fig. 4f, on the basis of step E, N-type metal 60 and second insulating material 80 are sequentially deposited, N-type metal 60 and second insulating material 80 outside the second recess are etched away, and N-type metal 60 and second insulating material 80 are formed in the second recess.
In some embodiments, the second insulating material has a higher coefficient of thermal expansion than the N-type GaN layer. By adopting the material with higher thermal expansion coefficient as the second insulating layer, compressive stress can be generated in the N-type GaN epitaxial layer, and the larger tensile stress in the N-type GaN epitaxial layer can be relieved.
In some embodiments, the second insulating material is Al 2 O 3 ,Al 2 O 3 Can reach a thermal expansion coefficient of 7.7X10 -6 and/K, not only can play a role in stable insulation and protection, but also can generate enough compressive stress in the N-type GaN epitaxial layer, and effectively relieve larger tensile stress in the N-type GaN epitaxial layer.
Step G: depositing a first insulating material, etching the first insulating material in the central light-emitting area of the light-emitting panel to form a P electrode through hole, and filling P type metal in the P electrode through hole to form a P type electrode;
as shown in FIG. 4g, a further layer is deposited on the basis of step FSiO 2 And step D deposited SiO 2 Stacked together, a first insulating layer 7 having a thickness of about 2 μm is formed. Then, the first insulating material is etched in the central light emitting region to form a P-electrode through hole 51, and P-type metal is filled in the P-electrode through hole to form a P-type electrode 5.
Step H: and etching the first insulating material and the second insulating material in the edge electrode area of the light-emitting panel to form an N electrode through hole, and filling N-type metal in the N electrode through hole to form an N-type electrode.
As shown in fig. 4h, on the basis of step G, the first insulating material and the second insulating material are etched in the edge electrode region to form an N-electrode via 61, and the N-electrode via is filled with N-type metal to form a pattern of the N-type electrode 6 and the second insulating layer 8.
In some embodiments, the method of making further comprises:
step I: bonding with the drive substrate and removing the silicon substrate.
As shown in fig. 4i, the light emitting panel and a CMOS (Complementary Metal-Oxide-Semiconductor) driving substrate are bonded together, and the silicon substrate is removed, thereby manufacturing a Micro-LED device.
The manufacturing method of the light-emitting panel provided by the disclosure has the same technical characteristics as the light-emitting panel provided by the disclosure, so that the same technical problems can be solved, and the same technical effects can be achieved.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
The above is merely a specific embodiment of the disclosure to enable one skilled in the art to understand or practice the disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (8)

1. A light-emitting panel, comprising: the semiconductor device comprises an N-type semiconductor epitaxial layer, a light-emitting epitaxial layer, a P-type electrode, an N-type electrode, a first insulating layer and a second insulating layer, wherein the thermal expansion coefficient of the second insulating layer is higher than that of the N-type semiconductor epitaxial layer;
a bowl-shaped first groove and a netlike second groove are formed on the N-type semiconductor epitaxial layer;
the light-emitting epitaxial layer and the P-type electrode are formed in the first groove, and the light-emitting epitaxial layer is located between the N-type semiconductor epitaxial layer and the P-type electrode;
the N-type electrode and the second insulating layer are formed in the second groove, the N-type electrode is located between the N-type semiconductor epitaxial layer and the second insulating layer, and the P-type electrode is located in the net holes of the net-shaped N-type electrode; the first insulating layer covers the light emitting epitaxial layer, the P-type electrode and the second insulating layer.
2. The light-emitting panel according to claim 1, wherein a thermal expansion coefficient of the second insulating layer is greater than 6 x 10 "6/K.
3. The light-emitting panel according to claim 1, wherein the N-type semiconductor epitaxial layer is N-type GaN and the second insulating layer is Al2O3.
4. The light-emitting panel according to claim 1, wherein the first insulating layer is formed with a P-electrode through-hole in a central light-emitting region of the light-emitting panel, and the P-type electrode extends to an outer surface of the first insulating layer through the P-electrode through-hole.
5. The light-emitting panel according to claim 1, wherein the first insulating layer and the second insulating layer are formed with N-electrode through holes in an edge electrode region of the light-emitting panel, and the N-type electrodes extend to an outer surface of the first insulating layer through the N-electrode through holes.
6. A method of manufacturing a light emitting panel, comprising:
forming an N-type semiconductor epitaxial layer on a silicon substrate;
forming a plurality of bowl-shaped first grooves on the N-type semiconductor epitaxial layer by utilizing a photoetching process; sequentially forming a light-emitting epitaxial material and a P-type metal, etching the light-emitting epitaxial material and the P-type metal outside the first groove, and forming a light-emitting epitaxial layer and the P-type metal in the first groove; depositing a first insulating material;
etching the first insulating material and the N-type semiconductor epitaxial layer to form a netlike second groove; sequentially forming N-type metal and a second insulating material, etching the N-type metal and the second insulating material outside the second groove, and forming an N-type metal and a second insulating layer in the second groove, wherein the thermal expansion coefficient of the second insulating material is higher than that of the N-type semiconductor epitaxial layer;
depositing a first insulating material, etching the first insulating material in the central light-emitting area of the light-emitting panel to form a P electrode through hole, and filling P type metal in the P electrode through hole to form a P type electrode;
and etching the first insulating material and the second insulating material in the edge electrode area of the light-emitting panel to form an N electrode through hole, filling N type metal in the N electrode through hole to form an N type electrode, wherein the P type electrode is positioned in the net holes of the net type N type electrode.
7. The method of manufacturing a light-emitting panel according to claim 6, further comprising:
bonding with the drive substrate and removing the silicon substrate.
8. The method of manufacturing a light-emitting panel according to claim 6, wherein the N-type semiconductor epitaxial layer is N-type GaN, and the second insulating material is Al2O3.
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