CN1163006C - Configurable W-CDMA multipath alignment method and device - Google Patents

Abstract

The present invention discloses a multipath alignment method in an RAKE receiver adopted in a demodulation process of a WCDMA dedicated physical channel and a multipath alignment device which uses the method. In order to realize the demodulation of the WCDMA dedicated physical channel, the present invention provides a configurable WCDMA user multipath alignment device. The device has the function of realizing the multipath alignment on time for a user, which provides a prerequisite for RAKE combination. The alignment has the meaning that in the combination process, corresponding data of each path is mutually aligned for time. On circuit logic, if paths are processed in order, the data symbol of each path obtained in a processing period is the same data symbol corresponding to the original end. After the multipath data is buffered, the multipath alignment can be ensured by the collocation of the offset of multipath data output. A plurality of adjacent chip data of one path can be simultaneously obtained according to the requirement. The multipath alignment range is relevant to a heavy load point (the datum of multipath alignment) in the alignment, and the multipath time difference.

Description

Configurable W-CDMA multipath alignment schemes and device

(1) technical field:

The present invention relates to WCDMA in the 3G (Third Generation) Moblie (Wideband Code Division Multiple Access (WCDMA)) system, relate generally to the apparatus and method that multipath aligns in the downward special physical channel demodulating process among the mobile communication system WCDMA specifically.

(2) background technology:

It is substantially the most also to be most crucial part in the DPCH demodulation that the RAKE of multipath merges.Each frequency range in radio communication always exists a large amount of various types of multipaths interference.Anti-multipath interference for a long time is a problem that is difficult to solve all the time.The method of generally taking is the eliminating interference and turns bane into boon.The former imagination is that the strongest useful signal is separated, and gets rid of the interference signal that other paths are come, the basic ideas of employing diversity technique that Here it is.The latter's imagination is a signal that the difference that different paths are come is postponed at receiving terminal from the time addition of aliging, and is merged into stronger useful signal, Here it is basic thought that so-called RAKE merges.RAKE merges can effectively solve the multipath interference problem.General receiver is used as multipath to disturb and is treated, and RAKE receiver has been utilized the multipath composition, thereby has improved systematic function.

In merging processing, unlike signal input weighting respectively is accumulated in together then

r(t)＝α ₁r ₁(t)+α ₂r ₂(t)+……+α _Mr _M(t)

$r\left(t\right)=\underset{i=1}{\overset{M}{\mathrm{\Σ}}}{a}_i{r}_i\left(t\right)$

R wherein _i(t) be the envelope of i signal, α _iIt is the weighted factor of i signal.

It is exactly to make phase alignment between each bar footpath (making it relevant mutually) when merging that high specific merges, thereby realizes coherent superposition, utilizes the energy of signal to greatest extent, further improves signal to noise ratio.Weighted factor is the square root of the signal to noise ratio of each road signal, promptly

$r\left(t\right)=\underset{i=1}{\overset{M}{\mathrm{\Σ}}}\sqrt{{\mathrm{SNR}}_i}{r}_i\left(t\right)$

SNR wherein _iIt is the signal to noise ratio of i road signal.It is each road input signal signal to noise ratio sum that high specific merges its output signal-to-noise ratio of back, promptly

$\mathrm{SNR}=\underset{i=1}{\overset{M}{\mathrm{\Σ}}}{\mathrm{SNR}}_i$

(3) summary of the invention:

A kind of simple in structure, the device that disposal ability is strong that the objective of the invention is to propose a kind of method of the WCDMA of being used for DPCH demodulation RAKE receiver multipath alignment and adopt this method.

In fact the RAKE that is adopted in the travelling carriage DPCH demodulating process merges is exactly that a kind of high specific merges.In multipath RAKE merging process, at first will be with the effective multipath alignment of each bar of same user, so-called those footpaths that in the search procedure of multipath, are defined as being used for demodulation that effectively are meant.Finish after the alignment, just the data on the relevant position of same user's Different Diameter can be merged, the energy in each bar footpath is merged, thereby realize optimum the merging, to reach the purpose that improves signal to noise ratio.

The multipath main search section that relies on of determining of position in time assigns to finish, search unit carries out relevant with user's the channel code and the XOR of scrambler the signal of receiving on different positions, by the judgement of correlated results being determined the position of multipath, and determine that those multipaths can be used for demodulation (get correlated results maximum and greater than those footpaths of threshold value), and Search Results is notified to demodulating unit.

In multipath RAKE merging process, at first will be with the effective multipath alignment of each bar of same user, so-called those footpaths that in the search procedure of multipath, are defined as being used for demodulation that effectively are meant.Finish after the alignment, just the data on the relevant position of same user's Different Diameter can be merged, the energy in each bar footpath is merged, thereby realize optimum the merging, to reach the purpose that improves signal to noise ratio.

Configurable WCDMA multipath alignment schemes is characterised in that caching function by the configuration using RAM of parameter is with the output of aliging of the corresponding data of each bar multipath on the processing time.The configuration of described multipath parameter is according in the position of the resulting multipath of Multipath searching and the data processing information that requires of multipath snap point position being calculated, result of calculation being configured in the control register.The multipath information register is the read/write address of control RAM, thereby finishes alignment.Align as required multipath maximum number and need the scope of alignment to determine the number and the degree of depth of RAM, control its read/write address by configuration multipath control register, the time difference of utilizing data to write and reading is finished locational each other alignment, the maximum number of supposing the alignment multipath is 4, the scope of alignment is 256chip, because data sampling adopts 4 times of chip speed, I, Q two paths of data respectively are that 6bit is wide, so adopting the RAM degree of depth is 1024, width is 12.Handle according to the user as the configuration information of multipath multipath snap point position, and the snap point information that promptly belongs to same footpath is identical.The requirement of multipath snap point position can be arbitrarily, promptly can be with the position of any 1/4chip precision snap point as multipath.

The function of this device is to finish the 1/4CHIP precision alignment of multipath.The datum mark of alignment is set to system, and (128 * N) chip places then need only multipath difference in time and are no more than 120chip, then all can finish alignment in regularly.Under 16 times of chip clocks, can support 64 multipaths at most.

The structure of this device is as shown in Figure 1: inner key structure is the dual port RAM of 4 1024*12.

The input/output port of this device:

Input:

--the clock system clock

--reset is system asynchronous to be resetted

--Isig is through the I road A/D of buffering input, and speed is 4 times of chip speed

--Qsig is through the Q road A/D of buffering input, and speed is 4 times of chip speed

--frame_start RAM write address counting synchronizing signal, the cycle is the integral multiple of 1024clock, the positive pulse of 1clock width

--path is from the multipath label of code generator, the count signal of cycle 64clock

--lockaddr RAM write address locking signal, cycle 64clock, the positive pulse of 1clock width

--the skew of offset multipath, corresponding with path, data keep 1clock output:

--continuous 4 chip in Iout4chip I road (6bit/chip, low level chip are preceding, and high-order chip is in the back)

--continuous 4 chip in Qout4chipQ road (6bit/chip, low level chip are preceding, and high-order chip is in the back)

Beneficial effect of the present invention: configurable W-CDMA multipath alignment schemes and apparatus structure are simple, and disposal ability is strong.

(4) description of drawings:

Fig. 1 is the structure chart of Prebuffer module;

Fig. 2 is the schematic diagram of multi-path location counterweight loading point influence;

(5) embodiment:

The I of the DPDCH that RAM reads outside sheet, Q two paths of data are 6BIT, are merged into 12BIT (the I circuit-switched data is at height, and the Q road is low) earlier, write 4 RAM in the sheet more simultaneously.The write address of 4 RAM differs 4 successively, the production method of concrete write address is: produce through Framestart synchronous counter cnt16 and cnt256 by two, wherein cnt16 is one 4 a counter, cnt256 is one 8 a counter, but cnt256 except that be subjected to Framestart synchronously, also 4 overall heights with cnt16 serve as that counting enables.Simultaneously, 4 overall heights of cnt16, still the wide shift register of 8BIT enables, everybody of shift register is respectively from low to high: cnt156, cnt256-d1, cnt256-d2, cnt256-d3, and they are respectively the most-significant bytes of 4 RAM write addresses, and low 2 of the write address of 4 RAM are identical, high 2 for cnt16.Make the write address between 4 RAM differ from 4 successively like this.And the writing of 4 RAM enable to be when cnt16 low 2 effective when low, like this, make 4 to clap and write data, owing to be 16 times of clocks, so also embodied 4 samplings.

The address of reading of 4 RAM is identical because the address when writing RAM is to differ from 4 successively, so concerning each directly, what read all is the data of the 4CHIP that faces mutually.The production method of reading the address is: when Prebuf_lock was ' 1 ', the address was read in the reference that RAM0 write address at that time added in 32 conduct 4CHIP time periods at that time, and 4 RAM read address ram-ra by adding that with reference to reading the address skew at place, footpath gets final product.

12 data that to read from 4 RAM by I, Q road separately obtain the 24BIT data on I road and the Q road of 4CHIP respectively, with these 24 by the position of loweing that arrives first, after to the high position of putting organize, promptly draw the adjacent 4CHIP data on continuous I road and Q road.

Configuration information mainly comprises the offset address when multipath heavy duty point (being the datum mark of user's multipath alignment) and data are read.These two parameters obtain according to Search Results, can obtain the position of multipath by search, can determine heavily loaded point according to its position, utilize the calculations of offset of heavy duty point and footpath physical location to go out offset address.When reading the data in each footpath, can obtain corresponding data as long as give aligning apparatus with offset address.

Per 64 clap and write address can be latched as benchmark when initial in this device, add on this basis (offset address in each bar footpath of 32+) promptly for this reason the footpath read the address.So just utilize the buffer memory effect of this device to finish alignment between same user's Different Diameter.Because 16 times of clocks so a processing cycle is 64 bats, are adopted in 64 footpaths of maximum support, then the cycle is 4chip, and each bar footpath is output as the data of adjacent 4chip.

User's multipath positions aligning be system regularly in (128 * N) chip (and N=0,1 ... .299).User's multipath with respect to DPDCH demodulation part system regularly the skew of frame head be (256 * n+x) chip, n=0 wherein, 1 ... 149, x is the propagation delay of multipath, its value can be greater than 256.Be positioned at that (situation on 256 * n) chip both sides then can't snap to it (256 * n) chip places, and (in 128 * N) chips, can find a N value, make on this position can finish alignment if several multipaths of user take place this moment.Because the actual grade of aligning apparatus is 248chip, so, then all can find a suitable N value to finish alignment as long as peak excursion is no more than 120chip between user's multipath.

Before a new user data was prepared demodulation, configuration module if there are two N values to satisfy condition simultaneously, was then selected from the heavily loaded point of multipath that conduct far away when determining the heavily loaded point (being the N value) of this user's multipath.If multipath drifts about forward, then keep the heavy duty point constant as far as possible, if waft backward, then select heavily loaded point far away, but should be noted that and do not make new heavy duty point before old.Doing like this is in order to prevent that multipath from drifting about forward, to have crossed heavily loaded point, makes new heavy duty point before old, understands obliterated data like this in demodulation.As shown in Figure 2.

This moment when the old frame of demodulation, the data that can lose last 128chip.

The multipath data are read determining and can obtaining according to following formula of hour offset value, if the heavy duty point is for (128 * N) chip, multi-path location are that (128 * N+n+m/4) chip, then side-play amount is (n * 4-31+m).

So just, can realize the configurable alignment of multipath.

Claims (6)

1. configurable WCDMA multipath alignment schemes, it is characterized in that: after search obtains user's multi-path location, determine this user's multipath snap point in time, utilize the time delay extend information of the multipath that this snap point and search obtain to calculate the side-play amount that reads in each footpath, with this side-play amount as parameter configuration in the control register of this device, this device is according to the parameter of configuration, inner in good time data read base address and data write the address, the caching function that utilizes internal RAM is with the output of align on the processing time of each corresponding data in footpath of this user, so that finish the RAKE merging.

2. configurable WCDMA multipath alignment schemes as claimed in claim 1, it is characterized in that: the inner buffer memory work of finishing data with 4 block RAMs, the degree of depth of RAM can be according to the maximum delay expansion of multipath, promptly needed maximum alignment scope, and the sampling precision of data is determined, if maximum delay expands to t chip, sampling precision is 1/s chip, and then the RAM degree of depth is t * s, expands to 256chip as maximum delay, sampling precision is 1/4chip, promptly s=4 then the RAM degree of depth be 1024.

3. configurable WCDMA multipath alignment schemes as claimed in claim 1, it is characterized in that: data order successively write, and write address increases in proper order, and data parallel writes among inner 4 Ram, address with RAM0 is a benchmark, and the address that writes of other 3 block RAMs falls behind 4 successively.

4. configurable WCDMA multipath alignment schemes as claimed in claim 1; it is characterized in that: it is identical that 4 RAM read the address; adopt the high power clock; when every 4chip initial; with the RAM0 write address add 16 as 4chip the reference in the time period read the address, read the address for reference to reading side-play amount that the address adds each footpath, add 16 be for protection that read-write is provided at interval; the base address is refreshed once every 4chip, remains unchanged therebetween.

5. configurable WCDMA multipath alignment schemes as claimed in claim 1, it is characterized in that: the parameter of described configuration, promptly respectively directly reading side-play amount can be calculated as follows: establishing data sampling precision is 1/4chip, according to system regularly, if snap point is 128 * N chip place, certain path position is 128 * N+n+m/4chip, and then side-play amount is n * 4-15+m, parameter is configured in the control register, and wherein N, n, m are positive integer.

6. configurable WCDMA multipath alignment schemes as claimed in claim 1, it is characterized in that: the alignment of multipath data is carried out at certain user, the snap point that belongs to each footpath of same user is identical, the selection of snap point position should guarantee that it is that the length of beginning is within the interval of maximum alignment scope that all multipaths all drop on this snap point, the position of 1/4chip arbitrarily of satisfying this requirement all can be used as the snap point of multipath, and 1/4chip is a sampling precision here.

Images