CN116300377B - Time-to-digital converter and laser radar - Google Patents
Time-to-digital converter and laser radar Download PDFInfo
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- CN116300377B CN116300377B CN202310241992.6A CN202310241992A CN116300377B CN 116300377 B CN116300377 B CN 116300377B CN 202310241992 A CN202310241992 A CN 202310241992A CN 116300377 B CN116300377 B CN 116300377B
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- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F10/00—Apparatus for measuring unknown time intervals by electric means
- G04F10/005—Time-to-digital converters [TDC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
- G01S17/06—Systems determining position data of a target
- G01S17/08—Systems determining position data of a target for measuring distance only
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02A—TECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
- Y02A90/00—Technologies having an indirect contribution to adaptation to climate change
- Y02A90/10—Information and communication technologies [ICT] supporting adaptation to climate change, e.g. for weather forecasting or climate simulation
Abstract
The application discloses a time-to-digital converter and a laser radar. The system comprises a plurality of paths of signal processing modules and a control module, wherein each path of signal processing module comprises a voltage comparator, a pulse counter and a tap delay chain circuit, the threshold voltage of the voltage comparator is sequentially and incrementally set according to a preset voltage range, the voltage comparator outputs a stop signal according to the threshold voltage, the pulse counter is used for counting complete clock cycles, and the tap delay chain circuit is used for counting time smaller than the clock cycles; the control module is used for generating coordinate values of [ time, voltage ] corresponding to the stop signal according to the counting information of the pulse counter and the tap delay chain circuit, and calculating the flight time of the pulse signal according to a coordinate value sequence formed by a plurality of coordinate values corresponding to the multipath signal processing module. The application can obtain the coordinate value sequence covering a certain voltage range, so that no matter the strength of the echo signal is high, the signal is not detected in a missing way or in a false way, and the calculation precision of the flight time of the pulse signal is improved.
Description
Technical Field
The application relates to the technical field of laser radars, in particular to a time-to-digital converter and a laser radar.
Background
The main ranging principles Of the lidar are three, namely, triangulation ranging, time Of Flight (TOF), and phase method. TOF can effectively detect a longer distance and has strong anti-interference capability, so that the TOF becomes a main ranging method of the laser radar, but the method has extremely high requirement on the calculation accuracy of the laser pulse flight time, and the calculation accuracy of the laser pulse flight time influences the ranging accuracy of the laser radar.
In the prior art, a conventional tap delay chain technology is adopted in a TOF laser radar ranging algorithm, and the conventional tap delay chain technology measures the flight time of laser pulses by setting a voltage threshold value, so that the problem of false detection or omission of echo signals caused by inaccurate voltage threshold value setting can occur.
Disclosure of Invention
In view of the above, the present application is to overcome the shortcomings of the prior art, and provide a time-to-digital converter and a laser radar.
The application provides the following technical scheme:
in a first aspect, an embodiment of the present disclosure provides a time-to-digital converter, which is applied to a laser radar, and includes a multipath signal processing module and a control module;
The multi-path signal processing module is used for receiving echo signals returned by pulse signals emitted by the laser radar to a target object, each path of signal processing module comprises a voltage comparator, a pulse counter and a tap delay chain circuit, and the threshold voltages of the voltage comparators of the multi-path signal processing module are sequentially and incrementally arranged according to a preset voltage range;
the voltage comparator is used for outputting a stop signal according to the echo signal and the threshold voltage of the voltage comparator; the pulse counter is used for obtaining first counting information according to a clock signal output by the control module, a start signal generated by triggering the pulse signal and the stop signal; the tap delay chain circuit is respectively connected with the voltage comparator, the pulse counter and the control module and is used for obtaining second counting information and third counting information according to the clock signal, the start signal and the stop signal;
the control module is connected with the multipath signal processing module, and is used for calculating the measurement time between the start signal and the stop signal according to the first counting information, the second counting information and the third counting information, generating coordinate values corresponding to the stop signal, and calculating the flight time of the pulse signal according to a coordinate value sequence formed by a plurality of coordinate values corresponding to the multipath signal processing module, wherein the coordinate values are formed by the measurement time and the corresponding threshold voltage.
Further, the voltage range of the threshold voltages of the voltage comparators of the multiple signal processing modules is greater than or equal to the voltage range of the echo signals, and the threshold voltages of the voltage comparators of the multiple signal processing modules are distributed at equal intervals.
Further, the tapped delay chain circuit includes a first delay chain and a second delay chain;
one end of the first delay chain is used for receiving the starting signal, the other end of the first delay chain is connected with the control module, the other end of the first delay chain is used for receiving the clock signal, the first delay chain is used for obtaining the second counting information according to the starting signal and the clock signal, and the second counting information is sent to the control module;
one end of the second delay chain is used for receiving a stop signal output by the corresponding voltage comparator, the other end of the second delay chain is connected with the control module, the other end of the second delay chain is used for receiving the clock signal, the second delay chain is used for obtaining third counting information according to the stop signal and the clock signal, and the third counting information is sent to the control module.
Further, the first delay chain comprises a first delay array and a first trigger array;
the first delay array comprises a plurality of first delay units connected in cascade, and each first delay unit comprises a first tap;
the first trigger array comprises a plurality of first trigger units, each first trigger unit is connected with a corresponding first tap and is used for receiving the clock signal, and the first trigger units are used for sampling the states of the first taps and latching 1-bit binary data according to sampling results.
Further, the second count information is the number of binary data "1" latched in the first flip-flop array in a period from the rising edge of the start signal to the rising edge of the next clock signal.
Further, the second delay chain comprises a second delay array and a second trigger array;
the second delay array comprises a plurality of cascade-connected second delay units, and each second delay unit comprises a second tap;
the second trigger array is connected with the first trigger array and comprises a plurality of second trigger units, each second trigger unit is connected with a corresponding second tap and is used for receiving the clock signal, and the second trigger units are used for sampling the states of the second taps and latching 1-bit binary data according to sampling results.
Further, the third count information is the number of binary data "1" latched in the second flip-flop array in a period from the rising edge of the stop signal to the rising edge of the next clock signal.
Further, the delay time of the first delay unit and the second delay unit is τ, and the accuracy is set to ps-order.
Further, the first count information is the number of rising edges of the clock signal between the start signal and the stop signal.
Further, the calculating the measurement time between the start signal and the stop signal according to the first count information, the second count information, and the third count information includes:
calculating a first product value of the first count information and the period of the clock signal, a second product value of the second count information and the delay time of the first delay unit, and a third product value of the third count information and the delay time of the second delay unit respectively;
and calculating a sum value of the first product value and the second product value, and calculating a difference value of the sum value and the third product value, wherein the difference value is taken as the measurement time between the start signal and the stop signal.
Further, the calculating the flight time of the pulse signal according to the coordinate value sequence formed by the coordinate values corresponding to the multiple paths of signal processing modules includes:
arranging the threshold voltages contained in the coordinate values in order from small to large, and judging whether the number of the coordinate values in the coordinate value sequence is singular or not;
if yes, taking the measurement time corresponding to one median voltage of the plurality of threshold voltages as the flight time of the pulse signal;
if not, taking the average value of two measurement times corresponding to two median voltages of the plurality of threshold voltages as the flight time of the pulse signal.
Further, the control module is further configured to calculate a distance between the target objects according to the flight time, where a calculation formula is:
S＝t＇c/2
wherein S is the distance of the target object, t' is the flight time, and c is the speed of light.
In a second aspect, in an embodiment of the present disclosure, there is provided a lidar including:
the time-to-digital converter, the laser emitting module and the laser receiving module of the first aspect;
the laser emission module is connected with the control module and is used for responding to the control instruction of the control module and emitting the pulse signal to a target object;
The laser receiving module is connected with the multipath signal processing module and is used for receiving echo signals returned by the target object, converting the echo signals into electric signals, amplifying the electric signals, and loading the amplified electric signals to the multipath signal processing module in a branching mode.
Further, the laser radar further comprises a scanning module, the scanning module is connected with the control module, and the scanning module is used for reflecting pulse signals emitted by the laser emission module to the target object and reflecting echo signals returned by the target object to the laser receiving module.
Embodiments of the present application have at least the following advantages:
the time-to-digital converter provided by the embodiment of the application is applied to a laser radar and comprises a multipath signal processing module and a control module; the multi-channel signal processing module is used for receiving echo signals returned by pulse signals emitted by the laser radar to the target object, each channel of signal processing module comprises a voltage comparator, a pulse counter and a tap delay chain circuit, and the threshold voltages of the voltage comparators of the multi-channel signal processing module are sequentially and incrementally arranged according to a preset voltage range; the voltage comparator is used for outputting a stop signal according to the echo signal and the threshold voltage of the voltage comparator; the pulse counter is used for obtaining first counting information according to a clock signal, a start signal and a stop signal which are generated by triggering of the pulse signal and output by the control module; the tap delay chain circuit is respectively connected with the voltage comparator, the pulse counter and the control module and is used for obtaining second counting information and third counting information according to the clock signal, the start signal and the stop signal; the control module is connected with the multi-path signal processing module and is used for calculating the measurement time between the start signal and the stop signal according to the first count information, the second count information and the third count information, generating coordinate values corresponding to the stop signal, and calculating the flight time of the pulse signal according to a coordinate value sequence formed by a plurality of coordinate values corresponding to the multi-path signal processing module, wherein the coordinate values are formed by the measurement time and the corresponding threshold voltage. The application can obtain the coordinate value sequence covering a certain voltage range, so that no matter the strength of the echo signal is high, the signal is not detected in a missing way or in a false way, and the calculation precision of the flight time of the pulse signal is improved.
In order to make the above objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. Like elements are numbered alike in the various figures.
Fig. 1 shows a schematic diagram of a time-to-digital converter according to an embodiment of the present application;
fig. 2 is a schematic diagram showing a part of a structure of a signal processing module according to an embodiment of the present application;
fig. 3 is a schematic diagram showing a part of a structure of another signal processing module according to an embodiment of the present application;
fig. 4 is a schematic diagram showing a part of a structure of a signal processing module according to another embodiment of the present application;
fig. 5 shows a measurement schematic diagram of a signal processing module according to an embodiment of the present application;
Fig. 6 shows a schematic structural diagram of a lidar according to an embodiment of the present application;
FIG. 7 is a schematic diagram of another laser radar according to an embodiment of the present application;
fig. 8 shows a schematic diagram of a hardware architecture of a computer device according to an embodiment of the present application.
And (3) main component description:
a 10-time digitizer; 11-a control module; 12-a signal processing module; 121-a voltage comparator; 122-pulse counter; a 123-tap delay chain circuit; 1231-a first delay chain; 1232-a second delay chain; 20-laser radar; a 21-laser emission module; 22-a laser receiving module; a 23-scan module; 800-a computer device; 810-a memory; 820-a processor; 830-network interface.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application.
It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
In the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the templates herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Fig. 1 is a schematic diagram of a time-to-digital converter according to an embodiment of the application, and as shown in fig. 1, a time-to-digital converter 10 includes a control module 11 and a multi-path signal processing module 12.
The control module 11 is connected with the multipath signal processing module 12, controls the laser radar 20 to transmit a pulse signal to a target object, and transmits a start signal to the signal processing module 12 when transmitting the pulse signal.
Specifically, the control module 11 controls the laser radar 20 to transmit pulse signals to the target object according to a certain time sequence, and meanwhile, transmits start signals to the multi-path signal processing module 12, in short, the control module 11 controls the laser radar 20 to transmit pulse signals and generate start signals, and sends the start signals to the multi-path signal processing module 12 respectively, that is, the pulse signals trigger the generation of the start signals.
The multipath signal processing module 12 is configured to receive an echo signal returned by a pulse signal emitted by the laser radar 20 to a target object, where each path of signal processing module 12 includes a voltage comparator 121, a pulse counter 122, and a tap delay chain circuit 123, and a threshold voltage of the voltage comparator 121 of the multipath signal processing module 12 is sequentially and incrementally set according to a preset voltage range.
The voltage range of the echo signal is within a preset voltage range, the voltage comparator 121 of each signal processing module 12 corresponds to a threshold voltage, the threshold voltages corresponding to the voltage comparators 121 of the multiple signal processing modules 12 are sequentially increased, and it is assumed that the time-to-digital converter 10 includes 10 signal processing modules 12, the 1 st signal processing module 12 corresponds to the threshold voltage V1, the 2 nd signal processing module 12 corresponds to the threshold voltages V2 and … …, the 10 th signal processing module 12 corresponds to the threshold voltage V10, and the threshold voltages of the voltage comparators 121 of the 10 signal processing modules 12 are ordered as follows: v1 is less than V2 and less than … … is less than V10.
After receiving the pulse signal, the target object returns a corresponding echo signal to the laser radar 20, the laser radar 20 converts the echo signal into an electrical signal, then amplifies the electrical signal, and finally loads the amplified electrical signal into the multiple signal processing modules 12 in a branching manner.
In the present application, the voltage range of the threshold voltage of the voltage comparator 121 of the multipath signal processing module 12 is greater than or equal to the voltage range of the echo signal, as described above, the echo signal is subjected to corresponding signal processing to obtain an amplified electrical signal, that is, the voltage range of the threshold voltage of the voltage comparator 121 of the multipath signal processing module 12 covers the voltage range of the amplified electrical signal, so that when the echo signal with the preset voltage range arrives, no matter the intensity of the echo signal, the waveform of the echo signal is in the voltage range of the threshold voltage of the voltage comparator 121 of the multipath signal processing module 12, thereby calculating the central position moment of the rising edge/falling edge of the echo signal, and further improving the calculation precision of the flight time of the pulse signal of the laser radar and the ranging precision of the laser radar.
In some embodiments, the voltage range of the threshold voltage of the voltage comparator 121 of the multi-path signal processing module 12 may be set to be slightly smaller than the voltage range of the echo signal, where the top and/or bottom of the waveform of the echo signal is located outside the voltage range of the threshold voltage of the voltage comparator 121 of the multi-path signal processing module 12.
Preferably, the threshold voltages of the voltage comparators 121 of the multipath signal processing module 12 are distributed at equal intervals. It is understood that the voltage differences between the threshold voltages of the voltage comparators 121 of the multiple signal processing modules 12 may be different, for example, the voltage differences between the threshold voltages of the voltage comparators 121 of the multiple signal processing modules 12 may be sequentially increased or sequentially decreased, and for example, the voltage differences between the threshold voltages of the voltage comparators 121 of the multiple signal processing modules 12 may be distributed irregularly.
The voltage comparator 121 is configured to output a stop signal according to the echo signal and a threshold voltage of the voltage comparator 121.
As can be seen from fig. 4 and fig. 5, when the amplified electric signal obtained after the echo signal is subjected to the corresponding signal processing is greater than or equal to the threshold voltage of the voltage comparator 121, the voltage comparator 121 outputs a stop signal, i.e. the stop signal jumps from a low level to a high level, i.e. the rising edge of the stop signal serves as the trigger signal of the pulse counter 122 and the tap delay chain circuit 123 which are correspondingly connected. In some embodiments, if the control module 11 processes the falling edge timing waveform information of the echo signal, the falling edge of the stop signal output by the voltage comparator 121 may be used as the trigger signal of the pulse counter 122 and the tap delay chain circuit 123 that are correspondingly connected.
The pulse counter 122 is configured to obtain first count information according to a clock signal, a start signal and a stop signal triggered and generated by the pulse signal output by the control module 11.
Specifically, when the voltage comparator 121 outputs a stop signal, the pulse counter 122 connected to the voltage comparator 121 is triggered to start timing. The first count information is the number of rising edges of the clock signal between the start signal and the stop signal, that is, the first count information is the number of clock cycles of the clock signal between the start signal and the stop signal, that is, "n" in "nT" in fig. 5, and T is the clock cycle of the clock signal generated by the crystal oscillator of the control module 11.
The tapped delay chain circuit 123 is respectively connected to the voltage comparator 121, the pulse counter 122 and the control module 11, and the tapped delay chain circuit 123 is configured to obtain the second count information and the third count information according to the clock signal, the start signal and the stop signal.
Referring to fig. 2 and 3, the tapped delay chain circuit 123 includes a first delay chain 1231 and a second delay chain 1232, wherein a start signal propagates in the first delay chain 1231 and a stop signal propagates in the second delay chain 1232. The tapped delay chain circuit 123 adopts a multi-chain measurement structure, and can obtain more accurate measurement time information of the echo signal.
One end of the first delay chain 1231 is used for receiving a start signal, the other end of the first delay chain 1231 is connected with the control module 11, the other end of the first delay chain 1231 is used for receiving a clock signal, the first delay chain 1231 is used for obtaining second counting information according to the start signal and the clock signal, and the second counting information is sent to the control module 11.
Further, as shown in fig. 3, the first delay chain 1231 includes a first delay array and a first flip-flop array. The first delay array comprises a plurality of first delay units which are connected in cascade, and each first delay unit comprises a first tap; the first trigger array comprises a plurality of first trigger units, each first trigger unit is connected with a corresponding first tap and is used for receiving a clock signal, and the first trigger units are used for sampling the states of the first taps and latching 1-bit binary data according to sampling results.
In the present application, the propagation delay of the start signal in the first delay array is determined by the number of binary data "1" latched in the first flip-flop array. Specifically, the second count information is a period from the rising edge of the start signal to the rising edge of the next clock signal (as shown in "n" of fig. 5 1 τ "), where n is the number of binary data" 1 "latched in the first flip-flop array 1 Is the number of binary data "1" latched in the first flip-flop array during this period. In some embodiments, the number of binary data "0" latched in the first flip-flop array may also be used as the second count information.
One end of the second delay chain 1232 is configured to receive the stop signal output by the corresponding voltage comparator 121, the other end of the second delay chain 1232 is connected to the control module 11, the other end of the second delay chain is configured to receive the clock signal, and the second delay chain 1232 is configured to obtain third count information according to the stop signal and the clock signal, and send the third count information to the control module 11.
Further, as shown in fig. 3, the second delay chain 1232 includes a second delay array and a second flip-flop array. Wherein the second delay array comprises a plurality of cascade connected second delay units, each second delay unit comprising a second tap; the second trigger array is connected with the first trigger array and comprises a plurality of second trigger units, each second trigger unit is connected with a corresponding second tap and is used for receiving a clock signal, and the second trigger units are used for sampling the states of the second taps and latching 1-bit binary data according to sampling results.
In the present application, the propagation delay of the start signal in the second delay array is determined by the number of binary data "1" latched in the second flip-flop array. Specifically, the third count information is a period from the rising edge of the stop signal to the rising edge of the next clock signal (as shown in "n" in fig. 5 2 τ ") of the number of binary data" 1 "latched in the second flip-flop array. Wherein n is 2 Is the number of binary data "1" latched in the second flip-flop array during this period. In some embodiments, the number of binary data "0" latched in the second flip-flop array may also be used as the third count information.
In the application, the delay time of the first delay unit and the second delay unit is tau, and the precision is set to ps-level, so that the description of the time scale information of the edge waveform of the echo signal by the coordinate value sequence measured later is very accurate. In some embodiments, the delay times of the first delay unit and the second delay unit may not be equal, and the precision thereof may also be set according to actual requirements, which is not limited to ps-stage disclosed in the present application.
The control module 11 is connected with the multi-path signal processing module 12, the control module 11 calculates the measurement time between the start signal and the stop signal according to the first count information, the second count information and the third count information, generates a coordinate value corresponding to the stop signal, and calculates the flight time of the pulse signal according to a coordinate value sequence formed by a plurality of coordinate values corresponding to the multi-path signal processing module 12, wherein the coordinate value is formed by the measurement time and the corresponding threshold voltage.
In the present application, calculating a measurement time between a start signal and a stop signal based on first count information, second count information, and third count information, includes: calculating a first product value of the first count information and the period of the clock signal, a second product value of the second count information and the delay time of the first delay unit, and a third product value of the third count information and the delay time of the second delay unit respectively; and calculating the sum of the first product value and the second product value, calculating the difference between the sum and the third product value, and taking the difference as the measurement time between the start signal and the stop signal.
As shown in fig. 5, the measurement time t=nt+n between the start signal and the stop signal 1 τ-n 2 τ＝nT+(n 1 -n 2 ) It can be seen that the measurement time t between the start signal and the stop signal is mainly composed of two parts, namely the first measurement time nT calculated by the first count information n of the pulse counter 122 and the second count information n of the tap delay chain circuit 123 1 And third count information n 2 Calculated second measurement time (n 1 -n 2 ) τ due to the third counting information n 2 Corresponding time n 2 τ overlaps the first measurement time nT calculated by the pulse counter 122 and therefore needs to be subtracted.
From the above, the measurement resolution of the measurement time t is the delay time τ of the first delay unit and the second delay unit.
In the application, according to a coordinate value sequence composed of a plurality of coordinate values corresponding to a multipath signal processing module, the flight time of a pulse signal is calculated, which comprises the following steps: arranging the threshold voltages contained in each coordinate value in order from small to large, and judging whether the number of the coordinate values in the coordinate value sequence is singular or not; if yes, taking the measurement time corresponding to one median voltage of the plurality of threshold voltages as the flight time of the pulse signal; if not, taking the average value of two measurement times corresponding to two median voltages of the plurality of threshold voltages as the flight time of the pulse signal.
Assuming that the time-to-digital converter 10 includes N signal processing modules 12, the N signal processing modules 12 include N threshold voltages, the measurement times of M (M.ltoreq.N) threshold voltages are measured, thereby obtaining [ measurement time, threshold voltage ] at M measurement points on a "time-voltage" plane describing the time-series waveform of this echo signal]A coordinate value sequence composed of coordinate values. As shown in fig. 4, the N-way signal processing module 12 outputs N [ measurement time, threshold voltage ] ]Coordinate values, and N [ measuring time, threshold voltage ]]Coordinate value sequence [ measuring time, threshold voltage ] composed of coordinate values]Coordinate value 1, [ measurement time, threshold voltage ]]Coordinate value 2 … … [ measuring time, threshold voltage ]]The coordinate value N is sent to the control module 11 as a basic data source for the control module 11 to extract the echo signal timing information. Since the start signal and the clock signal of each path are the same, the multiple signal processing modules 12 operate in parallel, and the multiple signal processing modules 12 correspondingly obtain the coordinate value sequences, such as (t) 1 ，v 1 )，(t 2 ，v 2 )，…，(t n ，v n ). The threshold voltages included in the coordinate values are arranged in order from small to large, and whether the number of the coordinate values in the coordinate value sequence is singular, namely whether n is singular is judged.
If n is singular, then v is taken 1 、v 2 、…、v n Median voltage v of (v) i Wherein, the method comprises the steps of, wherein,will median voltage v i Corresponding measurement time t i Time of flight as a pulse signal; if n is a double number, then v is taken 1 、v 2 、…、v n Is a median voltage v i And v j Wherein->j=i+1, the median voltage v i And v j Corresponding two measurement times t i And t j Mean value of>As the time of flight of the pulse signal.
The control module 11 is further configured to calculate a distance between the target objects according to the flight time, where the calculation formula is:
S＝t＇c/2
Wherein S is the distance of the target object, t' is the flight time, c is the speed of light, and the size is 3×10 8 m/s。
In this embodiment, after the time of flight of the pulse signal is calculated, the true distance of the target object may also be calculated according to the time of flight. Since the calculated flight time is the time of the pulse signal from the transmission to the target and the reflection of the echo signal from the target, the product value tc of the time flight and the speed of light is 2 times the true distance, and therefore the calculated time is divided by 2 to be the true distance of the target.
The time-to-digital converter provided by the embodiment of the application is applied to a laser radar and comprises a multipath signal processing module and a control module; the multi-channel signal processing module is used for receiving echo signals returned by pulse signals emitted by the laser radar to the target object, each channel of signal processing module comprises a voltage comparator, a pulse counter and a tap delay chain circuit, and the threshold voltages of the voltage comparators of the multi-channel signal processing module are sequentially and incrementally arranged according to a preset voltage range; the voltage comparator is used for outputting a stop signal according to the echo signal and the threshold voltage of the voltage comparator; the pulse counter is used for obtaining first counting information according to a clock signal, a start signal and a stop signal which are generated by triggering of the pulse signal and output by the control module; the tap delay chain circuit is respectively connected with the voltage comparator, the pulse counter and the control module and is used for obtaining second counting information and third counting information according to the clock signal, the start signal and the stop signal; the control module is connected with the multi-path signal processing module and is used for calculating the measurement time between the start signal and the stop signal according to the first count information, the second count information and the third count information, generating coordinate values corresponding to the stop signal, and calculating the flight time of the pulse signal according to a coordinate value sequence formed by a plurality of coordinate values corresponding to the multi-path signal processing module, wherein the coordinate values are formed by the measurement time and the corresponding threshold voltage. The application can obtain the coordinate value sequence covering a certain voltage range, so that no matter the strength of the echo signal is high, the signal is not detected in a missing way or in a false way, and the calculation precision of the flight time of the pulse signal is improved.
Example 2
Fig. 6 shows a laser radar 20 according to an embodiment of the present application, which is a time-to-digital converter 10, a laser transmitting module 21 and a laser receiving module 22 according to embodiment 1.
The lidar 20 according to the embodiment of the present application includes the time-to-digital converter 10 described in embodiment 1, and the time-to-digital converter 10 described in embodiment 1 has the same inventive concept, and is not described herein.
The laser emitting module 21 is connected to the control module 11, and the laser emitting module 21 is used for responding to the control instruction of the control module 11 and emitting pulse signals to the target object.
The laser receiving module 22 is connected with the multipath signal processing module 12, and is configured to receive an echo signal returned by the target object, convert the echo signal into an electrical signal, amplify the electrical signal, and load the amplified electrical signal to the multipath signal processing module 12 in a branching manner.
Optionally, as shown in fig. 7, the laser radar further includes a scanning module 23, where the scanning module 23 is connected to the control module 11, and the scanning module 23 is configured to reflect the pulse signal emitted by the laser emitting module 21 to the target object, and reflect the echo signal returned by the target object to the laser receiving module 22. Through the implementation manner, the laser radar provided by the embodiment of the application can obtain the coordinate value sequence covering a certain voltage range, so that no matter whether the echo signal is strong or weak, signal omission or false detection is avoided, the calculation accuracy of the time difference is improved, and the ranging accuracy is further improved.
Example 3
Fig. 8 shows a schematic diagram of a hardware architecture of a computer device provided by the present application, where the computer device includes a memory and a processor, and the memory stores a computer program, and when the processor executes the computer program, the processor implements the functions of the time-to-digital converter and the lidar described in embodiments 1 and 2.
In this embodiment, the computer device 800 is a device capable of automatically performing numerical calculation and/or information processing in accordance with an instruction set or stored in advance. For example, it may be a rack server, a blade server, a tower server, or a rack server (including an independent server or a server cluster composed of a plurality of servers), etc. As shown in fig. 8, computer device 800 includes at least, but is not limited to: memory 810, processor 820, and network interface 830 may be communicatively linked to each other by a system bus. Wherein:
memory 810 includes at least one type of computer-readable storage medium including flash memory, hard disk, multimedia card, card memory (e.g., SD or DX memory, etc.), random Access Memory (RAM), static Random Access Memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, the memory 810 may be an internal storage module of the computer device 800, such as a hard disk or memory of the computer device 800. In other embodiments, the memory 810 may also be an external storage device of the computer device 800, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash Card (Flash Card) or the like, which are provided on the computer device 800. Of course, memory 810 may also include both internal storage modules of computer device 800 and external storage devices. In this embodiment, the memory 810 is typically used to store an operating system and various types of application software installed on the computer device 800, such as program codes of a video playing method, and the like. Furthermore, the memory 810 may also be used to temporarily store various types of data that have been output or are to be output.
Processor 820 may be a central processing unit (Central Processing Unit, simply CPU), controller, microcontroller, microprocessor, or other data processing chip in some embodiments. The processor 820 is generally used to control overall operation of the computer device 800, such as performing control and processing related to data interaction or communication with the computer device 800, and the like. In this embodiment, processor 820 is used to execute program code or process data stored in memory 810.
The network interface 830 may include a wireless network interface or a wired network interface, the network interface 830 typically being used to establish a communication link between the computer device 800 and other computer devices. For example, the network interface 830 is used to connect the computer device 800 to an external terminal through a network, establish a data transmission channel and a communication link between the computer device 800 and the external terminal, and the like. The network may be a wireless or wired network such as an Intranet (Intranet), the Internet (Internet), a global system for mobile communications (GlobalSystem of Mobile communication, abbreviated as GSM), wideband code division multiple access (Wideband Code DivisionMultiple Access, abbreviated as WCDMA), a 4G network, a 5G network, bluetooth (Bluetooth), wi-Fi, etc.
It should be noted that FIG. 8 only shows a computer device having components 810-830, but it should be understood that not all of the illustrated components are required to be implemented and that more or fewer components may be implemented instead.
In this embodiment, the time-to-digital converter and the laser radar stored in the memory 810 may also be divided into one or more program modules and executed by one or more processors (processor 820 in this embodiment) to complete the present invention.
Example 4
The present embodiment also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the functions of the time-to-digital converter and the lidar of embodiments 1 and 2.
In this embodiment, the computer-readable storage medium includes a flash memory, a hard disk, a multimedia card, a card memory (e.g., SD or DX memory, etc.), a Random Access Memory (RAM), a Static Random Access Memory (SRAM), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a programmable read-only memory (PROM), a magnetic memory, a magnetic disk, an optical disk, and the like. In some embodiments, the computer readable storage medium may be an internal storage unit of a computer device, such as a hard disk or a memory of the computer device. In other embodiments, the computer readable storage medium may also be an external storage device of a computer device, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash Card (Flash Card), etc. that are provided on the computer device. Of course, the computer-readable storage medium may also include both internal storage units of a computer device and external storage devices. In this embodiment, the computer-readable storage medium is typically used to store an operating system and various types of application software installed on a computer device. Furthermore, the computer-readable storage medium may also be used to temporarily store various types of data that have been output or are to be output.
Any particular values in all examples shown and described herein are to be construed as merely illustrative and not a limitation, and thus other examples of exemplary embodiments may have different values.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
The above examples merely represent a few embodiments of the present invention, which are described in more detail and are not to be construed as limiting the scope of the present invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention.
Claims (14)
1. The time-to-digital converter is applied to the laser radar and is characterized by comprising a multipath signal processing module and a control module;
the multi-path signal processing module is used for receiving echo signals returned by pulse signals emitted by the laser radar to a target object, each path of signal processing module comprises a voltage comparator, a pulse counter and a tap delay chain circuit, and the threshold voltages of the voltage comparators of the multi-path signal processing module are sequentially and incrementally arranged according to a preset voltage range;
The voltage comparator is used for outputting a stop signal according to the echo signal and the threshold voltage of the voltage comparator; the pulse counter is used for obtaining first counting information according to a clock signal output by the control module, a start signal generated by triggering the pulse signal and the stop signal; the tap delay chain circuit is respectively connected with the voltage comparator, the pulse counter and the control module and is used for obtaining second counting information and third counting information according to the clock signal, the start signal and the stop signal;
the control module is connected with the multipath signal processing module, and is used for calculating the measurement time between the start signal and the stop signal according to the first counting information, the second counting information and the third counting information, generating coordinate values corresponding to the stop signal, and calculating the flight time of the pulse signal according to a coordinate value sequence formed by a plurality of coordinate values corresponding to the multipath signal processing module, wherein the coordinate values are formed by the measurement time and the corresponding threshold voltage.
2. The time-to-digital converter of claim 1, wherein the voltage ranges of the threshold voltages of the voltage comparators of the plurality of signal processing modules are greater than or equal to the voltage ranges of the echo signals, and the threshold voltages of the voltage comparators of the plurality of signal processing modules are equally spaced.
3. The time to digital converter of claim 1, wherein the tapped delay chain circuit comprises a first delay chain and a second delay chain;
one end of the first delay chain is used for receiving the starting signal, the other end of the first delay chain is connected with the control module, the other end of the first delay chain is used for receiving the clock signal, the first delay chain is used for obtaining the second counting information according to the starting signal and the clock signal, and the second counting information is sent to the control module;
one end of the second delay chain is used for receiving a stop signal output by the corresponding voltage comparator, the other end of the second delay chain is connected with the control module, the other end of the second delay chain is used for receiving the clock signal, the second delay chain is used for obtaining third counting information according to the stop signal and the clock signal, and the third counting information is sent to the control module.
4. A time to digital converter according to claim 3, wherein the first delay chain comprises a first delay array and a first flip-flop array;
the first delay array comprises a plurality of first delay units connected in cascade, and each first delay unit comprises a first tap;
the first trigger array comprises a plurality of first trigger units, each first trigger unit is connected with a corresponding first tap and is used for receiving the clock signal, and the first trigger units are used for sampling the states of the first taps and latching 1-bit binary data according to sampling results.
5. The time-to-digital converter according to claim 4, wherein the second count information is a number of binary data "1" latched in the first flip-flop array in a period from a rising edge of the start signal to a rising edge of the next clock signal.
6. The time to digital converter of claim 4, wherein the second delay chain comprises a second delay array and a second flip-flop array;
the second delay array comprises a plurality of cascade-connected second delay units, and each second delay unit comprises a second tap;
The second trigger array is connected with the first trigger array and comprises a plurality of second trigger units, each second trigger unit is connected with a corresponding second tap and is used for receiving the clock signal, and the second trigger units are used for sampling the states of the second taps and latching 1-bit binary data according to sampling results.
7. The time-to-digital converter according to claim 6, wherein the third count information is the number of binary data "1" latched in the second flip-flop array in a period from a rising edge of the stop signal to a rising edge of the next clock signal.
8. The time-to-digital converter according to claim 6, wherein the delay time of the first delay unit and the second delay unit is τ, and the accuracy is set to ps-order.
9. The time to digital converter of claim 1, wherein the first count information is a number of rising edges of a clock signal between the start signal and the stop signal.
10. The time-to-digital converter of claim 6, wherein the calculating the measurement time between the start signal and the stop signal based on the first count information, the second count information, and the third count information comprises:
Calculating a first product value of the first count information and the period of the clock signal, a second product value of the second count information and the delay time of the first delay unit, and a third product value of the third count information and the delay time of the second delay unit respectively;
and calculating a sum value of the first product value and the second product value, and calculating a difference value of the sum value and the third product value, wherein the difference value is taken as the measurement time between the start signal and the stop signal.
11. The time-to-digital converter according to claim 1, wherein the calculating the time of flight of the pulse signal from the coordinate value sequence composed of the coordinate values corresponding to the plurality of signal processing modules includes:
arranging the threshold voltages contained in the coordinate values in order from small to large, and judging whether the number of the coordinate values in the coordinate value sequence is singular or not;
if yes, taking the measurement time corresponding to one median voltage of the plurality of threshold voltages as the flight time of the pulse signal;
if not, taking the average value of two measurement times corresponding to two median voltages of the plurality of threshold voltages as the flight time of the pulse signal.
12. The time to digital converter of claim 1 or 11, wherein the control module is further configured to calculate the distance of the target object based on the time of flight by the following formula:
S＝t＇c/2
wherein S is the distance of the target object, t' is the flight time, and c is the speed of light.
13. A lidar, comprising:
the time to digital converter, laser emitting module and laser receiving module of any one of claims 1-12;
the laser emission module is connected with the control module and is used for responding to the control instruction of the control module to emit the pulse signal to the target object;
the laser receiving module is connected with the multipath signal processing module and is used for receiving echo signals returned by the target object, converting the echo signals into electric signals, amplifying the electric signals, and loading the amplified electric signals to the multipath signal processing module in a branching mode.
14. The lidar according to claim 13, further comprising a scanning module connected to the control module, wherein the scanning module is configured to reflect the pulse signal emitted by the laser emitting module to the target object and reflect an echo signal returned by the target object to the laser receiving module.
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