CN116279703A

CN116279703A - Full-electronic interlocking test system, method and device and electronic equipment

Info

Publication number: CN116279703A
Application number: CN202310021099.2A
Authority: CN
Inventors: 刘雪敏; 娄玥童; 张振东; 冷文俊
Original assignee: Foshan Jiaokong Technology Co ltd
Current assignee: Foshan Jiaokong Technology Co ltd
Priority date: 2023-01-06
Filing date: 2023-01-06
Publication date: 2023-06-23

Abstract

The invention provides a full-electronic interlocking test system, a method, a device and electronic equipment, and relates to the technical field of rail transit, wherein the system comprises: ATS, an interlock subsystem, a simulated fault device, and a simulated trackside equipment; the simulation fault is used for sending first indication information of the target class fault to the simulation trackside equipment or the interlocking subsystem based on the fault test instruction; the simulation track side equipment is used for simulating a target class fault based on the first indication information and sending state information of the simulation track side equipment to the interlocking subsystem; the interlocking subsystem is used for sending second indication information for indicating the ATS to perform abnormal alarm to the ATS based on the first indication information or the state information of the simulation trackside equipment. According to the invention, through the simulation fault device, fault information of all-electronic interlocking systems of different types can be selected, so that not only can the integrity of the test of the all-electronic interlocking systems be ensured, but also the fault setting time can be greatly shortened, and the test efficiency is improved.

Description

Full-electronic interlocking test system, method and device and electronic equipment

Technical Field

The invention relates to the technical field of rail transit, in particular to a full-electronic interlocking test system, method and device and electronic equipment.

Background

The Full electronic interlocking system (Full-Electronic Computer Interlocking System, ECI) is a signal system which takes a computer as a main technical means to realize the interlocking relationship. As a device related to traffic safety, whether it can operate safely and reliably will directly affect the safe operation and line traffic efficiency of the entire signal system, so the ECI system must employ a safety computer to improve the safety and reliability of the system.

At present, aiming at the test of the all-electronic interlocking system, as the all-electronic interlocking system has numerous board card types and complex design, in the laboratory interface test and function verification stage, all real equipment is not provided, part of signal equipment adopts a simulation mode to carry out logic test verification, and the simulation of non-signal equipment such as axle counting equipment and the like is involved, so that the test comprehensiveness and conclusion reliability are influenced to a certain extent; in addition, in order to ensure the integrity of the test, the fault test is usually performed manually, but the manual test is time-consuming and requires relatively experienced personnel to perform the operation, resulting in low test efficiency.

Therefore, how to improve the testing efficiency of the all-electronic interlocking system under the condition of ensuring the integrity and the completeness of the testing of the all-electronic interlocking system becomes a problem to be solved in the industry.

Disclosure of Invention

Aiming at the problems existing in the prior art, the invention provides a full-electronic interlocking test system, a method and a device and electronic equipment.

In a first aspect, the present invention provides an all-electronic interlock testing system comprising:

the automatic train monitoring system comprises an ATS, an interlocking subsystem, a simulation fault device and simulation track side equipment, wherein the interlocking subsystem is respectively connected with the ATS and the simulation track side equipment, and the simulation fault device is respectively connected with the interlocking subsystem and the simulation track side equipment;

the simulation fault is used for receiving a fault test instruction and sending first indication information of a target class fault to the simulation trackside equipment or the interlocking subsystem based on the fault test instruction;

the simulation trackside equipment is used for simulating the target class fault based on the first indication information sent by the simulation fault device and sending state information of the simulation trackside equipment to the interlocking subsystem;

the interlocking subsystem is used for sending second indicating information to the ATS based on the first indicating information sent by the simulation fault device or the state information of the simulation track side device sent by the simulation track side device, and the second indicating information is used for indicating the ATS to carry out abnormal alarm.

Optionally, according to the full-electronic interlocking test system provided by the invention, the system further comprises a simulation axle counting device, wherein the simulation axle counting device is deployed on the simulation trackside device;

the simulation axle counting equipment is used for simulating axle counting faults, generating axle counting fault information and sending the axle counting fault information to the interlocking subsystem through the simulation trackside equipment.

Optionally, according to the full-electronic interlocking test system provided by the invention, the system further comprises simulation IO equipment, wherein the simulation IO equipment is respectively connected with the simulation fault device, the simulation trackside equipment and the interlocking subsystem;

the simulation IO device is used for collecting state information of the simulation track side device, sending the state information of the simulation track side device to the interlocking subsystem, and forwarding the first indication information sent by the simulation fault device to the simulation track side device.

Optionally, according to the invention, the interlocking subsystem comprises a single computer interlocking CI and a single object controller OC, and the single computer interlocking CI is connected with the single object controller OC.

Optionally, according to the full-electronic interlocking testing system provided by the invention, the ATS is deployed in a cloud platform.

In a second aspect, the present invention further provides an all-electronic interlock testing method applied to the all-electronic interlock testing system in any one of the first aspects, and applied to the simulation fault device, the method includes:

receiving a fault test instruction;

and sending first indication information of a target class fault to the simulation trackside equipment or the interlocking subsystem based on the fault test instruction, wherein the first indication information is used for indicating the simulation trackside equipment to simulate the target class fault or is used for indicating the interlocking subsystem to send second indication information to an ATS, and the second indication information is used for indicating the ATS to carry out abnormal alarm.

In a third aspect, the present invention also provides an all-electronic interlock testing device, applied to a simulated fault device, the device comprising:

the receiving module is used for receiving the fault test instruction;

the transmission module is used for transmitting first indication information of a target class fault to the simulation trackside equipment or the interlocking subsystem based on the fault test instruction, wherein the first indication information is used for indicating the simulation trackside equipment to simulate the target class fault or is used for indicating the interlocking subsystem to transmit second indication information to the ATS, and the second indication information is used for indicating the ATS to carry out abnormal alarm.

In a fourth aspect, the present invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the all-electronic interlock test method according to the second aspect when executing the program.

In a fifth aspect, the present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the all-electronic interlock test method according to the second aspect.

In a sixth aspect, the invention also provides a computer program product comprising a computer program which, when executed by a processor, implements the all-electronic interlock test method according to the second aspect.

According to the full-electronic interlocking test system, the method, the device and the electronic equipment, the first indication information of the full-electronic interlocking system faults of the target category designated by the user is selected through the simulation fault device, the first indication information is sent to the simulation track side equipment or the interlocking subsystem, the simulation track side equipment simulates the target category faults based on the first indication information, the state information of the simulation track side equipment is sent to the interlocking subsystem, and the second indication information for indicating the ATS to perform abnormal alarm is sent to the ATS by the interlocking subsystem based on the first indication information or the state information of the simulation track side equipment; the fault information of the all-electronic interlocking system in different categories can be selected based on the simulation fault device, so that the integrity of the all-electronic interlocking system test can be ensured, the fault setting time can be greatly shortened, and the test efficiency is improved.

Drawings

In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of an all-electronic interlock testing system according to the present invention;

FIG. 2 is a schematic diagram of a connection relationship between each subsystem and an external system of an interlocking device according to the related art;

FIG. 3 is a second schematic diagram of the full electronic interlock testing system according to the present invention;

FIG. 4 is a schematic flow chart of a test run functional failure scenario test provided by the related art;

FIG. 5 is a schematic flow chart of a test run functional failure scenario test provided by the invention;

FIG. 6 is a flow chart of a related art provided axle counting fault scenario test;

FIG. 7 is a schematic flow chart of the axle counting fault scenario test provided by the invention;

FIG. 8 is a flow chart of a microcycle handling timeout fault scenario test provided by the related art;

FIG. 9 is a schematic flow chart of a micro-period processing timeout fault scenario test provided by the present invention;

FIG. 10 is a flow chart of the full electronic interlock testing method provided by the invention;

FIG. 11 is a schematic diagram of the structure of the full electronic interlock testing device provided by the invention;

fig. 12 is a schematic diagram of the physical structure of the electronic device provided by the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

In order to facilitate a clearer understanding of various embodiments of the present invention, some relevant background knowledge is first presented as follows.

The ECI is a signal system for realizing the interlocking relationship by taking a computer as a main technical means. As a device related to traffic safety, whether it can run safely and reliably will directly affect the safe operation and line traffic efficiency of the whole signal system, and therefore must conform to the fail-safe principle, should be designed according to the requirements of international safety standard safety integrity level 4 (SIL 4 (Safety Integrity Level)), and the ECI system must employ a safety computer to improve the safety and reliability of the system.

The structure of the ECI system is divided into 3 layers: an operation representation layer, an interlocking logic layer and an all-electronic execution layer. The interlocking machine subsystem executes the main interlocking control logic and is core equipment of the interlocking system. The interlocking machine is connected with a signal network through a communication controller to complete data interaction with an execution unit (object controller (Object Controller, OC) subsystem). The signal red-blue network redundant Ethernet bus is communicated with the execution unit to complete the state acquisition and driving functions of the trackside equipment such as the annunciators, the turnout, the execution circuit, the axle counting and the like, and obtains corresponding information On the ground and the Vehicle by communicating with other subsystems such as a Zone Controller (ZC) and a Vehicle-mounted Controller (VOBC).

The ECI realizes the functions of non-route shunting to the test line, equipment control of non-route shunting signalers, turnout and the like through the functions of logic processing and test line combination. The vehicle section interlocking and the test line interlocking are interacted to realize operation functions such as test run request, test run ending and the like. However, compared with the traditional interlocking, the interface circuit between the ECI vehicle section interlocking device and the test line device adopts a serial port communication mode to carry out interaction of the traffic right information. The relay-free interface cannot transmit the state information of the shunting turnout to the vehicle section and the test line at the same time. If the non-approach is closed due to turnout faults and the like, the non-approach enters an abnormal locking state, and a test run request is effective at the moment and a cancel mark is not set when in a test run signal mode, so that great challenges are brought to test run function test and acceptance under ECI control processing.

In the laboratory interface test and function verification stage, as all real devices are not provided, part of signal devices are subjected to logic test verification in a simulation mode, simulation of non-signal devices such as axle counting devices is involved, and certain risks are generated on test comprehensiveness and conclusion reliability.

Furthermore, the interlock system is a periodically operated control system, with an operating period of typically 300ms. The time is controlled by a logic board in the FTSM plug-in box of the interlocking cabinet, and under the control of the logic board, the interlocking software circularly completes control tasks such as input, logic processing, output and the like in each interlocking period. The micro-period is to divide the 300ms time period of the running period again according to different executing task types to form a plurality of relatively independent small periods, which are called micro-periods. The current operating cycle is divided into four microcycles, namely an input microcycle, an application microcycle, an output microcycle and an idle microcycle. The micro-period time is different, four Processing Units (PU) in the interlocking cabinet work in parallel or operate in parallel, the interlocking host is divided into A, B two systems, the interaction comparison of input and output data is carried out between two PUs in the systems to realize a 'two-taking' function, and the information synchronous interaction between four PUs is carried out to realize a 'two-multiplying' function, so whether the steps of executing tasks among the PUs are consistent or not and whether the time is consistent or not is the key of whether the 'two-taking' function and the 'two-multiplying' function can operate correctly or not.

When a PU cannot complete its task on time within a certain micro-period, the processing time-out is called, at this time, the software or hardware of the PU may be considered to be faulty, and the time deviation may cause that the in-system dual-machine cannot complete the synchronous execution of the task, that is, the output safety and reliability cannot be ensured, so the system designs a time-out guiding downtime processing mechanism. And specific limiting conditions are output through effective and repeated data tests, so that normal operation of the laboratory and field ECI systems is ensured.

In order to ensure the integrity and completeness of the test of the all-electronic interlocking system, the fault test is usually manually performed, but the manual test is time-consuming and requires relatively experienced personnel to operate, so that the test efficiency is low.

In order to overcome the defects, the invention provides an all-electronic interlocking test system, an all-electronic interlocking test method, an all-electronic interlocking test device and electronic equipment. The following describes an exemplary system, method, apparatus and electronic device for testing an all-electronic interlock provided by the present invention with reference to fig. 1-12.

FIG. 1 is a schematic diagram of an all-electronic interlock testing system according to the present invention, as shown in FIG. 1, the system includes:

a train automatic monitoring system (Automatic Train Supervision, ATS), an interlock subsystem, a simulated fault device and a simulated trackside device, the interlock subsystem being connected with the ATS and the simulated trackside device respectively, the simulated fault device being connected with the interlock subsystem and the simulated trackside device respectively;

Specifically, in the embodiment of the invention, in order to overcome the defect that the test efficiency is low because the existing manual test is time-consuming and requires relatively skilled personnel to operate, the invention selects the first indication information of the fault of the all-electronic interlocking system of the target class designated by the user through the simulation fault device and sends the first indication information to the simulation track side equipment or the interlocking subsystem, the simulation track side equipment simulates the fault of the target class based on the first indication information and sends the state information of the simulation track side equipment to the interlocking subsystem, and the interlocking subsystem sends the second indication information for indicating the ATS to perform abnormal alarm based on the first indication information or the state information of the simulation track side equipment; the fault information of the all-electronic interlocking system in different categories can be selected based on the simulation fault device, so that the integrity of the all-electronic interlocking system test can be ensured, the fault setting time can be greatly shortened, and the test efficiency is improved.

Optionally, the full-electronic interlocking test system provided by the embodiment of the invention may include an ATS, an interlocking subsystem, a simulated fault device and a simulated trackside device, where the interlocking subsystem is connected with the ATS and the simulated trackside device, and the simulated fault device is connected with the interlocking subsystem and the simulated trackside device, respectively.

Optionally, the all-electronic interlocking test system provided by the embodiment of the invention can further comprise VOBC, ZC, a distributed control system (Distributed Control System, DCS) and the like.

Optionally, the simulation fault device may be configured to receive a fault test instruction input by a user, select first indication information of a fault of the all-electronic interlocking system of the target class based on the fault test instruction, and send the first indication information to the simulation trackside equipment or the interlocking subsystem.

Optionally, a fault scenario test selection menu may be provided on the simulation fault device, so that the user can select faults of a target class desired to be tested, such as hardware faults, data faults, protocol faults, and the like.

It can be appreciated that in the embodiment of the invention, different types of faults can be selected by the simulation fault device, and the complicated process of manufacturing the different types of faults according to test requirements in the prior art can be omitted.

Alternatively, the simulated trackside equipment may be used to simulate the occurrence of a target class of fault by the trackside equipment based on the first indication information sent by the simulated fault device and to send status information of the simulated trackside equipment to the interlock subsystem, such as status information of trackside equipment such as annunciators, switches, platform doors, and personnel protection switches (Staff Protection Key Switch, SPKS) to the interlock subsystem.

Optionally, the interlocking subsystem may be configured to send second indication information to the ATS based on the first indication information sent by the simulated fault device or the status information of the simulated trackside device sent by the simulated trackside device, where the second indication information is used to instruct the ATS to perform an anomaly alarm.

For example, when a user selects a switch fault menu on the simulation fault device and sets a fault switch ID as a switch at the junction shunting position of the vehicle section and the test line, the simulation trackside equipment immediately reports the fault information to the interlocking subsystem, and after the abnormal state is judged by the interlocking subsystem, the test operation in the running process of the test line is canceled, and if the test operation is not performed, the vehicle section is controlled to not allow the test.

Optionally, the ATS may issue an operation command to the interlock subsystem, and the interlock subsystem performs a logic operation on the operation command and the received status information of the trackside device, so as to issue a control command to the object controller to drive the outdoor signal or the switch action.

It will be appreciated that ECI is comprised of a computer interlock and execution unit object controller that receives and processes interface information from other systems (e.g., ATS, ZC and VOBC) and that the object controller collects and drives the trackside equipment in real time. In the embodiment of the invention, the user can select the target fault type through the simulation fault device, and the simulation fault device automatically transmits corresponding faults to the simulation trackside equipment based on the target fault type selected by the user, so that whether the test phenomenon accords with the expected result can be observed and judged, and a test report is generated based on the test result.

According to the full-electronic interlocking test system provided by the invention, the first indication information of the full-electronic interlocking system faults of the target class designated by the user is selected through the simulation fault device, and the first indication information is sent to the simulation trackside equipment or the interlocking subsystem, so that the simulation trackside equipment simulates the target class faults based on the first indication information, and sends the state information of the simulation trackside equipment to the interlocking subsystem, and the interlocking subsystem further sends the second indication information for indicating the ATS to perform abnormal alarm based on the first indication information or the state information of the simulation trackside equipment; the fault information of the all-electronic interlocking system in different categories can be selected based on the simulation fault device, so that the integrity of the all-electronic interlocking system test can be ensured, the fault setting time can be greatly shortened, and the test efficiency is improved.

Optionally, the system further comprises a simulation axle counting device, wherein the simulation axle counting device is deployed on the simulation trackside device;

Specifically, in the embodiment of the invention, the full-electronic interlocking test system can further comprise a simulated axle counting device, the simulated axle counting device can simulate an axle counting fault, axle counting fault information is generated, and the generated axle counting fault information is sent to the interlocking subsystem through the simulated rail side device.

For example, when the simulated axle counting device reports the abnormal axle counting data configuration to the interlocking subsystem, the interlocking subsystem sends the full occupied state to the ATS to guide to the safety side after receiving the axle counting fault information.

Optionally, the simulation axle counting device can be deployed on the simulation track side device, namely, the simulation axle counting device and the simulation track side device can be built on the same machine to perform data interaction, and track section occupation, clearing and abnormal state information are transmitted.

Optionally, in the embodiment of the invention, besides the axle counting faults can be simulated by the simulated axle counting equipment, different types of axle counting faults (including inconsistent comparison of the number of axle counting sections, incorrect configuration of the axle counting ID and the like) can be selected by the simulated fault device, so that the phenomena of ECI and ATS under different faults can be observed.

It can be understood that the simulation fault device provided by the embodiment of the invention is more convenient to switch, and more fault types are set at one time, so that the test is more comprehensive and more efficient.

According to the full-electronic interlocking test system provided by the invention, the axle counting fault is simulated through the simulation axle counting equipment, so that the test of an axle counting information fault scene aiming at the ECI is realized.

Optionally, the system further comprises a simulation IO device, wherein the simulation IO device is respectively connected with the simulation fault device, the simulation trackside device and the interlocking subsystem;

Specifically, in the embodiment of the present invention, the all-electronic interlock test system may further include a simulation IO device, where the simulation IO device is connected to the simulation fault device, the simulation rail side device, and the interlock subsystem, and the simulation IO device may be configured to collect state information of the simulation rail side device, send the collected state information of the simulation rail side device to the interlock subsystem, and further be configured to forward first indication information of the target class fault sent by the simulation fault device to the simulation rail side device.

It may be appreciated that in the embodiment of the present invention, the simulated IO device may be a relay IO simulation.

It can be appreciated that in the embodiment of the invention, the interlocking machine subsystem can acquire the occupied state of the simulation trackside equipment through the simulation IO equipment and send a driving command to the simulation IO equipment.

According to the full-electronic interlocking test system provided by the invention, the simulation rail side equipment state information is acquired through the simulation IO equipment, so that the interlocking subsystem can conveniently perform corresponding fault processing based on the simulation rail side equipment state information.

Optionally, the interlock subsystem includes a stand-alone computer interlock (Computer Interlocking, CI) and a stand-alone object controller OC, the stand-alone computer interlock CI being connected to the stand-alone object controller OC.

Specifically, in an embodiment of the present invention, the interlock subsystem may include a stand-alone CI and a stand-alone OC, with the stand-alone CI being connected to the stand-alone OC.

It will be appreciated that the stand-alone CI can receive and process interface information from the ATS, and the stand-alone OC can collect status information of the emulated trackside device in real time and drive the emulated trackside device.

According to the full-electronic interlocking test system provided by the invention, the interlocking subsystem is formed by the single CI and the single OC, so that the state information acquisition and driving of the simulation trackside equipment are facilitated, and the fault processing is realized based on the state information of the simulation trackside equipment.

Optionally, the ATS is deployed in a cloud platform.

Specifically, in the embodiment of the invention, the ATS can be deployed in the cloud platform, and the overall control logic of train operation control can be simplified and hardware devices (such as an ATS cabinet) can be reduced by realizing all-line train route control and trackside equipment resource management through the co-cooperation of the cloud-based ATS and the interlocking subsystem.

Optionally, in the embodiment of the present invention, the simulated fault device, the simulated trackside device, the simulated axle counting device and the simulated IO device may be deployed in the cloud platform, so that hardware devices (such as an axle counting cabinet) may be reduced.

Optionally, in the embodiment of the present invention, two real interlocking cabinet devices (vehicle section interlocking and test line interlocking) may be connected by a serial port communication manner, and the rest of communication subsystem devices may be deployed in the cloud platform.

According to the full-electronic interlocking test system provided by the invention, the ATS is deployed in the cloud platform, so that the train operation control logic can be simplified, and hardware equipment can be reduced.

Fig. 2 is a schematic diagram of connection relationships between subsystems and external systems provided by related art, as shown in fig. 2, including an ECI system, an ATS system, a VOBC system, a ZC system, a trackside electronic unit (Line side Electronic Unit, LEU), etc., it can be seen that the connection relationships between hardware devices are complex, so that it is difficult to implement comprehensive test on an all-electronic interlocking system.

Fig. 3 is a second schematic structural diagram of the full-electronic interlocking test system provided by the invention, as shown in fig. 3, the full-electronic interlocking test system comprises an ATS (ATS cloud), a stand-alone CI, a stand-alone OC, a simulated fault device, a simulated IO, a simulated trackside and a simulated meter shaft, wherein the type of fault to be tested can be selected through the simulated fault device, then the simulated fault device sends fault code bits or fault information frames to the simulated IO or the stand-alone CI, and further the simulated CI can collect fault information beside the simulated track through the simulated IO and send the fault information to the ATS, so that fault processing and fault alarm are realized.

Optionally, in the embodiment of the present invention, the all-electronic interlocking test system may include an interlocking subsystem, an object controller OC (real cabinet+single OC), a test fixture/relay simulation IO, a simulation trackside, a simulation meter axis, a simulation fault device, an ATS monitoring system, a VOBC train control system, a ZC zone controller system, a DCS network communication system, and the like.

Optionally, the state acquisition and driving of the trackside equipment such as the annunciators, the turnout, the platform doors, the SPKS and the like are completed by connecting the OC cabinet with the test fixture cabinet and the simulation trackside equipment. The single machine OC is connected with the simulation IO and the simulation trackside, and the collection and the driving of the states of other trackside equipment in the centralized area are also completed.

Optionally, the interlock subsystem is connected with the ATS system, the ATS issues an operation command to the interlock subsystem, and the interlock subsystem performs a logic operation on the operation command and the collected states of the trackside devices, so as to issue a control command to the object controller, so as to drive the outdoor signal and the switch to act.

Optionally, the simulation fault device is connected with the simulation track side for data transmission. For example, when a user selects a switch failure menu on a simulated failure machine and sets the failed switch ID as the switch at the junction of the vehicle segment and the test line. The simulation track side immediately reports the fault information to the interlocking, after the full-electronic interlocking judges the abnormal state, the running test operation of the test line is canceled, and the vehicle section does not allow the test any more when the running test operation is not performed.

Optionally, the interlocking subsystem is connected with the VOBC system and the simulation trackside, and the micro-period information inquiry state on the interlocking maintenance machine is observed under the scenes that multiple trains are communicated with the interlocking and the like. And limiting conditions are set according to the maximum value effective data of the microcycle redundancy, so that dangerous events such as interlocking downtime and the like are avoided.

It will be appreciated that using a simulated failsafe, the maximum microcycle time for laboratory simulation of transmitting real VOBC to ECI communications without multiple real vehicles, with and with only one real VOBC, the test is developed ahead of time, and development costs are saved to some extent.

It should be noted that, different from the common interlocking test system and method, the full-electronic interlocking test system provided by the embodiment of the invention is described below by taking three scenes of serial port communication test run fault scenes, external professional axle counting fault scenes and micro-period processing maximum redundancy as examples.

Fig. 4 is a schematic flow chart of a test run functional fault scenario test provided by the related art, as shown in fig. 4, aiming at the test run functional fault scenario test, the conventional test method needs the track side device, the OC device, the IO device and the CI device to cooperate to complete the fault code bit collection, and the test process is complicated, so that the test efficiency is lower.

Fig. 5 is a schematic flow chart of the test run functional fault scenario test provided by the invention, as shown in fig. 5, aiming at the test run functional fault scenario test, the simulation fault device can directly send switch fault code bits to the CI, so that fault processing is realized through the CI, fault setting time is shortened based on the simulation fault device, and test efficiency is improved.

Optionally, in the embodiment of the invention, for testing the fault scene of the test run function of the ECI, when the systems are normally connected, the vehicle section interlocking and the test run interlocking are real devices and are connected through serial lines, the turnout and the shunting signal on the test run are controlled by the interlocking of the vehicle section, and after the three elements of the section, the shunting signal and the turnout are normally checked by the vehicle section interlocking, the vehicle section control room and the test run control room finish the control right after the control right is switched.

In the process of test run, the test run line interlock should continuously check the allowed test run condition sent by the vehicle section without interruption, and once the condition is not met, such as the switch of the test run line is out of table (sent by the fault simulator simulation), the interlock immediately turns off the 'test run approval' indicator lamp, and meanwhile sends the test run line to the ZC in an unlocked state, and the ZC applies emergency brake to the train under test run.

Fig. 6 is a schematic flow chart of an axle counting fault scenario test provided by the related art, as shown in fig. 6, aiming at the axle counting fault scenario test, in the existing test method, fault information is manufactured through simulation axle counting, the manufactured fault information is sent to a simulation rail side, further, a simulation IO collects the fault information to the simulation rail side, and the collected fault information is sent to a simulation CI to perform axle counting fault processing, so that the test efficiency is lower due to the fact that the axle counting fault information is required to be manufactured through simulation.

Fig. 7 is a schematic flow chart of the axle counting fault scenario test provided by the invention, as shown in fig. 7, aiming at the axle counting fault scenario test, the simulation fault device can directly send axle counting fault code bits to the simulation CI, and then the simulation CI carries out axle counting fault processing based on the axle counting fault code bits sent by the simulation fault device, namely, the complicated process of manufacturing axle counting fault information is omitted, and the test efficiency is improved.

Optionally, in the embodiment of the present invention, for the axle counting fault scenario test of the ECI, if the number of axle counting sections in the single/multiple centralized areas selected by the simulation fault device is inconsistent with the number of axle counting sections configured by the signal system data, the initialization of the simulation trackside software is failed, the simulation trackside software cannot be started, and after the interlocking subsystem collects the fault information, the full occupation information of the axle counting sections is immediately sent to the ATS, so that the fault investigation is performed by the artificial emergency organization; under the condition that the simulation fault device selects a single axle counting ID to be wrong, the trackside simulation software is normally started, after the fault axle counting ID is received, the section occupation related to the axle counting is sent to the interlocking subsystem, and the interlocking subsystem forwards the section occupation information of the ATS axle counting.

Fig. 8 is a schematic flow chart of a micro-period processing time-out fault scenario test provided by the related art, as shown in fig. 8, aiming at the micro-period processing time-out fault scenario test, the existing test method needs to monitor the processing time of an input micro-period, an application micro-period, an output micro-period and an idle micro-period respectively, so as to judge the correctness of a test result, and is time-consuming.

Fig. 9 is a schematic flow chart of the micro-period processing time-out fault scenario test provided by the invention, as shown in fig. 9, aiming at the micro-period processing time-out fault scenario test, the corresponding micro-period processing time-out fault can be directly set through a simulation fault device, so that a fault execution result is obtained, and the test efficiency of the micro-period processing time-out fault is improved.

Specifically, in the embodiment of the invention, aiming at the micro-period processing time-out fault scene test of ECI, an emulation fault device can simulate that N rows of vehicles which are communicated with an interlocking exist beside a track, and simultaneously, N personnel protection switches (Staff Protection Key Switch, SPKS) are opened, and after the information is received by the interlocking, whether the micro-period maximum redundancy amount is met or not is judged. And recording the micro-period data of the interlocking system in normal operation, comparing the micro-period processing with the time-out interlocking downtime, and sending different N values by the simulation fault device, wherein N is a positive integer.

It can be understood that the full-electronic interlocking test system provided by the embodiment of the invention can freely select different types of faults including hardware faults, data faults, protocol faults and the like through the simulation fault device, has simple and clear menu type operation, reduces the requirement on personnel capacity, greatly shortens the fault setting time, and improves the test efficiency and coverage comprehensiveness.

It can be understood that the full-electronic interlocking test system provided by the embodiment of the invention is based on the normal test function scene, the axle counting data acquisition normal scene and the microcycle processing normal scene simulation of the ECI system equipment of the prior communication-based train automatic control system (Communication Based Train Control System, CBTC) test platform, and is added with the automatic fault scene test function on the basis, so that the comprehensiveness of the test can be improved, the integrity of the integrated functions of the system can be ensured, the detection and the positioning of various abnormal states or fault states can be timely and correctly carried out from the system layer, and the response of the system to the fault can be observed. And the standardized test process is prevented, the test granularity is increased, more problems are found and solved in time, the test time is effectively saved, the test cost is reduced, and the test quality is improved.

It can be understood that the full-electronic interlocking test system provided by the embodiment of the invention can cover three scenes of hardware equipment faults, data faults and micro-period processing overtime faults, more comprehensively verify the functions of the full-electronic interlocking system, record the test response of fault nodes, greatly enrich the test scenes and verification phenomena and improve the indoor test quality.

The method for testing the all-electronic interlocking provided by the invention is described below, and the method for testing the all-electronic interlocking described below and the system for testing the all-electronic interlocking described above can be referred to correspondingly.

FIG. 10 is a schematic flow chart of the full-electronic interlock testing method provided by the invention, as shown in FIG. 10, the method is applied to a simulated fault device, and comprises the following steps:

step 1000, receiving a fault test instruction;

step 1010, sending first indication information of a target class fault to the simulation trackside equipment or the interlocking subsystem based on the fault test instruction, where the first indication information is used to instruct the simulation trackside equipment to simulate the target class fault, or is used to instruct the interlocking subsystem to send second indication information to an ATS, and the second indication information is used to instruct the ATS to perform an abnormal alarm.

The invention provides a full-electronic interlocking test method, wherein a user finger is selected through a simulation fault device

The method comprises the steps of determining first indication information of all-electronic interlocking system faults of target types, sending first indication 5 information to simulation trackside equipment or an interlocking subsystem, and enabling the simulation trackside equipment to be based on the first information

The indication information simulates a target class fault, and sends state information of the simulation trackside equipment to the interlocking subsystem, and the interlocking subsystem further sends second indication information for indicating the ATS to perform abnormal alarm to the ATS based on the first indication information or the state information of the simulation trackside equipment; i.e.

Through the simulation fault device, the fault information of all-electronic interlocking systems of different types can be selected, and 0 not only can ensure the integrity of the test of the all-electronic interlocking systems, but also can greatly shrink

Short fault setting time and improved test efficiency.

It should be noted that, the all-electronic interlocking test method provided by the embodiment of the present invention can implement all functions implemented by the all-electronic interlocking test system embodiment, and

the same technical effects can be achieved, and the details of the same parts and advantageous effects as those of the system embodiment 5 in this embodiment will not be described here.

The invention provides an all-electronic interlocking testing device, and the all-electronic interlocking testing device and the all-electronic interlocking testing method described below can be referred to correspondingly.

FIG. 11 is a schematic structural diagram of an all-electronic interlock testing device according to the present invention, as shown in FIG. 0, the device is applied to a simulation fault device, and includes: receiving module 1110 and transmitting module

A block 1120; wherein:

the receiving module 1110 is configured to receive a fault test instruction;

the sending module 1120 is used for sending the fault test instruction to the simulation trackside equipment or the simulation trackside equipment

The lock subsystem sends first indication information of a target class fault, wherein the first indication information is used for 5 indicating the simulation trackside equipment to simulate the target class fault or is used for indicating the interlocking

The subsystem sends second indication information to the ATS, wherein the second indication information is used for indicating the ATS to carry out abnormal alarm.

According to the full-electronic interlocking testing device, the first indication information of the full-electronic interlocking system faults of the target type specified by the user is selected through the simulation fault device, the first indication information is sent to the simulation trackside equipment or the interlocking subsystem, the simulation trackside equipment simulates the target type faults based on the first indication information, the state information of the simulation trackside equipment is sent to the interlocking subsystem, and the second indication information for indicating the ATS to perform abnormal alarm is sent to the ATS by the interlocking subsystem based on the first indication information or the state information of the simulation trackside equipment; the fault information of the all-electronic interlocking system in different categories can be selected based on the simulation fault device, so that the integrity of the all-electronic interlocking system test can be ensured, the fault setting time can be greatly shortened, and the test efficiency is improved.

It should be noted that, the above all-electronic interlocking testing device provided by the embodiment of the present invention can implement all the method steps implemented by the above all-electronic interlocking testing method embodiment, and can achieve the same technical effects, and detailed descriptions of the same parts and beneficial effects as those of the method embodiment in the present embodiment are omitted.

Fig. 12 is a schematic physical structure of an electronic device according to the present invention, and as shown in fig. 12, the electronic device may include: processor 1210, communication interface (Communications Interface), 1220, memory 1230 and communication bus 1240, wherein processor 1210, communication interface 1220 and memory 1230 communicate with each other via communication bus 1240. Processor 1210 may invoke logic instructions in memory 1230 to perform the all-electronic interlock test method provided by the methods described above, including:

receiving a fault test instruction;

In addition, the logic instructions in the memory 1230 described above may be implemented in the form of software functional units and sold or used as a stand-alone product, stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

In another aspect, the present invention also provides a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, enable the computer to perform the method of all-electronic interlock testing provided by the methods described above, the method comprising:

Receiving a fault test instruction;

In yet another aspect, the present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the all-electronic interlock testing method provided above, the method comprising:

receiving a fault test instruction;

The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.

From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An all-electronic interlock testing system, comprising:

2. The all-electronic interlock testing system of claim 1 further comprising a simulated axle counting device disposed on the simulated trackside device;

3. The all-electronic interlock testing system of claim 1 further comprising a simulated IO device connected to the simulated failsafe, the simulated trackside device, and the interlock subsystem, respectively;

4. The all-electronic interlock testing system of claim 1 wherein the interlock subsystem comprises a stand-alone computer interlock CI and a stand-alone object controller OC, the stand-alone computer interlock CI being connected to the stand-alone object controller OC.

5. The all-electronic interlock testing system of any one of claims 1-4 wherein the ATS is deployed in a cloud platform.

6. An all-electronic interlock testing method applied to the all-electronic interlock testing system of any one of claims 1-5, characterized in that it is applied to the simulation failsafe, the method comprising:

Receiving a fault test instruction;

7. An all-electronic interlock testing apparatus for use with a simulated fault device, said apparatus comprising:

the receiving module is used for receiving the fault test instruction;

8. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the all-electronic interlock test method of claim 6 when the program is executed by the processor.

9. A non-transitory computer readable storage medium having stored thereon a computer program which when executed by a processor implements the all-electronic interlock test method of claim 6.

10. A computer program product comprising a computer program which, when executed by a processor, implements the all-electronic interlock test method of claim 6.