CN116257342A

CN116257342A - Configurable fault-tolerant star software task scheduling system based on multi-core processor

Info

Publication number: CN116257342A
Application number: CN202310170290.3A
Authority: CN
Inventors: 李路; 贺俊旺; 陈雯; 徐东晓; 卞正阳; 孙宪飞
Original assignee: Shanghai Engineering Center for Microsatellites; Innovation Academy for Microsatellites of CAS
Current assignee: Shanghai Engineering Center for Microsatellites; Innovation Academy for Microsatellites of CAS
Priority date: 2023-02-27
Filing date: 2023-02-27
Publication date: 2023-06-13

Abstract

A configurable fault-tolerant star software task scheduling system based on a multi-core processor is configured into a low-power consumption mode, a triple-modular redundancy mode or a high-performance mode through the static configuration of at least three processors, and the dynamic configuration is realized by performing mode switching according to the satellite running state and the task requirements; the invention can fully utilize the advantages of the multi-core processor in various scenes; the implementation cost is low, no additional hardware is needed to realize arbitration, and the fault detection and the debugging are convenient; the function is flexible, and the working mode can be dynamically configured according to the satellite running state and the remote control instruction.

Description

Configurable fault-tolerant star software task scheduling system based on multi-core processor

Technical Field

The invention relates to the field of software and hardware of a star service computer, in particular to a configurable fault-tolerant star service software task scheduling system based on a multi-core processor.

Background

With the continuous improvement of the satellite system on the requirements of control frequency, autonomous operation capability, fault diagnosis capability and the like, the single-core processor is limited by moore's law and influenced by power wall factors, and cannot further improve the computing capability under the condition of limited power, so that the single-core processor gradually becomes the bottleneck of satellite control and information system design. Multi-core processors have greater advantages in terms of computing power and power consumption. Therefore, the use of multi-core processors in satellite control and data processing unit designs is a necessary option to increase the processing power of satellite information systems.

When the satellite is in a space radiation environment, the electronic equipment of the satellite is impacted by various high-energy particles, and a certain radiation effect is generated. The radiation effect is mainly: total dose of radiation, single event latch, single event flip. The failure rate caused by single event upset is approximately 40%, and the single event upset is one of main reasons for satellite on-orbit failure. The fault caused by single event upset belongs to repairability fault, and can be corrected by hardware redundancy, data coding and other error-tolerant technologies. How to design a fault tolerance scheme according to the requirements of a multi-core processor and star software is an important problem worthy of exploration.

The comparison document CN112667450a discloses a fault-tolerant system of a dynamically configurable multi-core processor, which performs a hardware state saving operation on a register of a main core CPU0, saves the checkpoint state saving operation of the CPU1 and the CPU2 to an on-chip SRAM in a software manner, and normally enables the dynamic operation to be transparent to the software, so that the software only needs to execute the checkpoint state saving when receiving a mode switching signal, and reads when recovering. However, all processors are required to be started in all three modes, the power consumption loss is large, and aiming at the granularity of an instruction level, the fault tolerance processing is carried out on each 1bit data stream output by using a three-mode redundancy mode, so that a special voting circuit is required.

Disclosure of Invention

In order to overcome the defects of the prior art, particularly the prior fault-tolerant technology has higher implementation cost and needs additional hardware; the conventional fault-tolerant system is difficult to dynamically configure aiming at the problems of satellite running states and task demands, and the like, and provides a configurable fault-tolerant star software task scheduling system based on a multi-core processor.

The technical scheme of the invention is as follows:

a configurable fault-tolerant star software task scheduling system based on a multi-core processor is characterized in that the system is statically configured into a low-power consumption mode, a three-mode redundancy mode or a high-performance mode through configuration of at least three processors, and the system is dynamically configured by performing mode switching according to satellite running states and task demands;

the low-power mode starts 1 processor core and runs star software with basic functions;

the three-mode redundancy mode enables at least 4 processor cores, wherein 1 processor core controls and supervises the operation of other modules, operates the data acquisition module and operates the arbitration module, and the other 3 processor cores respectively operate each functional module of the service software at the same time, and the arbitration unit arbitrates the calculation result and then transmits the result to each execution mechanism;

and the high-performance mode enables a plurality of processor cores, and each processor core independently runs the star software module distributed on the processor cores by adopting partition scheduling.

The mode switching module is used for switching the task scheduling mode of the configurable fault-tolerant star software according to the instruction when a remote control instruction is received, and automatically/manually switching to a low-power consumption mode when the whole star is in shortage of energy.

The multi-core processor is a 4-core SMP processor and the SMP processor.

The arbitration module adopts a voting system to vote according to the calculation results of the three fault-tolerant processors, and the result with a large number of votes is used as output.

The star software with the basic functions comprises a supervision module, a data acquisition module, a gesture control module, an energy module, a thermal control module, a remote control module, a telemetry module and a ground measurement module.

Compared with the prior art, the invention has the beneficial effects that:

(1) The invention can fully utilize the advantages of the multi-core processor in various scenes; the implementation cost is low, no additional hardware is needed to realize arbitration, and the fault detection and the debugging are convenient; the function is flexible, and the working mode can be dynamically configured according to the satellite running state and the remote control instruction;

(2) The implementation of the application hierarchy is applicable to a variety of processor architectures and operating systems.

(3) The method is characterized in that for module-level (thread-level) granularity, switching is performed based on thread migration and thread starting and stopping, partition scheduling of modules is comprehensively considered based on the module-level granularity, and only the final results of calculation modules except a supervision module and a data acquisition module are subjected to fault tolerance processing by using triple-modular redundancy, and a special voting circuit is not needed.

Drawings

FIG. 1 is a schematic diagram of a low power mode

FIG. 2 is a schematic diagram of a triple modular redundancy scheme

FIG. 3 high performance mode schematic

FIG. 4 is a schematic diagram of mode switching

Detailed Description

The invention is further illustrated in the following figures and examples, which should not be taken to limit the scope of the invention.

1. Three modes

In order to meet different performance and reliability requirements under different satellite running states and task demands, and fully utilize the multi-core processor in various scenes, the task scheduling of the configurable fault-tolerant star software is realized at an application level, and three modes are provided:

1.1 Low Power consumption mode

When the whole star is energy-intense, the power consumption of the multi-core processor needs to be reduced, and the star software only runs the most basic modules. As shown in fig. 1, in this mode, the star software enters a basic function operation mode, each module executes sequentially according to priority, runs on the processor main core, and shuts down the remaining processor cores.

1.2 triple modular redundancy mode

When the satellite runs in a severe orbit in a space environment, the probability of occurrence of a single event effect is increased, and at the moment, the satellite needs to be switched to a triple-modular redundancy mode, so that the reliability of the system is increased. As shown in fig. 2, the triple modular redundancy mode enables at least 4 processor cores.

A supervision module is operated on the Core0 and is responsible for controlling and supervising the operation of other modules; the data acquisition module is operated to respectively input the acquired sensor data into each fault-tolerant Core; and operating an arbitration module, synchronizing and arbitrating the calculation result after each fault-tolerant Core finishes the calculation of one module, and transmitting the arbitrated data to a corresponding executor.

The arbitration module employs a voting system, and the final result can be determined from the vote, since the transient fault belongs to a small probability event. Voting is carried out according to the calculation results of the three fault-tolerant cores, and the result with a large number of votes is output.

Fault tolerant techniques of data encoding may be employed on Core0 to monitor and correct its own operating conditions.

The Core1, the Core2 and the Core3 are fault-tolerant cores, the same functional modules are respectively operated, the functional modules on each Core are controlled by a supervision module operated on the Core0, the modules are sequentially operated according to priority, and after the module operation is completed, the synchronization of the Core0 is waited.

1.3 high Performance modes

When the satellite performs complex tasks requiring increased computing power, it may switch to a high performance mode. As shown in FIG. 3, high performance mode enablement enables some or all of the processor cores on demand for computing power.

And partitioning scheduling is adopted, the modules are distributed to each core according to the calculated amount and constraint relation among the modules, and each core executes the distributed modules according to the FIFO strategy.

2. Mode switching

The switching between modes can be automatically triggered by the change of the satellite running state, and can also be controlled by a remote control instruction. The switching between modes is shown in fig. 4.

2.1 entering Low Power consumption mode

The star software is reset, processor cores of Core1, core2, core3 and the like are closed, a basic function operation supervision module is established on Core0, and the basic function operation supervision module initializes a data acquisition module, a gesture control module, an energy module, a thermal control module, a remote control module, a telemetry module and a ground measurement module under a basic function operation mode. And the respective modules are sequentially executed in the above order at each cycle.

2.2 entering triple modular redundancy mode

When the low power consumption mode is changed into the triple-modular redundancy mode, the star software is reset, and Core1, core2 and Core3 are started. And a supervision module is created on Core0, the supervision module creates a data acquisition module and an arbitration module on Core0, and copies of all the other functional modules are respectively created on Core1, core2 and Core3.

When the high-performance mode is switched into the triple-mode redundancy mode, the supervision module and the data acquisition module are migrated to Core0, and the modules and functions only running in the high-performance mode are closed. All remaining functional modules are migrated to Core1. Functional module copies are created on Core2, core3, respectively.

2.3 entering high Performance mode

When the low power consumption mode is changed into the high performance mode, the star software is reset, and processor cores such as Core1, core2, core3 and the like are started. And creating a supervision module on the Core0 of the main Core, and creating corresponding belonging modules on each Core by the supervision module according to the partition table.

When the three-mode redundancy mode is used for entering the high-performance mode, the supervision module transfers the created modules to the corresponding cores according to the partition table, creates the modules which only operate in the high-performance mode on the corresponding cores, and opens the functions which only operate in the high-performance mode.

Claims

1. A configurable fault-tolerant star software task scheduling system based on a multi-core processor is characterized in that the system is statically configured into a low-power consumption mode, a three-mode redundancy mode or a high-performance mode through configuration of at least three processors, and the system is dynamically configured by performing mode switching according to satellite running states and task demands;

the three-mode redundancy mode enables at least 4 processor cores, wherein 1 processor core controls and supervises the operation of other modules, operates a data acquisition module and operates an arbitration module, and the other 3 processor cores respectively operate each functional module of the service software at the same time, and the arbitration unit arbitrates the calculation result and then transmits the result to each execution mechanism;

2. The configurable fault-tolerant star software task scheduling system based on a multi-core processor of claim 1, wherein the multi-core processor is a 4-core and more SMP processor.

3. The configurable fault-tolerant star software task scheduling system based on a multi-core processor according to claim 1, wherein the arbitration module adopts a voting system to vote according to the calculation results of three fault-tolerant processors, and the result with a large number of votes is output.

4. The task scheduling system of configurable fault-tolerant star software based on a multi-core processor according to claim 1, wherein the star software with basic functions comprises a supervision module, a data acquisition module, a gesture control module, an energy module, a thermal control module, a remote control module, a telemetry module and a ground measurement module.