CN116248048A - Oscillator circuit, oscillator and switching power supply - Google Patents
Oscillator circuit, oscillator and switching power supply Download PDFInfo
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- CN116248048A CN116248048A CN202310520319.6A CN202310520319A CN116248048A CN 116248048 A CN116248048 A CN 116248048A CN 202310520319 A CN202310520319 A CN 202310520319A CN 116248048 A CN116248048 A CN 116248048A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
- H03B5/1262—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising switched elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0081—Power supply means, e.g. to the switch driver
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Abstract
The application is applicable to the technical field of switching power supplies and provides an oscillating circuit, an oscillator and a switching power supply. The oscillating circuit comprises a current generating module, a current adjusting module, a charging and discharging module, a comparing module, a latching module, a frequency dividing module and a logic module; the charging and discharging module is respectively and electrically connected with the comparing module, the latching module, the current generating module and the current adjusting module, the latching module is respectively and electrically connected with the comparing module and the frequency dividing module, the logic module is respectively and electrically connected with the frequency dividing module and the current adjusting module, and the current adjusting module is electrically connected with the current generating module. The oscillating circuit provided by the embodiment of the application solves the problem that the accuracy of the frequency output by an oscillator is low and the intensity of the EMI of a switching power supply cannot be effectively reduced by the existing triangular wave modulation mode.
Description
Technical Field
The application belongs to the technical field of switching power supplies, and particularly relates to an oscillating circuit, an oscillator and a switching power supply.
Background
DC-DC (Direct Current-Direct Current) switching power supplies are widely used in various electronic systems, but electromagnetic interference generated by the DC-DC switching power supplies often affects the operation of surrounding electronic systems, for example, electromagnetic interference of a power chip of an automotive electronic system causes interference to an in-car radio, communication equipment and the like. In order to reduce the influence of EMI (Electromagnetic Interference ), a solution is adopted in which a disturbance signal is introduced at a high-frequency switching frequency point, so that the frequency spectrum is dispersed, and the intensity of EMI is reduced.
Four common frequency modulation schemes are: sine wave modulation, triangular wave modulation, exponential modulation, and random signal modulation. Sine wave modulation is easy to analyze and implement, but does not produce optimal spectral distribution; exponential modulation can produce flat spectra but is difficult to achieve in practice; the random signal modulation modulates the system through irregular signals, and the effect of restraining the EMI is superior to the other three periodic signal modulations, but the realization difficulty is high; triangular wave modulation achieves a good compromise between the modulated spectral distribution and implementation difficulty.
The existing triangular wave modulation mode is to disturb the reference voltage, so that the frequency output by the oscillator is affected by the reference voltage. Since the reference voltage is generated by an external circuit and is affected by various external parameters, the accuracy of the frequency output by the oscillator is low, and the intensity of the EMI of the switching power supply cannot be effectively reduced.
Disclosure of Invention
The embodiment of the application provides an oscillating circuit, an oscillator and a switching power supply, which can solve the problem that the prior triangular wave modulation mode enables the accuracy of the frequency output by the oscillator to be lower and the intensity of the EMI of the switching power supply can not be effectively reduced.
In a first aspect, an embodiment of the present application provides an oscillating circuit, including a current generating module, a current adjusting module, a charging and discharging module, a comparing module, a latch module, a frequency dividing module, and a logic module; the charging and discharging module is respectively and electrically connected with the comparing module, the latching module, the current generating module and the current adjusting module, the latching module is respectively and electrically connected with the comparing module and the frequency dividing module, the logic module is respectively and electrically connected with the frequency dividing module and the current adjusting module, and the current adjusting module is electrically connected with the current generating module;
the latch module is used for outputting a control signal to the charge-discharge module according to the comparison signal, and is also used for outputting an oscillation signal to the frequency division module; the frequency division module is used for dividing the frequency of the oscillation signal and transmitting the obtained frequency division signal to the logic module; the logic module is used for outputting N-bit periodically-changed logic signals according to the frequency division signals and transmitting the N-bit logic signals to the current regulation module, wherein N is a natural number greater than or equal to 1; the current generation module is used for receiving bias current, outputting charging current to the charging and discharging module according to the bias current, and outputting reference voltage to the comparison module; the current generation module is further used for providing a first voltage and a second voltage for the current regulation module; the current adjusting module is used for outputting adjustable first current according to the first voltage, the second voltage and the N-bit logic signal, and the first current is used for adjusting the magnitude of the charging current; the charging and discharging module is used for outputting a third voltage to the comparison module according to the control signal and the charging current; the comparison module is used for outputting the comparison signal and the oscillation signal to the latch module according to the third voltage and the reference voltage.
In a possible implementation manner of the first aspect, the current generating module includes a first resistor, a second resistor, a first switching tube, a second switching tube, a third switching tube, a fourth switching tube, a fifth switching tube, and a sixth switching tube; the first conducting end of the first switching tube is electrically connected with the control end of the second switching tube and is used for receiving the bias current; the control end of the first switching tube is electrically connected with the second conducting end of the second switching tube, the first end of the first resistor and the comparison module respectively; the second conducting end of the first switch tube and the second end of the first resistor are grounded; the first conducting end of the second switching tube is electrically connected with the first end of the second resistor, the control end of the fourth switching tube, the control end of the sixth switching tube and the current regulating module respectively; the second end of the second resistor is electrically connected with the first conducting end of the fourth switching tube, the control end of the third switching tube, the control end of the fifth switching tube and the current regulating module respectively; the second conducting end of the fourth switching tube is electrically connected with the first conducting end of the third switching tube; the second conducting end of the third switching tube and the second conducting end of the fifth switching tube are both used for receiving power supply voltage; the first conducting end of the fifth switching tube is electrically connected with the second conducting end of the sixth switching tube; and the first conducting end of the sixth switching tube is respectively and electrically connected with the charge-discharge module and the current regulating module.
In a possible implementation manner of the first aspect, the current regulation module includes N current regulation units, where N is a natural number greater than or equal to 1; the N current regulating units and the current generating module are electrically connected with the charging and discharging module, and the N current regulating units are also electrically connected with the logic module and the current generating module respectively;
each current regulating unit is used for receiving the first voltage, the second voltage and the logic signal, outputting an adjustable first sub-current according to the first voltage, the second voltage and the logic signal, and superposing N paths of the first sub-currents to obtain the first current.
In a possible implementation manner of the first aspect, each of the current regulation units includes a seventh switching tube, an eighth switching tube, and a ninth switching tube; the control end of the seventh switching tube is electrically connected with the current generation module; the second conducting end of the seventh switching tube is used for receiving the power supply voltage; the first conducting end of the seventh switching tube is electrically connected with the second conducting end of the eighth switching tube; the control end of the eighth switching tube is electrically connected with the current generation module; the first conducting end of the eighth switching tube is electrically connected with the second conducting end of the ninth switching tube; the control end of the ninth switching tube is electrically connected with the logic module; and the first conducting end of the ninth switching tube is respectively and electrically connected with the current generating module and the charging and discharging module.
In a possible implementation manner of the first aspect, the charge-discharge module includes a tenth switching tube, an eleventh switching tube, and a first capacitor; the second conducting end of the tenth switching tube is respectively and electrically connected with the current generating module and the current regulating module; the first conducting end of the tenth switching tube is electrically connected with the first conducting end of the eleventh switching tube, the first end of the first capacitor and the comparison module respectively; the control end of the tenth switching tube is electrically connected with the control end of the eleventh switching tube and the latch module respectively; the second conducting end of the eleventh switching tube and the second end of the first capacitor are grounded.
In a possible implementation manner of the first aspect, the charge-discharge module further includes a twelfth switching tube, a thirteenth switching tube, and a second capacitor; the second conducting end of the twelfth switching tube is electrically connected with the second conducting end of the tenth switching tube, the current generating module and the current regulating module respectively; the first conducting end of the twelfth switching tube is electrically connected with the first conducting end of the thirteenth switching tube, the first end of the second capacitor and the comparison module respectively; the control end of the twelfth switching tube is electrically connected with the control end of the thirteenth switching tube and the latch module respectively; the second conducting end of the thirteenth switching tube and the second end of the second capacitor are grounded.
In a possible implementation manner of the first aspect, the comparing module includes a first comparator and a second comparator; the non-inverting input end of the first comparator is electrically connected with the charge-discharge module, the inverting input end of the first comparator is electrically connected with the inverting input end of the second comparator and the current generation module respectively, and the output end of the first comparator is electrically connected with the latch module; and the non-inverting input end of the second comparator is electrically connected with the charge-discharge module, and the output end of the second comparator is electrically connected with the latch module.
In a possible implementation manner of the first aspect, the latch module includes a first nor gate, a second nor gate, a third nor gate, and a fourth nor gate; the first input end of the first nor gate is electrically connected with the comparison module, the second input end of the first nor gate is electrically connected with the output end of the second nor gate and the input end of the third nor gate respectively, the output end of the first nor gate is electrically connected with the input end of the first nor gate and the first input end of the second nor gate respectively, the output end of the first nor gate is electrically connected with the input end of the second nor gate and the charge-discharge module respectively, the output end of the second nor gate is electrically connected with the charge-discharge module, the second input end of the second nor gate is electrically connected with the comparison module, the output end of the third nor gate is electrically connected with the input end of the fourth nor gate, and the output end of the fourth nor gate is electrically connected with the frequency division module.
In a second aspect, embodiments of the present application provide an oscillator, including an oscillating circuit as set forth in any one of the first aspects.
In a third aspect, embodiments of the present application further provide a switching power supply, including the oscillator in the second aspect.
Compared with the prior art, the embodiment of the application has the beneficial effects that:
the embodiment of the application provides an oscillating circuit, which comprises a current generation module, a current regulation module, a charge-discharge module, a comparison module, a latch module, a frequency division module and a logic module. The charge-discharge module is electrically connected with the comparison module, the latch module, the current generation module and the current regulation module respectively. The latch module is electrically connected with the comparison module and the frequency division module respectively. The logic module is electrically connected with the frequency dividing module and the current adjusting module respectively. The current adjusting module is electrically connected with the current generating module.
The latch module is used for outputting a control signal to the charge-discharge module according to the comparison signal, and is also used for outputting an oscillation signal to the frequency division module. The frequency division module is used for dividing the frequency of the oscillation signal and transmitting the obtained frequency division signal to the logic module. The logic module is used for outputting N-bit logic signals which are periodically changed according to the frequency division signals and transmitting the N-bit logic signals to the current regulating module, wherein N is a natural number which is greater than or equal to 1. The current generation module is used for receiving the bias current, outputting charging current to the charging and discharging module according to the bias current, and outputting reference voltage to the comparison module. The current generation module is also used for providing a first voltage and a second voltage for the current regulation module. The current adjusting module is used for outputting adjustable first current according to the first voltage, the second voltage and the N-bit logic signal, and the first current is used for adjusting the magnitude of the charging current so as to adjust the frequency output by the oscillating circuit. The charge-discharge module is used for outputting a third voltage to the comparison module according to the control signal and the charging current. The comparison module is used for outputting a comparison signal and an oscillation signal to the latch module according to the third voltage and the reference voltage.
The triangular wave modulation mode adopted by the method is used for disturbing the charging current, so that the frequency output by the oscillating circuit is influenced by the charging current. According to the method, the output frequency of the oscillating circuit is adjusted by adjusting the size of the charging current, the output frequency of the oscillating circuit is only influenced by the capacity of the capacitor in the charging and discharging module and the charging current, and the charging current is only influenced by the resistance value of the resistor in the current generating module. Therefore, the frequency of the output of the oscillating circuit provided by the embodiment of the application only depends on the capacity of the capacitor in the charge-discharge module and the resistance value of the resistor in the current generation module, so that the influence of various external parameters is reduced, the precision of the frequency of the output of the oscillating circuit is improved, and the intensity of the EMI of the switching power supply is effectively reduced.
In summary, the oscillating circuit provided by the embodiment of the application solves the problem that the existing triangular wave modulation mode enables the accuracy of the frequency output by the oscillator to be low and the intensity of the EMI of the switching power supply cannot be effectively reduced.
It will be appreciated that the advantages of the second to third aspects may be found in the relevant description of the first aspect, and are not described in detail herein.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required for the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic block diagram of an oscillating circuit provided in an embodiment of the present application;
FIG. 2 is a schematic block diagram of an oscillating circuit provided in another embodiment of the present application;
FIG. 3 is a schematic diagram of circuit connection of an oscillating circuit according to an embodiment of the present disclosure;
fig. 4 is a schematic circuit connection diagram of a frequency dividing module in an oscillating circuit according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram showing a change of a 4-bit logic signal output by a logic module in an oscillating circuit according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram showing a result of frequency variation of an output of an oscillating circuit according to an embodiment of the present application.
In the figure: 10. a current generation module; 20. a current regulation module; 201. a current adjusting unit; 30. a charge-discharge module; 40. a comparison module; 50. a latch module; 60. a frequency dividing module; 70. and a logic module.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in this specification and the appended claims, the term "if" may be interpreted in context as "when …" or "upon" or "in response to determining" or "in response to detecting". Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
In addition, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
One implementation of the triangular wave modulation is to change the reference voltage of the comparator according to the triangular wave, so that the frequency of the oscillator output also changes according to the triangular wave. Since the reference voltage is generated by an external circuit and is affected by various external parameters, the accuracy of the frequency output by the oscillator is low, and the intensity of the EMI of the switching power supply cannot be effectively reduced.
In view of the above, the embodiment of the present application provides an oscillating circuit, as shown in fig. 1, which includes a current generating module 10, a current adjusting module 20, a charge and discharge module 30, a comparing module 40, a latch module 50, a frequency dividing module 60, and a logic module 70. The charge and discharge module 30 is electrically connected to the comparison module 40, the latch module 50, the current generation module 10, and the current adjustment module 20, respectively. The latch module 50 is electrically connected to the comparison module 40 and the frequency division module 60, respectively. Logic module 70 is electrically coupled to frequency divider module 60 and current regulation module 20, respectively. The current regulation module 20 is electrically connected to the current generation module 10.
Specifically, the latch module 50 is configured to output a control signal to the charge/discharge module 30 according to the comparison signal, and the latch module 50 is also configured to output an oscillation signal to the frequency division module 60. The frequency division module 60 is configured to divide the frequency of the oscillation signal, and transmit the obtained divided signal to the logic module 70. The logic module 70 is configured to output N-bit logic signals SW1, SW2, … …, SWN that periodically vary according to the frequency division signal, and transmit the N-bit logic signals SW1, SW2, … …, SWN to the current adjusting module 20, where N is a natural number greater than or equal to 1, and each of the N-bit logic signals has two states of 0 and 1. The current generation module 10 is configured to receive a bias current, output a charging current to the charging and discharging module 30 according to the bias current, and output a reference voltage to the comparison module 40. The current generation module 10 is also configured to provide a first voltage and a second voltage to the current regulation module 20. The current adjusting module 20 is configured to output an adjustable first current according to the first voltage, the second voltage, and the N-bit logic signals SW1, SW2, … …, SWN, wherein the first current is used for adjusting the magnitude of the charging current, and further adjusting the frequency of the output of the oscillating circuit. The charge-discharge module 30 is configured to output a third voltage to the comparison module 40 according to the control signal and the charging current. The comparison module 40 is configured to output a comparison signal and an oscillation signal to the latch module 50 according to the third voltage and the reference voltage. The latch module 50 is used for latching the comparison signal and the oscillation signal.
The triangular wave modulation mode adopted by the method is used for disturbing the charging current, so that the frequency output by the oscillating circuit is influenced by the charging current. The frequency of the output of the oscillating circuit is only influenced by the capacity of the capacitor in the charge-discharge module 30 and the charging current, and the charging current is only influenced by the resistance value of the resistor in the current generation module 10. Therefore, the frequency of the output of the oscillating circuit provided by the embodiment of the application only depends on the capacity of the capacitor in the charge-discharge module 30 and the resistance value of the resistor in the current generation module 10, so that the influence of various external parameters is reduced, the precision of the frequency of the output of the oscillating circuit is improved, and the intensity of the EMI of the switching power supply is effectively reduced.
In summary, the oscillating circuit provided by the embodiment of the application solves the problem that the existing triangular wave modulation mode enables the accuracy of the frequency output by the oscillator to be low and the intensity of the EMI of the switching power supply cannot be effectively reduced.
As shown in fig. 3, the current generating module 10 includes a first resistor R1, a second resistor R2, a first switching tube M1, a second switching tube M2, a third switching tube M3, a fourth switching tube M4, a fifth switching tube M5, and a sixth switching tube M6. The first conducting end of the first switching tube M1 is electrically connected to the control end of the second switching tube M2, and is configured to receive the bias current IBIAS. The control end of the first switching tube M1 is electrically connected to the second conducting end of the second switching tube M2, the first end of the first resistor R1, and the comparison module 40, respectively, wherein the voltage at the first end of the first resistor R1 is the reference voltage VREF. The second conducting end of the first switch tube M1 and the second end of the first resistor R1 are grounded. The first conducting end of the second switching tube M2 is electrically connected to the first end of the second resistor R2, the control end of the fourth switching tube M4, the control end of the sixth switching tube M6, and the current adjusting module 20, respectively. The second end of the second resistor R2 is electrically connected to the first conducting end of the fourth switching tube M4, the control end of the third switching tube M3, the control end of the fifth switching tube M5, and the current adjusting module 20, respectively. The second conducting end of the fourth switching tube M4 is electrically connected with the first conducting end of the third switching tube M3. The second conducting end of the third switching tube M3 and the second conducting end of the fifth switching tube M5 are used for receiving the power supply voltage. The first conducting end of the fifth switching tube M5 is electrically connected with the second conducting end of the sixth switching tube M6. The first conducting end of the sixth switching tube M6 is electrically connected to the charge-discharge module 30 and the current adjusting module 20, and the current output from the first conducting end of the sixth switching tube M6 is a charging current.
Specifically, the control end of the second switching tube M2 is configured to receive the bias current IBIAS, and the second switching tube M2 is turned on under the action of the bias current IBIAS. The connection mode of the third switching tube M3 and the fourth switching tube M4 corresponds to the connection mode of a diode, and therefore the third switching tube M3 and the fourth switching tube M4 are turned on. Since the second switching tube M2, the third switching tube M3 and the third switching tube M4 are all turned on, the reference voltage VREF is generated at the first end of the first resistor R1, the first switching tube M1 is turned on under the action of the reference voltage VREF, and the current generating module 10 enters a stable state after the first switching tube M1 is turned on.
As can be seen from the circuit connection relationship of the current generating module 10, the third switching tube M3, the fourth switching tube M4, the second resistor R2, the fifth switching tube M5 and the sixth switching tube M6 form a self-bias current mirror, and the amplification factor of the current mirror is k. Assuming that the charging current is denoted by Icharge, the charging current output from the current generation module 10 to the charge and discharge module 30 may be denoted as icharge=k×vref++r, where R is the resistance value of the first resistor R1.
The first switching tube M1 is an NMOS (N-Metal-Oxide-Semiconductor) tube, the control end of the first switching tube M1 is a gate of the NMOS tube, the first conducting end of the first switching tube M1 is a drain of the NMOS tube, and the second conducting end of the first switching tube M1 is a source of the NMOS tube.
The second switching tube M2 is an NMOS tube, the control end of the second switching tube M2 is a gate of the NMOS tube, the first conduction end of the second switching tube M2 is a drain of the NMOS tube, and the second conduction end of the second switching tube M2 is a source of the NMOS tube.
The third switching tube M3 is a PMOS (positive channel Metal Oxide Semiconductor ) tube, the control end of the third switching tube M3 is a gate of the PMOS tube, the first conductive end of the third switching tube M3 is a drain of the PMOS tube, and the second conductive end of the third switching tube M3 is a source of the PMOS tube.
The fourth switching tube M4 is a PMOS tube, the control end of the fourth switching tube M4 is a gate of the PMOS tube, the first conducting end of the fourth switching tube M4 is a drain of the PMOS tube, and the second conducting end of the fourth switching tube M4 is a source of the PMOS tube.
The fifth switching tube M5 is a PMOS tube, the control end of the fifth switching tube M5 is a gate of the PMOS tube, the first conducting end of the fifth switching tube M5 is a drain of the PMOS tube, and the second conducting end of the fifth switching tube M5 is a source of the PMOS tube.
The sixth switching tube M6 is a PMOS tube, the control end of the sixth switching tube M6 is a gate of the PMOS tube, the first conducting end of the sixth switching tube M6 is a drain of the PMOS tube, and the second conducting end of the sixth switching tube M6 is a source of the PMOS tube.
The current generation module 10 may be replaced by another module that performs its function, and is not limited thereto.
As shown in fig. 2, the current regulation module 20 includes N current regulation units 201, where N is a natural number greater than or equal to 1. The N current adjusting units 201 and the current generating module 10 are electrically connected to the charge and discharge module 30. The N current regulation units 201 are also electrically connected to the logic module 70 and the current generation module 10, respectively.
Specifically, each current adjusting unit 201 is configured to receive a first voltage, a second voltage, and a one-bit logic signal, output an adjustable first sub-current according to the first voltage, the second voltage, and the logic signal, and superimpose N paths of the first sub-currents to obtain a first current.
As shown in fig. 3, each current regulation unit 201 includes a seventh switching tube M7, an eighth switching tube M8, and a ninth switching tube M9. The control terminal of the seventh switching tube M7 is electrically connected to the current generating module 10, and is configured to receive the first voltage. The second conducting end of the seventh switching tube M7 is used for receiving the power supply voltage. The first conducting end of the seventh switching tube M7 is electrically connected to the second conducting end of the eighth switching tube M8. The control terminal of the eighth switching tube M8 is electrically connected to the current generating module 10 for receiving the second voltage. The first conducting end of the eighth switching tube M8 is electrically connected with the second conducting end of the ninth switching tube M9. The control terminal of the ninth switching transistor M9 is electrically connected to the logic module 70, and is configured to receive a logic signal. The first conducting terminal of the ninth switching transistor M9 is electrically connected to the current generating module 10 and the charge-discharge module 30, respectively. As can be seen from fig. 3, the control terminal of the seventh switching tube M7 is electrically connected to the control terminal of the third switching tube M3 and the control terminal of the fifth switching tube M5, respectively, for receiving a first voltage, where the first voltage is a voltage at the control terminal of the third switching tube M3. The control end of the eighth switching tube M8 is electrically connected to the control end of the fourth switching tube M4 and the control end of the sixth switching tube M6, respectively, and is configured to receive a second voltage, where the second voltage is a voltage at the control end of the fourth switching tube M4. The first conducting end of the ninth switching tube M9 is electrically connected to the first conducting end of the sixth switching tube M6 and the charge-discharge module 30, respectively.
Specifically, according to the circuit connection relationship between the current adjusting unit 201 and the current generating module 10, the third switching tube M3, the fourth switching tube M4, the second resistor R2, the seventh switching tube M7, the eighth switching tube M8, and the ninth switching tube M9 form a self-bias current mirror, and the amplification factor of the current mirror is k. When the logic signal received by the current adjusting unit 201 is 1, the first sub-current output by the current adjusting unit 201 is k×vref/R, where R is the resistance value of the first resistor R1. When the logic signal received by the current adjusting unit 201 is 0, the first sub-current output by the current adjusting unit 201 is 0. From the above, the minimum value of the first sub-current is 0, and the maximum value of the first sub-current is kXVREF/R, where R is the resistance value of the first resistor R1. The minimum value of the first current is 0 and the maximum value of the first current is nxkvref/R, where R is the resistance of the first resistor R1. The first current may be expressed as n1×k×vref/R, where R is the resistance of the first resistor R1, n1=0, 1, 2, … …, N. The charging current may be expressed as icharge=k×vref ++n1×k×vref ++r, where R is the resistance of the first resistor R1, n1=0, 1, 2, … …, N. The first current is used for adjusting the magnitude of the charging current, and then adjusting the frequency of the output of the oscillating circuit.
The seventh switching tube M7 is a PMOS tube, the control end of the seventh switching tube M7 is a gate of the PMOS tube, the first conducting end of the seventh switching tube M7 is a drain of the PMOS tube, and the second conducting end of the seventh switching tube M7 is a source of the PMOS tube.
The eighth switching tube M8 is a PMOS tube, the control end of the eighth switching tube M8 is a gate of the PMOS tube, the first conducting end of the eighth switching tube M8 is a drain of the PMOS tube, and the second conducting end of the eighth switching tube M8 is a source of the PMOS tube.
The ninth switching tube M9 is a PMOS tube, the control end of the ninth switching tube M9 is a gate of the PMOS tube, the first conducting end of the ninth switching tube M9 is a drain of the PMOS tube, and the second conducting end of the ninth switching tube M9 is a source of the PMOS tube.
Note that the current adjusting unit 201 may be replaced with another unit that realizes the function thereof, and is not limited thereto.
As shown in fig. 3, the charge-discharge module 30 includes a tenth switching tube M10, an eleventh switching tube M11, and a first capacitor C1. The second conducting end of the tenth switching tube M10 is electrically connected to the current generating module 10 and the current adjusting module 20, respectively. The first conducting end of the tenth switching tube M10 is electrically connected to the first conducting end of the eleventh switching tube M11, the first end of the first capacitor C1, and the comparing module 40, respectively. The control terminal of the tenth switching transistor M10 is electrically connected to the control terminal of the eleventh switching transistor M11 and the latch module 50, respectively. The second conducting end of the eleventh switch tube M11 and the second end of the first capacitor C1 are grounded. As shown in fig. 3, the charge-discharge module 30 further includes a twelfth switching tube M12, a thirteenth switching tube M13, and a second capacitor C2. The second conductive end of the twelfth switching tube M12 is electrically connected to the second conductive end of the tenth switching tube M10, the current generating module 10, and the current adjusting module 20, respectively. The first conducting end of the twelfth switching tube M12 is electrically connected to the first conducting end of the thirteenth switching tube M13, the first end of the second capacitor C2, and the comparing module 40, respectively. The control terminal of the twelfth switching transistor M12 is electrically connected to the control terminal of the thirteenth switching transistor M13 and the latch module 50, respectively. The second conducting end of the thirteenth switching tube M13 and the second end of the second capacitor C2 are grounded. As shown in fig. 3, the second conducting end of the twelfth switching tube M12 is electrically connected to the second conducting end of the tenth switching tube M10, the first conducting end of the sixth switching tube M6, and the first conducting ends of the N ninth switching tubes M9, respectively. The capacity of the first capacitor C1 is equal to the capacity of the second capacitor C2.
Specifically, the tenth switching tube M10 and the eleventh switching tube M11 are configured to receive a first sub-control signal of the control signals, and the tenth switching tube M10 and the eleventh switching tube M11 are configured to control charging and discharging of the first capacitor C1 according to the first sub-control signal. The twelfth switching tube M12 and the thirteenth switching tube M13 are used for receiving a second sub-control signal in the control signals, and the twelfth switching tube M12 and the thirteenth switching tube M13 are used for controlling the charging and discharging of the second capacitor C2 according to the second sub-control signal. When the first capacitor C1 is charged, the second capacitor C2 is discharged. When the first capacitor C1 is discharged, the second capacitor C2 is charged. Let the frequency of the output of the oscillating circuit be denoted fosc, fosc=ichargex 2/(c×vref), where C is the capacity of the first capacitor C1. Also, since icharge=k×vref ++n 1×k×vref ++r, wherein R is the resistance of the first resistor R1, n1=0, 1, 2, … …, N. Fosc=2×k× (1+n1)/(c×r), where C is the capacity of the first capacitor C1, and R is the resistance of the first resistor R1, n1=0, 1, 2, … …, N. From the above, the frequency of the output of the oscillating circuit is only dependent on the capacity of the first capacitor C1 and the resistance of the first resistor R1, so that the influence of various external parameters is reduced, and the accuracy of the frequency of the output of the oscillating circuit is improved.
The tenth switching tube M10 is a PMOS tube, the control end of the tenth switching tube M10 is a gate of the PMOS tube, the first conducting end of the tenth switching tube M10 is a drain of the PMOS tube, and the second conducting end of the tenth switching tube M10 is a source of the PMOS tube.
The eleventh switch tube M11 is an NMOS tube, the control end of the eleventh switch tube M11 is a gate of the NMOS tube, the first conduction end of the eleventh switch tube M11 is a drain of the NMOS tube, and the second conduction end of the eleventh switch tube M11 is a source of the NMOS tube.
The twelfth switching tube M12 is a PMOS tube, the control end of the twelfth switching tube M12 is a gate of the PMOS tube, the first conducting end of the twelfth switching tube M12 is a drain of the PMOS tube, and the second conducting end of the twelfth switching tube M12 is a source of the PMOS tube.
The thirteenth switching tube M13 is an NMOS tube, the control end of the thirteenth switching tube M13 is a gate of the NMOS tube, the first conducting end of the thirteenth switching tube M13 is a drain of the NMOS tube, and the second conducting end of the thirteenth switching tube M13 is a source of the NMOS tube.
The charge/discharge module 30 may be replaced with another module that realizes the function thereof, and is not limited thereto.
As shown in fig. 3, the comparison module 40 includes a first comparator COMP1 and a second comparator COMP2. The non-inverting input terminal of the first comparator COMP1 is electrically connected to the charge-discharge module 30, and is configured to receive a first sub-voltage of the third voltage output by the charge-discharge module 30. The inverting input terminal of the first comparator COMP1 is electrically connected to the inverting input terminal of the second comparator COMP2 and the current generating module 10, respectively, for receiving the reference voltage VREF. The output terminal of the first comparator COMP1 is electrically connected to the latch module 50, and the first comparator COMP1 is configured to output the oscillation signal OSC to the latch module 50. The non-inverting input terminal of the second comparator COMP2 is electrically connected to the charge-discharge module 30, and is configured to receive a second sub-voltage of the third voltage output by the charge-discharge module 30. The output end of the second comparator COMP2 is electrically connected to the latch module 50, and the second comparator COMP2 is configured to output a comparison signal to the latch module 50. As can be seen from fig. 3, the non-inverting input terminal of the first comparator COMP1 is electrically connected to the first terminal of the first capacitor C1, the first conducting terminal of the tenth switching transistor M10, and the first conducting terminal of the eleventh switching transistor M11, respectively. The inverting input terminal of the first comparator COMP1 is electrically connected to the inverting input terminal of the second comparator COMP2, the first terminal of the first resistor R1, the second conducting terminal of the second switching tube M2, and the control terminal of the first switching tube M1, respectively. The non-inverting input terminal of the second comparator COMP2 is electrically connected to the first conducting terminal of the twelfth switching transistor M12, the first conducting terminal of the thirteenth switching transistor M13, and the first terminal of the second capacitor C2, respectively.
Specifically, the first comparator COMP1 is configured to compare the voltage on the first capacitor C1 (i.e. the first sub-voltage in the third voltage output by the charge-discharge module 30) with the reference voltage VREF, and the result (i.e. the oscillation signal OSC) output by the first comparator COMP1 is transmitted to the frequency dividing module 60 through the latch module 50.
The second comparator COMP2 is configured to compare the voltage on the second capacitor C2 (i.e., the second sub-voltage in the third voltage output by the charge-discharge module 30) with the reference voltage VREF, and the result (i.e., the comparison signal) output by the second comparator COMP2 passes through the latch module 50 and then outputs a first sub-control signal and a second sub-control signal in the control signal, where the first sub-control signal is fed back to the control end of the tenth switching tube M10 and the control end of the eleventh switching tube M11 to control the charge and discharge of the first capacitor C1, and the second sub-control signal is fed back to the control end of the twelfth switching tube M12 and the control end of the thirteenth switching tube M13 to control the charge and discharge of the second capacitor C2.
The comparison module 40 may be replaced by another module that performs its function, and is not limited thereto.
As shown in fig. 3, the latch module 50 includes a first nor gate H1, a second nor gate H2, a first nor gate F1, a second nor gate F2, a third nor gate F3, and a fourth nor gate F4. A first input of the first nor gate H1 is electrically connected to the comparison module 40. The second input end of the first nor gate H1 is electrically connected to the output end of the second nor gate H2 and the input end of the third nor gate F3, respectively. The output end of the first nor gate H1 is electrically connected to the input end of the first nor gate F1 and the first input end of the second nor gate H2, respectively. The output end of the first NOT gate F1 is electrically connected with the input end of the second NOT gate F2 and the charge-discharge module 30 respectively. The output end of the second NOT gate F2 is electrically connected with the charge and discharge module 30. A second input of the second nor gate H2 is electrically connected to the comparison module 40. The output of the third not gate F3 is electrically connected to the input of the fourth not gate F4. The output of the fourth NOT gate F4 is electrically connected to the frequency divider module 60. As can be seen from fig. 3, the first input terminal of the first nor gate H1 is electrically connected to the output terminal of the first comparator COMP 1. The output end of the first NOT gate F1 is electrically connected with the input end of the second NOT gate F2, the control end of the tenth switching tube M10 and the control end of the eleventh switching tube M11 respectively, and the first NOT gate F1 is used for outputting a first sub-control signal in the control signals. The output end of the second not gate F2 is electrically connected to the control end of the twelfth switching tube M12 and the control end of the thirteenth switching tube M13, respectively, and the second not gate F2 is configured to output a second sub-control signal of the control signals. The second input terminal of the second nor gate H2 is electrically connected to the output terminal of the second comparator COMP 2. Specifically, the latch module 50 is mainly configured to latch the oscillation signal OSC output by the first comparator COMP1 and the comparison signal output by the second comparator COMP2, and transmit the oscillation signal OSC to the frequency division module 60. Meanwhile, the latch module 50 outputs a control signal according to the comparison signal and transmits the control signal to the charge and discharge module 30. The latch module 50 can also prevent the first comparator COMP1 and the second comparator COMP2 from being turned over by mistake, so as to maintain the stability of the oscillating circuit.
Note that the latch module 50 may be replaced by another module that performs its function, and is not limited thereto.
Illustratively, since the modulation frequency is generally much smaller than the frequency of the output of the oscillating circuit, the frequency division module 60 is used to divide the oscillating signal OSC to obtain the divided signal fout. One common implementation of the frequency dividing module 60 is to use a D flip-flop, and the specific circuit connection is shown in fig. 4, where the input is the oscillation signal OSC and the output is the frequency dividing signal fout. The frequency dividing module 60 may also be implemented in other manners, which are not limited in this application.
For example, logic module 70 may be implemented using a loop counter encoded using binary encoding. Logic module 70 may also be implemented in other ways, which are not limited in this application. In the following, taking the logic module 70 to output the 4-bit logic signals SW1, SW2, SW3, SW4 as an example, the change situation of the 4-bit logic signals SW1, SW2, SW3, SW4 is described, specifically, as shown in fig. 5, the present application takes the process from 0000 to 1111 and then back to 0000 as a complete cycle, and other encoding manners, such as thermometer codes, may be adopted. In the present application, the charge current of the charge/discharge module 30 is changed according to the triangular wave by the encoding method shown in fig. 5, so that the frequency outputted by the oscillating circuit is also changed according to the triangular wave, and if more frequency points are desired to be generated in the middle, the number of bits of the logic signal can be increased.
Finally, as shown in fig. 6, the frequency output by the oscillating circuit is reduced from fmin to fmax to fmin according to the triangular wave, and the period of the triangular wave is Tmod. Where fmin is the minimum frequency of the oscillating circuit output, and the first current output by the current adjusting module 20 is the minimum. fmax is the maximum frequency of the oscillating circuit output, at which time the first current output by the current regulation module 20 is maximum.
If the control chip is built in an MTP (multi-time program) or OTP (One-time program, only One-time programming) memory, the frequency dividing module 60 can be conveniently configured, so as to change the output frequency dividing signal fout thereof, further adjust the maintenance time of each step in fig. 5, and finally change the period Tmod of the triangular wave.
The embodiment of the application also provides an oscillator, which comprises the oscillating circuit. Since the oscillator comprises the oscillating circuit, the triangular wave modulation mode adopted by the oscillator is to disturb the charging current, so that the frequency output by the oscillator is influenced by the charging current. According to the method, the output frequency of the oscillator is adjusted by adjusting the size of the charging current, the output frequency of the oscillator is only influenced by the capacity of the capacitor in the charging and discharging module in the oscillating circuit and the charging current, and the charging current is only influenced by the resistance value of the resistor in the current generating module in the oscillating circuit. Therefore, the frequency of the oscillator output only depends on the capacity of the capacitor in the charge-discharge module and the resistance value of the resistor in the current generation module, the influence of various external parameters is reduced, the precision of the frequency of the oscillator output is improved, and the intensity of the EMI of the switching power supply can be effectively reduced.
The embodiment of the application also provides a switching power supply, which comprises the oscillator. Because the switching power supply comprises the oscillator, the triangular wave modulation mode adopted by the oscillator is to disturb the charging current, so that the frequency output by the oscillator is influenced by the charging current. According to the method, the output frequency of the oscillator is adjusted by adjusting the size of the charging current, the output frequency of the oscillator is only influenced by the capacity of the capacitor in the charging and discharging module in the oscillating circuit and the charging current, and the charging current is only influenced by the resistance value of the resistor in the current generating module in the oscillating circuit. Therefore, the frequency of the oscillator output only depends on the capacity of the capacitor in the charge-discharge module and the resistance value of the resistor in the current generation module, the influence of various external parameters is reduced, the precision of the oscillator output frequency is improved, and the EMI intensity of the switching power supply is effectively reduced. In summary, the switching power supply provided by the embodiment of the application has good EMI performance, and electromagnetic interference to surrounding electronic systems is effectively avoided.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (10)
1. The oscillating circuit is characterized by comprising a current generation module, a current regulation module, a charge-discharge module, a comparison module, a latch module, a frequency division module and a logic module; the charging and discharging module is respectively and electrically connected with the comparing module, the latching module, the current generating module and the current adjusting module, the latching module is respectively and electrically connected with the comparing module and the frequency dividing module, the logic module is respectively and electrically connected with the frequency dividing module and the current adjusting module, and the current adjusting module is electrically connected with the current generating module;
The latch module is used for outputting a control signal to the charge-discharge module according to the comparison signal, and is also used for outputting an oscillation signal to the frequency division module; the frequency division module is used for dividing the frequency of the oscillation signal and transmitting the obtained frequency division signal to the logic module; the logic module is used for outputting N-bit periodically-changed logic signals according to the frequency division signals and transmitting the N-bit logic signals to the current regulation module, wherein N is a natural number greater than or equal to 1; the current generation module is used for receiving bias current, outputting charging current to the charging and discharging module according to the bias current, and outputting reference voltage to the comparison module; the current generation module is further used for providing a first voltage and a second voltage for the current regulation module; the current adjusting module is used for outputting adjustable first current according to the first voltage, the second voltage and the N-bit logic signal, and the first current is used for adjusting the magnitude of the charging current; the charging and discharging module is used for outputting a third voltage to the comparison module according to the control signal and the charging current; the comparison module is used for outputting the comparison signal and the oscillation signal to the latch module according to the third voltage and the reference voltage.
2. The oscillating circuit of claim 1, wherein the current generating module comprises a first resistor, a second resistor, a first switching tube, a second switching tube, a third switching tube, a fourth switching tube, a fifth switching tube, and a sixth switching tube; the first conducting end of the first switching tube is electrically connected with the control end of the second switching tube and is used for receiving the bias current; the control end of the first switching tube is electrically connected with the second conducting end of the second switching tube, the first end of the first resistor and the comparison module respectively; the second conducting end of the first switch tube and the second end of the first resistor are grounded; the first conducting end of the second switching tube is electrically connected with the first end of the second resistor, the control end of the fourth switching tube, the control end of the sixth switching tube and the current regulating module respectively; the second end of the second resistor is electrically connected with the first conducting end of the fourth switching tube, the control end of the third switching tube, the control end of the fifth switching tube and the current regulating module respectively; the second conducting end of the fourth switching tube is electrically connected with the first conducting end of the third switching tube; the second conducting end of the third switching tube and the second conducting end of the fifth switching tube are both used for receiving power supply voltage; the first conducting end of the fifth switching tube is electrically connected with the second conducting end of the sixth switching tube; and the first conducting end of the sixth switching tube is respectively and electrically connected with the charge-discharge module and the current regulating module.
3. The oscillating circuit of claim 1, wherein the current regulating module comprises N current regulating units, where N is a natural number greater than or equal to 1; the N current regulating units and the current generating module are electrically connected with the charging and discharging module, and the N current regulating units are also electrically connected with the logic module and the current generating module respectively;
each current regulating unit is used for receiving the first voltage, the second voltage and one bit of logic signal and outputting an adjustable first sub-current according to the first voltage, the second voltage and the logic signal; and superposing the N paths of first sub-currents to obtain the first current.
4. An oscillating circuit according to claim 3, wherein each of the current regulating units comprises a seventh switching tube, an eighth switching tube and a ninth switching tube; the control end of the seventh switching tube is electrically connected with the current generation module; the second conducting end of the seventh switching tube is used for receiving the power supply voltage; the first conducting end of the seventh switching tube is electrically connected with the second conducting end of the eighth switching tube; the control end of the eighth switching tube is electrically connected with the current generation module; the first conducting end of the eighth switching tube is electrically connected with the second conducting end of the ninth switching tube; the control end of the ninth switching tube is electrically connected with the logic module; and the first conducting end of the ninth switching tube is respectively and electrically connected with the current generating module and the charging and discharging module.
5. The oscillating circuit of claim 1, wherein the charge-discharge module comprises a tenth switching tube, an eleventh switching tube, and a first capacitor; the second conducting end of the tenth switching tube is respectively and electrically connected with the current generating module and the current regulating module; the first conducting end of the tenth switching tube is electrically connected with the first conducting end of the eleventh switching tube, the first end of the first capacitor and the comparison module respectively; the control end of the tenth switching tube is electrically connected with the control end of the eleventh switching tube and the latch module respectively; the second conducting end of the eleventh switching tube and the second end of the first capacitor are grounded.
6. The oscillating circuit of claim 5, wherein the charge-discharge module further comprises a twelfth switching tube, a thirteenth switching tube, and a second capacitor; the second conducting end of the twelfth switching tube is electrically connected with the second conducting end of the tenth switching tube, the current generating module and the current regulating module respectively; the first conducting end of the twelfth switching tube is electrically connected with the first conducting end of the thirteenth switching tube, the first end of the second capacitor and the comparison module respectively; the control end of the twelfth switching tube is electrically connected with the control end of the thirteenth switching tube and the latch module respectively; the second conducting end of the thirteenth switching tube and the second end of the second capacitor are grounded.
7. The oscillating circuit of claim 1, wherein the comparison module comprises a first comparator and a second comparator; the non-inverting input end of the first comparator is electrically connected with the charge-discharge module, the inverting input end of the first comparator is electrically connected with the inverting input end of the second comparator and the current generation module respectively, and the output end of the first comparator is electrically connected with the latch module; and the non-inverting input end of the second comparator is electrically connected with the charge-discharge module, and the output end of the second comparator is electrically connected with the latch module.
8. The oscillating circuit of claim 1, wherein the latching module comprises a first nor gate, a second nor gate, a third nor gate, and a fourth nor gate; the first input end of the first nor gate is electrically connected with the comparison module, the second input end of the first nor gate is electrically connected with the output end of the second nor gate and the input end of the third nor gate respectively, the output end of the first nor gate is electrically connected with the input end of the first nor gate and the first input end of the second nor gate respectively, the output end of the first nor gate is electrically connected with the input end of the second nor gate and the charge-discharge module respectively, the output end of the second nor gate is electrically connected with the charge-discharge module, the second input end of the second nor gate is electrically connected with the comparison module, the output end of the third nor gate is electrically connected with the input end of the fourth nor gate, and the output end of the fourth nor gate is electrically connected with the frequency division module.
9. An oscillator comprising an oscillating circuit as claimed in any one of claims 1 to 8.
10. A switching power supply comprising the oscillator of claim 9.
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| CN117614260A (en) * | 2024-01-22 | 2024-02-27 | 深圳市国电科技通信有限公司 | Frequency dithering circuit of self-adaptive power supply switching frequency, power supply and management chip thereof |
| CN117614260B (en) * | 2024-01-22 | 2024-04-02 | 深圳市国电科技通信有限公司 | Frequency dithering circuit of self-adaptive power supply switching frequency, power supply and management chip thereof |
| CN118041312A (en) * | 2024-04-10 | 2024-05-14 | 深圳市微源半导体股份有限公司 | Spread spectrum clock generator, switching power supply and electronic equipment |
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Application publication date: 20230609 |