CN116243634A - Fieldbus driving circuit suitable for under strong interference environment - Google Patents
Fieldbus driving circuit suitable for under strong interference environment Download PDFInfo
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- CN116243634A CN116243634A CN202310046486.1A CN202310046486A CN116243634A CN 116243634 A CN116243634 A CN 116243634A CN 202310046486 A CN202310046486 A CN 202310046486A CN 116243634 A CN116243634 A CN 116243634A
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- G05B19/00—Programme-control systems
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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Abstract
The invention relates to the field of industrial field bus systems, in particular to a field bus driving circuit suitable for a strong interference environment, which is characterized by comprising a CAN transceiver, a bus driving circuit and a singlechip connected with the CAN transceiver, wherein the bus driving circuit is respectively connected with the CAN transceiver, the singlechip and a bus, the bus driving circuit comprises a first analog switch, an amplifying circuit, a second analog switch, an attenuation circuit and a filter circuit, the CAN transceiver is connected with the first analog switch, the singlechip is respectively connected with the first analog switch and the second analog switch through the analog switch driving circuit, the bus is connected with the second analog switch, the first analog switch is connected with the second analog switch through the amplifying circuit, the second analog switch is connected with the filter circuit, the filter circuit is connected with the attenuation circuit, and the attenuation circuit is connected with the first analog switch; the invention has better anti-interference performance and can realize low-speed long-distance normal communication.
Description
Technical Field
The invention relates to the field of industrial field bus systems, in particular to a field bus driving circuit used in a strong interference environment of a CAN bus and a differential bus for long-distance low-speed data transmission.
Background
As DCS architecture evolves toward FCS. It is a trend to replace the original centralized communication cable by a fieldbus interface module, which can save a lot of cables and avoid the occurrence of faults. CAN is short for controller area network, and has high reliability and universality; the CAN carries out data transmission in the form of differential signals through a twisted pair, and the main problems of the existing bus architecture of the CAN are as follows: when the device is transmitted in a long distance in an industrial production field, electromagnetic interference of some high-power low-frequency equipment (an intermediate frequency furnace, a frequency converter and the like) is easily induced due to the fact that cable distances among devices are far and bus driving capability is weak, so that burrs appear on signal waveforms, and normal communication is affected; when the bus is connected with different terminal devices during long-distance transmission in an industrial production field, the power supply conditions of the devices are not necessarily the same, so that the potentials of the devices are generally inconsistent, common-mode interference is easy to generate, sometimes even the common-mode interference exceeds 12V, and the excessive common-mode interference can influence normal transmission of data and even cause damage of a bus transceiver chip; meanwhile, a long cable connected with each device is provided with larger parasitic inductance and parasitic capacitance, so that larger overshoot or hysteresis is easy to generate when a signal jumps in level, even the situation of packet loss occurs, and in addition, if the long cable is subjected to high-voltage surge interference caused by lightning stroke or device contact arc discharge and the like, the transceiver chip is easy to appear abnormal and even the board is burnt out.
Disclosure of Invention
In order to solve the problems, the invention provides a field bus driving circuit suitable for a strong interference environment, wherein the bus comprises a CAN bus and a differential signal serial bus, a plurality of nodes are hung on the bus, each node is required to be provided with the group of driving circuits, and the bus architecture added with the driving circuit has good anti-interference performance and CAN realize low-speed long-distance normal communication.
The invention provides the following technical scheme: a field bus driving circuit suitable for a strong interference environment comprises a CAN transceiver, a bus driving circuit and a singlechip connected with the CAN transceiver, wherein the bus driving circuit is respectively connected with the CAN transceiver, the singlechip and a bus. The bus driving circuit comprises a first analog switch, an amplifying circuit, a second analog switch, an attenuation circuit and a filter circuit.
The CAN transceiver is connected with the first analog switch, the singlechip is respectively connected with the first analog switch and the second analog switch through the analog switch driving circuit, the bus is connected with the second analog switch, the first analog switch is connected with the second analog switch through the amplifying circuit, the second analog switch is connected with the bus, the second analog switch is connected with the filter circuit, the filter circuit is connected with the attenuation circuit, and the attenuation circuit is connected with the first analog switch;
the first analog switch, the amplifying circuit and the second analog switch form a transmitting circuit, and the second analog switch, the filter circuit, the attenuation circuit and the first analog switch form a receiving circuit. The first analog switch and the second analog switch both adopt HEF4053BT.
The amplifying circuit comprises an amplifier U1.1 and an amplifier U6.2, wherein the inverting input end of the amplifier U1.1 is grounded through a resistor R2, the output end of the amplifier U1.1 is connected with the inverting input end of the amplifier U1.1 through a resistor R6, the non-inverting input end of the amplifier U1.1 is connected with a first analog switch U10 through a resistor R7, the pin 4 of the amplifier U1.1 is grounded, the output end of the amplifier U1.1 is connected with a second analog switch U8 through a resistor R1, the output end of the amplifier U1.1 is connected with the output end of the amplifier U6.2 through a resistor R11, the inverting input end of the amplifier U6.2 is grounded through a resistor R4, the non-inverting input end of the amplifier U6.2 is connected with the first analog switch U10 through a resistor R8, and the output end of the amplifier U6.2 is connected with the inverting input end of the amplifier U6.2 through a resistor R3. When in the data transmission mode, the operational amplifier amplifies the low-voltage difference small-current signal sent by the transceiver chip to a high-voltage difference large-current driving signal, and the high-voltage difference large-current driving signal is transmitted to the bus through the second analog switch. The amplifier can use LM358, and the bus should use shielding twisted pair with cross section not less than 0.2 square millimeter.
The filter circuit comprises a common-mode inductor and a full-bridge rectifier circuit, the full-bridge rectifier circuit comprises diodes U2, U3, U4 and U5 which are connected end to end in sequence, the cathode of the diode U4 is connected with a second analog switch U8, the cathode of the diode U5 is connected with the second analog switch U8, a resistor R9 is connected in series between the cathode of the diode U4 and the cathode of the diode U5, the cathodes of the U2 and U3 are connected to one end of a voltage stabilizing tube D1, the anodes of the U4 and U5 are connected to the other end of the voltage stabilizing tube D1, the anode of the U2 is connected to a second pin of the common-mode inductor L1, the anode of the U3 is connected to a third pin of the common-mode inductor L1, and the 1 pin and the 4 pin of the common-mode inductor are respectively connected with a first analog switch U10. The attenuation circuit comprises a resistor R10 and a voltage stabilizing tube D2, wherein the resistor R10 is connected in series between a first pin and a fourth pin of the common-mode inductor, and the voltage stabilizing tube D2 is connected with the resistor R10 in parallel. When the common mode interference comes, because the current of the common mode interference has the same direction, the magnetic field with the same direction can be generated in the coil of the common mode inductor L1, so that the inductive impedance of the coil is increased, the coil presents high impedance, and a stronger common mode interference damping effect is generated. When the differential mode is interfered, the diodes of the full-bridge rectifying circuit are alternately conducted, so that the energy of the differential mode interference is converted into direct current and is consumed on a transient suppression diode connected with the direct current output end of the rectifying bridge. The voltage stabilizing tube D2 and the resistor R10 are used for reducing the level input by the filter circuit and cutting off the uneven part of the high level, so that the signal input into the bus transceiver chip meets the input level requirement of the bus transceiver chip and the bus interface transceiver chip is prevented from being burnt.
The analog switch driving circuit includes a first analog switch driving circuit and a second analog switch driving circuit,
the first analog switch driving circuit comprises a triode AQ1, wherein the triode AQ1 is connected with the singlechip through a resistor AR2, an emitter of the triode AQ1 is grounded, the emitter of the triode AQ1 is connected with a base electrode of the triode AQ1 through a resistor AR1, a collector of the triode AQ1 is connected with the first analog switch, a collector of the triode AQ1 is connected with +VCC through a resistor AR7, and a resistor AR3 is connected with the LED1 in series and then connected with the resistor AR7 in parallel;
the second analog switch driving circuit comprises a triode AQ2, the triode AQ2 is connected with the singlechip through a resistor AR6, an emitter of the triode AQ2 is grounded, the emitter of the triode AQ2 is connected with a base electrode of the triode AQ2 through a resistor AR8, a collector of the triode AQ2 is connected with the second analog switch, a collector of the triode AQ2 is connected with +VCC through a resistor AR4, and a resistor AR5 is connected with the resistor AR4 in parallel after being connected with the LED2 in series.
And a gas discharge tube is arranged between the second analog switch and the bus, and the starting voltage of the gas discharge tube is 75V. When spikes on the bus are generated by a large voltage difference to ground or between the buses, they are absorbed and attenuated.
According to the scheme, interference possibly brought in the transmission process is restrained by means of high-voltage difference during transmission and filtering and limiting during receiving, and therefore serial differential bus communication with low speed and long distance under severe environments such as forging industry can be normally conducted.
Drawings
Fig. 1 is a block diagram of the overall structure of the present invention.
Fig. 2 is a schematic diagram of a CAN transceiver.
Fig. 3 is a circuit diagram of a driving circuit according to an embodiment of the present invention.
Fig. 4 is a typical communication waveform diagram of CAN bus long distance transmission.
Fig. 5 is a waveform diagram of CAN bus long distance transmission in the present invention.
Detailed Description
The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is apparent that the described embodiment is only one embodiment of the present invention, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
As CAN be seen from the drawings, the field bus driving circuit suitable for the strong interference environment comprises a CAN transceiver, a bus driving circuit and a singlechip connected with the CAN transceiver, wherein the bus driving circuit is respectively connected with the CAN transceiver, the singlechip and a bus, and the bus driving circuit comprises a first analog switch, an amplifying circuit, a second analog switch, an attenuation circuit and a filter circuit.
The CAN transceiver is connected with the first analog switch, the singlechip is respectively connected with the first analog switch and the second analog switch through the analog switch driving circuit, the bus is connected with the second analog switch, the first analog switch is connected with the second analog switch through the amplifying circuit, the second analog switch is connected with the bus, the second analog switch is connected with the filter circuit, the filter circuit is connected with the attenuation circuit, and the attenuation circuit is connected with the first analog switch; the first analog switch, the amplifying circuit and the second analog switch form a transmitting circuit, and the second analog switch, the filter circuit, the attenuation circuit and the first analog switch form a receiving circuit. The first analog switch and the second analog switch are HEF4053BT, and the two analog switches are used for switching the receiving and transmitting; the singlechip adopts STM32 singlechip, and the CAN transceiver chip adopts TJA1050. And a gas discharge tube is arranged between the second analog switch and the bus, and the starting voltage of the gas discharge tube is 75V. The out_h of the bus is connected to the fourth pin of the second analog switch U8, and the out_l of the bus is connected to the fifteenth pin of the second analog switch U8. The bus OUT_H is grounded through the gas discharge tube TV1, and the bus OUT_L is grounded through the gas discharge tube TV2, which is used for surge resistance.
The first pin of the CAN transceiver is connected with the CANTX pin of the singlechip, the second pin is connected with the CANRX pin of the singlechip, the third pin is connected with a power supply, the second pin and the eighth pin are connected with the ground, wherein the seventh pin CAN_H is connected with the fourth pin of the first analog switch U10, and the sixth pin CAN_L is connected with the fifteenth pin of the first analog switch U10.
The amplifying circuit comprises an amplifier U1.1 and an amplifier U6.2, wherein the inverting input end of the amplifier U1.1 is grounded through a resistor R2, the output end of the amplifier U1.1 is connected with the inverting input end of the amplifier U1.1 through a resistor R6, the non-inverting input end of the amplifier U1.1 is connected with the fifth pin of the first analog switch U10 through a resistor R7, the 4 pin of the amplifier U1.1 is grounded, the output end of the amplifier U1.1 is connected with the fifth pin of the second analog switch U8 through a resistor R1, the output end of the amplifier U1.1 is connected with the output end of the amplifier U6.2 through a resistor R11, the non-inverting input end of the amplifier U6.2 is grounded through a resistor R4, the non-inverting input end of the amplifier U6.2 is connected with the second pin of the first analog switch U10 through a resistor R5, and the output end of the amplifier U6.2 is connected with the second pin of the second analog switch U8 through a resistor R3.
The filter circuit comprises a common-mode inductor and a full-bridge rectifier circuit, the full-bridge rectifier circuit comprises diodes U2, U3, U4 and U5 which are connected end to end in sequence, the cathode of the diode U4 is connected with a third pin of a second analog switch U8, the cathode of the diode U5 is connected with a first pin of the second analog switch U8, a resistor R9 is connected in series between the cathode of the diode U4 and the cathode of the diode U5, the cathodes of the U2 and U3 are connected to one end of a voltage stabilizing tube D1, the anodes of the U4 and U5 are connected to the other end of the voltage stabilizing tube D1, the voltage stabilizing tube D1 is a bidirectional voltage stabilizing tube, the anode of the U2 is connected to a second pin of the common-mode inductor L1, the anode of the U3 is connected to a third pin of the common-mode inductor L1, the pin 1 of the common-mode inductor L1 is connected with a third pin of the first analog switch U10, and the pin of the common-mode inductor L1DE 4 is connected with a first pin of the first analog switch U10. The attenuation circuit comprises a resistor R10 and a voltage stabilizing tube D2, wherein the resistor R10 is connected in series between a first pin and a fourth pin of the common-mode inductor, and the voltage stabilizing tube D2 is connected with the resistor R10 in parallel.
The analog switch driving circuit comprises a first analog switch driving circuit and a second analog switch driving circuit, the first analog switch driving circuit comprises a triode AQ1, the triode AQ1 is connected with a CAN_R pin of the singlechip through a resistor AR2, an emitter of the triode AQ1 is grounded, an emitter of the triode AQ1 is connected with a base of the triode AQ1 through a resistor AR1, a collector of the triode AQ1 is connected with a ninth pin and a tenth pin of a first analog switch U10, a collector of the triode AQ1 is connected with +VCC through a resistor AR7, and a resistor AR3 is connected with a light-emitting diode LED1 in series and then connected with the resistor AR7 in parallel; +VCC is 12V.
The second analog switch driving circuit comprises a triode AQ2, the triode AQ2 is connected with a CAN_T pin of the singlechip through a resistor AR6, an emitter of the triode AQ2 is grounded, an emitter of the triode AQ2 is connected with a base of the triode AQ2 through a resistor AR8, a collector of the triode AQ2 is connected with a ninth pin and a tenth pin of a second analog switch U8, a collector of the triode AQ2 is connected with +VCC through a resistor AR4, and a resistor AR5 is connected with a resistor AR4 in parallel after being connected with a light-emitting diode LED2 in series.
Comparing the data transmission waveform of the anti-interference circuit with the data transmission waveform of the non-anti-interference circuit as shown in fig. 4 and 5, it can be seen that the received signal burr is reduced after the anti-interference circuit is arranged; after the STM32 singlechip is used for transmitting 0x1a data through a 50-meter shielding wire, the received result is transmitted to an upper computer of a computer through a TTL serial port, the phenomenon of data scrambling can occur occasionally in a transmission module without an anti-interference circuit, and the improved circuit has no scrambling.
While the specific embodiments of the present disclosure have been described above with reference to the drawings, it should be understood that the present disclosure is not limited to the embodiments, and that various modifications and changes can be made by one skilled in the art without inventive effort on the basis of the technical solutions of the present disclosure while remaining within the scope of the present disclosure.
Claims (6)
1. A field bus driving circuit suitable for a strong interference environment is characterized by comprising a CAN transceiver, a bus driving circuit and a singlechip connected with the CAN transceiver, wherein the bus driving circuit is respectively connected with the CAN transceiver, the singlechip and a bus,
the bus driving circuit comprises a first analog switch, an amplifying circuit, a second analog switch, an attenuation circuit and a filter circuit,
the CAN transceiver is connected with the first analog switch, the singlechip is respectively connected with the first analog switch and the second analog switch through the analog switch driving circuit, the bus is connected with the second analog switch, the first analog switch is connected with the second analog switch through the amplifying circuit, the second analog switch is connected with the bus, the second analog switch is connected with the filter circuit, the filter circuit is connected with the attenuation circuit, and the attenuation circuit is connected with the first analog switch;
the first analog switch, the amplifying circuit and the second analog switch form a transmitting circuit, and the second analog switch, the filter circuit, the attenuation circuit and the first analog switch form a receiving circuit.
2. A Fieldbus driver circuit suitable for use in a high interference environment according to claim 1,
the amplifying circuit comprises an amplifier U1.1 and an amplifier U6.2, wherein the inverting input end of the amplifier U1.1 is grounded through a resistor R2, the output end of the amplifier U1.1 is connected with the inverting input end of the amplifier U1.1 through a resistor R6, the non-inverting input end of the amplifier U1.1 is connected with a first analog switch U10 through a resistor R7, the pin 4 of the amplifier U1.1 is grounded, the output end of the amplifier U1.1 is connected with a second analog switch U8 through a resistor R1, the output end of the amplifier U1.1 is connected with the output end of the amplifier U6.2 through a resistor R11, the inverting input end of the amplifier U6.2 is grounded through a resistor R4, the non-inverting input end of the amplifier U6.2 is connected with the first analog switch U10 through a resistor R8, and the output end of the amplifier U6.2 is connected with the inverting input end of the amplifier U6.2 through a resistor R3.
3. A Fieldbus driver circuit suitable for use in a high interference environment according to claim 1,
the filter circuit comprises a common-mode inductor and a full-bridge rectifier circuit, the full-bridge rectifier circuit comprises diodes U2, U3, U4 and U5 which are connected end to end in sequence, the cathode of the diode U4 is connected with a second analog switch U8, the cathode of the diode U5 is connected with the second analog switch U8, a resistor R9 is connected in series between the cathode of the diode U4 and the cathode of the diode U5, the cathodes of the U2 and U3 are connected to one end of a voltage stabilizing tube D1, the anodes of the U4 and U5 are connected to the other end of the voltage stabilizing tube D1, the anode of the U2 is connected to a second pin of the common-mode inductor L1, the anode of the U3 is connected to a third pin of the common-mode inductor L1, and the 1 pin and the 4 pin of the common-mode inductor are respectively connected with a first analog switch U10.
4. A Fieldbus driver circuit suitable for use in a high interference environment according to claim 3,
the attenuation circuit comprises a resistor R10 and a voltage stabilizing tube D2, wherein the resistor R10 is connected in series between a first pin and a fourth pin of the common-mode inductor, and the voltage stabilizing tube D2 is connected with the resistor R10 in parallel.
5. A Fieldbus driver circuit suitable for use in a high interference environment according to claim 3,
the analog switch driving circuit includes a first analog switch driving circuit and a second analog switch driving circuit,
the first analog switch driving circuit comprises a triode AQ1, wherein the triode AQ1 is connected with the singlechip through a resistor AR2, an emitter of the triode AQ1 is grounded, the emitter of the triode AQ1 is connected with a base electrode of the triode AQ1 through a resistor AR1, a collector of the triode AQ1 is connected with the first analog switch, a collector of the triode AQ1 is connected with +VCC through a resistor AR7, and a resistor AR3 is connected with the LED1 in series and then connected with the resistor AR7 in parallel;
the second analog switch driving circuit comprises a triode AQ2, the triode AQ2 is connected with the singlechip through a resistor AR6, an emitter of the triode AQ2 is grounded, the emitter of the triode AQ2 is connected with a base electrode of the triode AQ2 through a resistor AR8, a collector of the triode AQ2 is connected with the second analog switch, a collector of the triode AQ2 is connected with +VCC through a resistor AR4, and a resistor AR5 is connected with the resistor AR4 in parallel after being connected with the LED2 in series.
6. A Fieldbus driver circuit suitable for use in a high interference environment according to claim 1,
and a gas discharge tube is arranged between the second analog switch and the bus, and the starting voltage of the gas discharge tube is 75V.
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