CN116230710B - Electrostatic protection circuit, power GaN transistor and equipment terminal - Google Patents
Electrostatic protection circuit, power GaN transistor and equipment terminal Download PDFInfo
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- CN116230710B CN116230710B CN202310508815.XA CN202310508815A CN116230710B CN 116230710 B CN116230710 B CN 116230710B CN 202310508815 A CN202310508815 A CN 202310508815A CN 116230710 B CN116230710 B CN 116230710B
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- 230000004888 barrier function Effects 0.000 claims abstract description 19
- 230000006911 nucleation Effects 0.000 claims abstract description 5
- 238000010899 nucleation Methods 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 230000005533 two-dimensional electron gas Effects 0.000 claims description 5
- 230000005684 electric field Effects 0.000 abstract description 2
- 229910002601 GaN Inorganic materials 0.000 description 95
- 238000000034 method Methods 0.000 description 7
- 230000002457 bidirectional effect Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The utility model relates to an electrostatic protection circuit, power GaN transistor and equipment terminal, electrostatic protection circuit includes the bigrid GaN transistor, the bigrid GaN transistor is from supreme substrate that includes in proper order down, gaN nucleation layer, gaN buffer layer and barrier layer, be provided with the drain electrode on the barrier layer, the source electrode, first P type GaN layer, second P type GaN layer, first grid and second grid, first grid forms schottky contact with first P type GaN layer, second P type GaN layer and second grid form schottky contact, electrostatic protection circuit still includes first diode, second diode and protection resistor, the positive pole and the drain electrode of first diode are connected, the negative pole and the first grid of first diode are connected, the positive pole and the source electrode of second diode are connected, be provided with protection resistor between the negative pole of first diode and the negative pole of second diode, this electrostatic protection circuit can effectually avoid being protected the device and inefficacy because of bearing too high electric field.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to an electrostatic protection circuit, a power GaN transistor and a device terminal.
Background
Gallium nitride materials, which are typical of third-generation semiconductors, have advantages of high forbidden bandwidth, high electron mobility, high critical breakdown field strength, high electron saturation velocity, high thermal conductivity, and the like, and semiconductor devices based on gallium nitride materials, particularly gallium nitride high electron mobility transistors (GaN HEMTs), are becoming research hotspots and are being continuously applied to the fields of power and radio frequency electronics. Conventional GaN semiconductor devices are depletion-type, and in order to realize enhancement-type devices, various structures such as a trench gate, a P-type GaN layer, an ultrathin barrier layer and the like are proposed in the industry, and in view of the process level and the device performance, the P-type GaN layer structure becomes a mainstream structure today and realizes commercial mass production.
The gate of GaNHEMT with P-type GaN layer has two diode series structure, wherein the gate and P-type GaN form Schottky diode, and the P-type GaN and AlGaN barrier layer form PN junction diode. When the grid electrode is positively biased, the Schottky diode is reversely biased, and the PN junction diode is positively biased. When the grid electrode is negatively biased, the Schottky diode is positively biased, and the PN junction diode is reversely biased. Since the two diodes of the gate electrode are always in an off state under any bias condition of the gate electrode, when an electrostatic current is applied to the GaNHEMT gate electrode with the P-type GaN layer, the current cannot be discharged through the gate electrode, so that the GaNHEMT gate electrode with the P-type GaN layer has poor antistatic current capability.
Disclosure of Invention
In view of this, the present application provides an electrostatic protection circuit, a power GaN transistor, and a device terminal capable of improving an antistatic current capability of the power GaN transistor.
The utility model provides an electrostatic protection circuit, includes two bars GaN transistor, and two bars GaN transistor is from supreme substrate, gaN nucleation layer, gaN buffer layer and the barrier layer of including in proper order down, is provided with drain electrode, source electrode, first P type GaN layer, second P type GaN layer, first grid and second grid on the barrier layer, and drain electrode and source electrode form ohmic contact with the barrier layer respectively, and first grid forms schottky contact with first P type GaN layer, and second P type GaN layer and second grid form schottky contact.
The electrostatic protection circuit further comprises a first diode, a second diode and a protection resistor, wherein the anode of the first diode is connected with the drain electrode, and the cathode of the first diode is connected with the first grid electrode.
The anode of the second diode is connected with the source electrode, and the cathode of the second diode is connected with the second grid electrode.
A protection resistor is arranged between the cathode of the first diode and the cathode of the second diode.
In one embodiment, the protection resistor is a two-dimensional electron gas resistor.
In one embodiment, the first diode and/or the second diode is formed by shorting the gate and source of a GaN transistor having a P-type GaN layer.
In one embodiment, the first diode and the second diode have the same structural parameters.
In one embodiment, the drain is the same distance from the first gate and the source is the same distance from the second gate.
In one embodiment, the first gate and the second gate have the same structural parameters.
In one embodiment, the structural parameters of the first P-type GaN and the second P-type GaN are the same.
In one embodiment, the first and second P-type GaN layers are each located between the drain-to-barrier layer location and the source-to-barrier layer location at the barrier layer location
In addition, a power GaN transistor is provided, the power GaN transistor comprises the electrostatic protection circuit, a grid electrode of the power GaN transistor is electrically connected with a drain electrode of the double-grid GaN transistor, and a source electrode of the power GaN transistor is electrically connected with a source electrode of the double-grid GaN transistor.
In addition, a device terminal is also provided, and the device terminal comprises the power GaN transistor.
The electrostatic protection circuit comprises a double-gate GaN transistor, the double-gate GaN transistor comprises a substrate, a GaN nucleation layer, a GaN buffer layer and a barrier layer from bottom to top, a drain electrode, a source electrode, a first P-type GaN layer, a second P-type GaN layer, a first grid electrode and a second grid electrode are arranged on the barrier layer, the drain electrode and the source electrode form ohmic contact with the barrier layer respectively, the first grid electrode and the first P-type GaN layer form Schottky contact, the second P-type GaN layer and the second grid electrode form Schottky contact, the electrostatic protection circuit further comprises a first diode, a second diode and a protection resistor, the anode of the first diode is connected with the drain electrode, the cathode of the first diode is connected with the source electrode, the cathode of the second diode is connected with the second grid electrode, a protection resistor is arranged between the cathode of the first diode and the cathode of the second diode, when the drain electrode bears electrostatic current, the first grid electrode is rapidly opened through capacitive coupling, and the voltage dividing resistor is divided by the first diode and the second grid electrode, the voltage dividing resistor is also opened through the voltage dividing function of the first diode and the second grid electrode, and the second grid electrode is simultaneously opened through the voltage dividing resistor, and the voltage dividing function of the first grid electrode is also opened through the voltage dividing resistor, and the second grid electrode is opened through the voltage dividing function of the first grid electrode and the second grid electrode is simultaneously opened, and the first grid is opened, and the voltage is opened through the voltage dividing voltage is also opened, and the second voltage is opened, and is opened through the voltage is opened, and is opened by other voltage is connected with the other voltage is connected, the channel between the drain electrode and the source electrode is conducted, and electrostatic charges are discharged through the channel, so that an electrostatic current protection function can be provided for other components such as other transistors, and obviously, the electrostatic protection circuit is a bidirectional protection circuit, namely, the electrostatic protection circuit can effectively avoid failure of the protected device due to the fact that the gate electrode and the source electrode of the protected device bear electrostatic current signals.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an electrostatic protection circuit according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a power GaN transistor provided with an electrostatic protection circuit according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. Based on the examples in the present application. The various embodiments described below and their technical features can be combined with each other without conflict.
As shown in fig. 1, there is provided an electrostatic protection circuit 10, which includes a dual-gate GaN transistor 100, wherein the dual-gate GaN transistor 100 includes, in order from bottom to top, a substrate 101, a GaN nucleation layer 102, a GaN buffer layer 103, a channel layer 104, and a barrier layer 105, the barrier layer 105 is provided with a drain 106, a source 111, a first P-type GaN layer 107, a second P-type GaN layer 109, a first gate 108, and a second gate 110, the drain 106 and the source 111 form ohmic contacts with the barrier layer 105, the first gate 108 forms schottky contacts with the first P-type GaN layer 107, and the second P-type GaN layer 109 and the second gate 110 form schottky contacts.
The electrostatic protection circuit 10 further includes a first diode 11, a second diode 12, and a protection resistor R, where an anode of the first diode 11 is connected to the drain 106, and a cathode of the first diode 11 is connected to the first gate 108.
The anode of the second diode 12 is connected to the source 111, and the cathode of the second diode 12 is connected to the second gate 110.
A protection resistor R is arranged between the cathode of the first diode 11 and the cathode of the second diode 12.
In the electrostatic protection circuit 10, when the drain electrode 106 receives the electrostatic current, the first gate electrode 108 is turned on rapidly through capacitive coupling, and meanwhile, due to the voltage division effect of the first diode 11, the second diode 12 and the protection resistor R, the voltage difference between the second gate electrode 110 and the source electrode 111 can reach the on threshold voltage of the second gate electrode 110, so that the second gate electrode 110 is also turned on, and due to the on of both the first gate electrode 108 and the second gate electrode 110, the channel between the drain electrode 106 and the source electrode 111 is turned on, and the electrostatic charge is discharged through the channel, so that the electrostatic current protection function can be provided for other components such as other transistors.
Similarly, when the source 111 receives an electrostatic current, the second gate 110 is turned on rapidly by capacitive coupling, and meanwhile, due to the voltage division effect of the first diode 11, the second diode 12 and the protection resistor R, the voltage difference between the second gate 110 and the source 111 can reach the on threshold voltage of the first gate 108, so that the first gate 108 is also turned on, and since both the first gate 108 and the second gate 110 are turned on, the channel between the drain 106 and the source 111 is conducted, and the electrostatic charge is discharged through the channel, so that an electrostatic current protection function can be provided for other components, such as other transistors, and obviously, the electrostatic protection circuit 10 is a bidirectional protection circuit, that is, whether the gate or the source 111 of the protected device receives an electrostatic current signal, the electrostatic protection circuit 10 can effectively avoid the failure of the first gate 108 or the second gate 110 of the double-gate GaN transistor 100 due to the fact that the first gate 108 and the second gate 110 receive an excessive electric field, thereby improving the three-pole electrostatic current resistance capability of the double-gate GaN transistor 100.
In one embodiment, the protection resistor R is a two-dimensional electron gas resistor.
In one embodiment, the first diode 11 and/or the second diode 12 is formed by shorting the gate and source of a GaN transistor having a P-type GaN layer.
The first diode 11 or the second diode 12 can be formed by shorting the gate and the source of the other GaN transistor having the P-type GaN layer, and the diode is not required to be additionally provided, thereby reducing the complexity of the fabrication process and simplifying the fabrication process.
The protection resistor R is a two-dimensional electron gas resistor, and the protection circuit R is realized through a channel two-dimensional electron gas resistor.
In one embodiment, as shown in fig. 2, the electrostatic protection circuit 10 is applied to a power GaN transistor 200, where a gate of the power GaN transistor 200 is electrically connected to a drain 106 of the dual-gate GaN transistor 100, and a source of the power GaN transistor 200 is electrically connected to a source 111 of the dual-gate GaN transistor 100.
The power GaN transistor 200 is a power GaN transistor 200 with a P-type GaN layer, that is, the electrostatic protection circuit 10 is compatible with the process of the power GaN transistor 200 with a P-type GaN layer, so that the electrostatic protection circuit 10 and the power GaN transistor 200 with a P-type GaN layer to be protected can be integrated, thereby reducing the complexity of the process.
In this embodiment, when the protected power GaN transistor 200 is turned on, there is a voltage drop of 5V between the drain 106 and the source 111, and the dual-gate GaN transistor 100 in the electrostatic protection circuit 10 is not turned on, the second diode 12 is reversely biased, and the whole electrostatic protection circuit 10 has a small leakage current.
When the protected power GaN transistor 200 with P-type GaN layer is turned off, there is a voltage drop of 0V between the drain 106 and the source 111, and at this time, the dual-gate GaN transistor 100 in the electrostatic protection circuit 10 is not turned on, and the whole electrostatic protection circuit 10 has a small leakage current.
When the gate source of the protected power GaN transistor 200 having the P-type GaN layer is reverse biased, the dual-gate GaN transistor 100 in the electrostatic protection circuit 10 is not turned on at this time, the first diode 11 is reverse biased, and the entire electrostatic protection circuit 10 has a small leakage current.
In summary, the electrostatic protection circuit 10 has a small leakage current before being triggered by the electrostatic current signal, so that the normal operation of the protected power GaN transistor 200 is not affected. Therefore, the electrostatic protection circuit 10 is a bidirectional protection circuit, has a small leakage current, and can improve the gate anti-electrostatic current capability of the protected power GaN transistor 200.
In one embodiment, the structural parameters of the first diode 11 and the second diode 12 are the same.
In this embodiment, the first diode 11 and the second diode 12 set the structural parameters to be the same, which is beneficial to improving the symmetry of the bidirectional protection in the electrostatic protection circuit 10.
In one embodiment, the drain 106 is the same distance from the first gate 108 and the source 111 is the same distance from the second gate 110.
In this embodiment, the distance between the drain 106 and the first gate 108 and the distance between the source 111 and the second gate 110 are set to be the same, which is beneficial to further improving the symmetry of the bidirectional protection in the electrostatic protection circuit 10.
In one embodiment, the structural parameters of the first gate 108 and the second gate 110 are the same.
In one embodiment, the structural parameters of the first P-type GaN and the second P-type GaN are the same.
In one embodiment, the structural parameters of the first diode 11 and the second diode 12 are the same, the distance between the drain 106 and the first gate 108 and the distance between the source 111 and the second gate 110 are the same, the structural parameters of the first gate 108 and the second gate 110 are the same, and the structural parameters of the first diode 11 and the second diode 12 are the same, so that the drain and the source of the electrostatic protection circuit 10 can be interchanged, that is, the drain of the power GaN transistor 200 with the P-type GaN layer in the electrostatic protection circuit 10 can be used as the source, and the corresponding source can be used as the drain, thereby improving the convenience in use of the electrostatic protection circuit 10.
In addition, as shown in fig. 2, a power GaN transistor 200 is further provided, the power GaN transistor 200 includes the electrostatic protection circuit 10, a gate G of the power GaN transistor 200 is electrically connected to a drain 106 of the dual-gate GaN transistor 100, a source S of the power GaN transistor 200 is electrically connected to a source 111 of the dual-gate GaN transistor 100, and D is a drain of the power GaN transistor 200.
The electrostatic protection circuit 10 is compatible with the power GaN transistor 200 with P-type GaN layer, and the electrostatic protection circuit 10 and the power GaN transistor 200 with P-type GaN layer can be integrated, thereby simplifying the manufacturing process.
In addition, a device terminal is provided, which is provided with the above power GaN transistor 200.
That is, the foregoing embodiments are merely examples of the present application, and are not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application, such as the combination of technical features of the embodiments, or direct or indirect application to other related technical fields, are included in the scope of the patent protection of the present application.
In addition, in the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
In addition, the present application may use the same or different reference numerals for structural elements having the same or similar characteristics. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In this application, the term "for example" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "for example" is not necessarily to be construed as preferred or advantageous over other embodiments. The previous description is provided to enable any person skilled in the art to make or use the present application. In the above description, various details are set forth for purposes of explanation.
It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes have not been shown in detail to avoid unnecessarily obscuring the description of the present application. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
Claims (10)
1. The electrostatic protection circuit is characterized by comprising a double-gate GaN transistor, wherein the double-gate GaN transistor sequentially comprises a substrate, a GaN nucleation layer, a GaN buffer layer, a channel layer and a barrier layer from bottom to top, the barrier layer is provided with a drain electrode, a source electrode, a first P-type GaN layer, a second P-type GaN layer, a first grid electrode and a second grid electrode, the drain electrode and the source electrode respectively form ohmic contact with the barrier layer, the first grid electrode and the first P-type GaN layer form Schottky contact, and the second P-type GaN layer and the second grid electrode form Schottky contact;
the electrostatic protection circuit further comprises a first diode, a second diode and a protection resistor, wherein the anode of the first diode is connected with the drain electrode, and the cathode of the first diode is connected with the first grid electrode;
the anode of the second diode is connected with the source electrode, and the cathode of the second diode is connected with the second grid electrode;
the protection resistor is arranged between the cathode of the first diode and the cathode of the second diode.
2. The electrostatic protection circuit of claim 1, wherein the protection resistor is a two-dimensional electron gas resistor.
3. The electrostatic protection circuit according to claim 1, wherein the first diode and/or the second diode is formed by shorting a gate and a source of a GaN transistor having a P-type GaN layer.
4. The electrostatic protection circuit of claim 1, wherein the first diode and the second diode have the same structural parameters.
5. The electrostatic protection circuit of claim 1, wherein a distance between the drain and the first gate and a distance between the source and the second gate are the same.
6. The electrostatic protection circuit of claim 1, wherein the first gate and the second gate have the same structural parameters.
7. The electrostatic protection circuit of claim 1, wherein the first P-type GaN layer and the second P-type GaN layer have the same structural parameters.
8. The electrostatic protection circuit of claim 1, wherein the first P-type GaN layer and the second P-type GaN layer are each located between the location of the drain electrode at the barrier layer and the location of the source electrode at the barrier layer location.
9. A power GaN transistor comprising the electrostatic protection circuit of any of claims 1-8, wherein a gate of the power GaN transistor is electrically connected to a drain of the double-gate GaN transistor, and a source of the power GaN transistor is electrically connected to a source of the double-gate GaN transistor.
10. A device termination comprising the power GaN transistor of claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310508815.XA CN116230710B (en) | 2023-05-08 | 2023-05-08 | Electrostatic protection circuit, power GaN transistor and equipment terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310508815.XA CN116230710B (en) | 2023-05-08 | 2023-05-08 | Electrostatic protection circuit, power GaN transistor and equipment terminal |
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| Publication Number | Publication Date |
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| CN116230710A CN116230710A (en) | 2023-06-06 |
| CN116230710B true CN116230710B (en) | 2023-07-21 |
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| CN202310508815.XA Active CN116230710B (en) | 2023-05-08 | 2023-05-08 | Electrostatic protection circuit, power GaN transistor and equipment terminal |
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| CN214152899U (en) * | 2020-08-17 | 2021-09-07 | 深圳市比创达电子科技有限公司 | Electrostatic suppressor with low trigger voltage and accurate breakdown voltage |
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| CN116230710A (en) | 2023-06-06 |
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