CN116225728B - Task execution method and device based on coroutine, storage medium and electronic equipment - Google Patents

Task execution method and device based on coroutine, storage medium and electronic equipment Download PDF

Info

Publication number
CN116225728B
CN116225728B CN202310519101.9A CN202310519101A CN116225728B CN 116225728 B CN116225728 B CN 116225728B CN 202310519101 A CN202310519101 A CN 202310519101A CN 116225728 B CN116225728 B CN 116225728B
Authority
CN
China
Prior art keywords
spin lock
lock
target
target spin
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202310519101.9A
Other languages
Chinese (zh)
Other versions
CN116225728A (en
Inventor
李二郎
王豪迈
张旭明
胥昕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Xingchen Tianhe Technology Co ltd
Original Assignee
Beijing Xingchen Tianhe Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Xingchen Tianhe Technology Co ltd filed Critical Beijing Xingchen Tianhe Technology Co ltd
Priority to CN202310519101.9A priority Critical patent/CN116225728B/en
Publication of CN116225728A publication Critical patent/CN116225728A/en
Application granted granted Critical
Publication of CN116225728B publication Critical patent/CN116225728B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526Mutual exclusion algorithms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5038Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5066Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Stored Programmes (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

The application discloses a task execution method and device based on coroutine, a storage medium and electronic equipment. The method comprises the following steps: before any cooperative thread in the thread executes a subtask, determining a target spin lock to be acquired according to the subtask, wherein the target spin lock is used for locking an execution code of the subtask; reading preset information in a memory, and executing the acquisition operation of a target spin lock, wherein the preset information records the occupied state of at least one spin lock; under the condition that the acquisition of the target spin lock fails, controlling the cooperative distance to release CPU resources, and under the condition that the cooperative distance is detected to be scheduled next time, applying for acquiring the target spin lock again; and under the condition that the acquisition of the target spin lock is successful, executing the subtask based on the CPU resource, and releasing the target spin lock under the condition that the subtask is executed. By the method and the device, the problem that CPU resources are wasted when a program circularly tries to take a lock during task execution in a thread in the related technology is solved.

Description

Task execution method and device based on coroutine, storage medium and electronic equipment
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a task execution method and apparatus based on coroutine, a storage medium, and an electronic device.
Background
When executing tasks in a thread, the task is usually executed by taking a lock in a continuous attempt of a thread context, protecting a certain critical area code by the lock, and executing the critical area code.
It should be noted that, before the program takes the lock, the lock is tried to be taken in a circulating way all the time, the context of the thread operated by the program and the core of the CPU operated by the current thread are occupied, especially when a plurality of concurrent tasks rob the same lock, a great deal of useless circulating attempt to take the lock occurs, and a great deal of CPU time slices are wasted in the period of not taking the lock, so that the real CPU utilization efficiency of the program is reduced.
Aiming at the problem that CPU resources are wasted by program loop attempt lock taking when tasks are executed in a thread in the related art, no effective solution is proposed at present.
Disclosure of Invention
The application provides a task execution method and device based on coroutine, a storage medium and electronic equipment, and aims to solve the problem that CPU resources are wasted when a program circularly tries to take a lock during task execution in a thread in the related technology.
According to one aspect of the application, a coroutine-based task execution method is provided. The target task is completed through cooperation of a plurality of coroutines in the thread, and the method comprises the following steps: before any cooperative thread in the thread executes a subtask, determining a target spin lock to be acquired according to the subtask, wherein the subtask is a subtask in the target task, and the target spin lock is used for locking an execution code of the subtask; reading preset information in a memory, and executing the acquisition operation of a target spin lock, wherein the preset information records the occupied state of at least one spin lock; under the condition that the acquisition of the target spin lock fails, controlling the cooperative distance to release CPU resources, and under the condition that the cooperative distance is detected to be scheduled next time, applying for acquiring the target spin lock again; and under the condition that the acquisition of the target spin lock is successful, executing the subtask based on the CPU resource, and releasing the target spin lock under the condition that the subtask is executed.
Optionally, under the condition that one spin lock is provided in the memory, reading preset information in the memory, and executing the target spin lock acquisition operation includes: reading the occupied state of the target spin lock, and acquiring the target spin lock based on the occupied state of the target spin lock; under the condition that the target spin lock is unoccupied, determining that the target spin lock is successfully acquired; in the case that the target spin lock is occupied, it is determined that acquisition of the target spin lock fails.
Optionally, under the condition that at least two spin locks are provided in the memory, reading preset information in the memory, and executing the acquisition operation of the target spin lock includes: judging whether a high-level spin lock exists in the memory, wherein the high-level spin lock refers to a spin lock with a level higher than that of a target spin lock; reading the occupied state of the high-level spin lock and the occupied state of the target spin lock under the condition that the high-level spin lock exists, and acquiring the target spin lock based on the occupied state of the high-level spin lock and the occupied state of the target spin lock; if the high-level spin lock and the target spin lock are not occupied, determining that the target spin lock is successfully acquired, and if the high-level spin lock and/or the target spin lock are occupied, determining that the target spin lock is failed to acquire; reading the occupied state of the target spin lock without the high-level spin lock, and acquiring the target spin lock based on the occupied state of the target spin lock; and under the condition that the target spin lock is not occupied, determining that the target spin lock is successfully acquired, and under the condition that the target spin lock is occupied, determining that the target spin lock is failed to acquire.
Optionally, in a case that the obtaining the target spin lock is successful, performing the subtasks based on the CPU resource includes: in the process of executing the subtasks, if the current cooperative program needs to wait for the scheduling results of other cooperative programs, the control cooperative program releases CPU resources, continuously occupies target spin lock, and continues to execute the subtasks under the condition that the cooperative program is scheduled next time until the execution of the subtasks is completed.
Optionally, in a case that the obtaining the target spin lock is successful, performing the subtasks based on the CPU resource includes: judging whether a low-level spin lock in an occupied state exists or not under the condition that at least two spin locks are arranged in a memory, wherein the low-level spin lock is a spin lock with a level lower than that of a target spin lock; detecting whether a coroutine occupying a low-level spin lock releases CPU resources under the condition that the low-level spin lock in an occupied state exists; the subtasks are performed with the coroutine that occupies the low level spin lock freeing up CPU resources.
Optionally, reading preset information in the memory by calling a first atomic operation function to apply for obtaining the target spin lock; and adjusting the value in the preset information by calling a second atomic operation function so as to release the target spin lock.
Alternatively, in the case where an exclusive lock and a shared lock are provided in the memory, the level of the exclusive lock is higher than the level of the shared lock.
Optionally, in a case where a write data lock and a read data lock are provided in the memory, the write data lock is higher in level than the read data lock.
According to another aspect of the application, a coroutine-based task execution device is provided. The target task is completed through cooperation of a plurality of coroutines in the thread, and the device comprises: the determining unit is used for determining target spin locks to be acquired according to the subtasks before any cooperative program in the threads executes the subtasks, wherein the subtasks are the subtasks in the target tasks, and the target spin locks are used for locking execution codes of the subtasks; the reading unit is used for reading preset information in the memory and executing the acquisition operation of the target spin lock, wherein the preset information records the occupied state of at least one spin lock; the first control unit is used for controlling the cooperative distance to release CPU resources under the condition that the acquisition of the target spin lock fails, and applying for acquiring the target spin lock again under the condition that the cooperative distance is detected to be scheduled next time; and the second control unit is used for executing the subtasks based on the CPU resources under the condition that the acquisition of the target spin lock is successful, and releasing the target spin lock under the condition that the execution of the subtasks is finished.
According to another aspect of the embodiment of the present invention, there is further provided a computer storage medium, where the computer storage medium is configured to store a program, and when the program runs, control a device in which the nonvolatile storage medium is located to execute a task execution method based on a coroutine.
According to another aspect of the embodiment of the present invention, there is also provided an electronic device including a processor and a memory; the memory stores computer readable instructions, and the processor is configured to execute the computer readable instructions, where the computer readable instructions execute a coroutine-based task execution method when executed.
According to the method and the device, a target task is completed through cooperation of a plurality of cooperative threads in a thread, and before any cooperative thread in the thread executes a subtask, a target spin lock to be acquired is determined according to the subtask, wherein the subtask is a subtask in the target task, and the target spin lock is used for locking an execution code of the subtask; reading preset information in a memory, and executing the acquisition operation of a target spin lock, wherein the preset information records the occupied state of at least one spin lock; under the condition that the acquisition of the target spin lock fails, controlling the cooperative distance to release CPU resources, and under the condition that the cooperative distance is detected to be scheduled next time, applying for acquiring the target spin lock again; under the condition that the target spin lock is successfully obtained, the subtasks are executed based on the CPU resources, and the target spin lock is released under the condition that the subtasks are executed, so that the problem that the CPU resources are wasted when the program loops to try to take the lock and execute the tasks in the thread in the related technology is solved. And determining to acquire the required target spin lock according to the subtask, releasing the CPU resource under the condition that the target spin lock fails, and executing the subtask under the condition that the target spin lock fails, so as to achieve the effect of improving the utilization rate of the CPU resource.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application, illustrate and explain the application and are not to be construed as limiting the application. In the drawings:
FIG. 1 is a flow chart of a coroutine-based task execution method provided according to an embodiment of the present application;
FIG. 2 is a flow chart for obtaining a target spin lock provided in accordance with an embodiment of the present application;
FIG. 3 is a flow chart for releasing a target spin lock provided in accordance with an embodiment of the present application;
FIG. 4 is a schematic diagram I of obtaining a spin lock by atomic operations provided in accordance with an embodiment of the present application;
FIG. 5 is a schematic diagram II of obtaining a spin lock by atomic operations provided in accordance with an embodiment of the present application;
FIG. 6 is a schematic diagram of releasing a spin lock by atomic manipulation provided in accordance with an embodiment of the present application;
FIG. 7 is a schematic diagram of a coroutine-based task execution device provided according to an embodiment of the present application;
fig. 8 is a schematic diagram of an electronic device provided according to an embodiment of the present application.
Detailed Description
It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other. The present application will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
In order to make the present application solution better understood by those skilled in the art, the following description will be made in detail and with reference to the accompanying drawings in the embodiments of the present application, it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate in order to describe the embodiments of the present application described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be noted that, related information (including, but not limited to, user equipment information, user personal information, etc.) and data (including, but not limited to, data for presentation, analyzed data, etc.) related to the present disclosure are information and data authorized by a user or sufficiently authorized by each party.
For convenience of description, the following will describe some terms or terms related to the embodiments of the present application:
spin lock: a lock used in computer science for multi-thread synchronization, a thread repeatedly checks if a lock variable is available, and once a spin lock is acquired, the thread keeps the lock until the spin lock is explicitly released.
The cooperative journey: is a class of components of computer programs that promotes collaborative multitasking subroutines that allow execution to be suspended and resumed.
Thread: is the minimum unit that the operating system can perform operation scheduling. In most cases, it is included in a process, which is the actual unit of operation in the process.
CPU: the central processing unit, called Central Processing Unit in english, is one of the main devices of the computer, and the functions are mainly to interpret computer instructions and process data in computer software.
According to the embodiment of the application, a task execution method based on coroutine is provided.
Fig. 1 is a flowchart of a coroutine-based task execution method provided according to an embodiment of the present application. As shown in fig. 1, the target task is completed through cooperation of a plurality of coroutines in a thread, and the method comprises the following steps:
step S102, before any cooperative program in the thread executes the subtasks, determining target spin locks to be acquired according to the subtasks, wherein the subtasks are the subtasks in the target tasks, and the target spin locks are used for locking execution codes of the subtasks.
Specifically, a plurality of cooperative threads are arranged in the thread, the cooperative threads complete a target task, the target task is composed of a plurality of subtasks, and each cooperative thread respectively completes one subtask.
It should be noted that, before any cooperative program in a thread executes a corresponding subtask, a code where the subtask is located is locked, and then execution of the subtask is completed by executing the code segment, where the locking of the code where the task is located by the cooperative program is implemented by occupying the spin lock by the cooperative program, that is, one cooperative program occupies the spin lock, the code where the task is located is locked, and other cooperative programs cannot operate the code segment.
In the case where one spin lock is provided, the spin lock is the target spin lock. Under the condition that a plurality of spin locks are arranged, the types of subtasks to be executed in the coroutine are different, and it is determined that the target spin locks to be acquired are different, for example, the subtasks can be tasks for reading data, the target spin locks are write data locks, the subtasks can be tasks for reading data, and the target spin locks are read data locks.
Step S104, reading preset information in the memory and executing the acquisition operation of the target spin lock, wherein the preset information records the occupied state of at least one spin lock.
For example, when the preset information in the memory records the occupied state of a spin lock, 0 represents that the spin lock is unoccupied, and 1 represents that the spin lock is occupied. When the preset information in the memory records the occupied states of the two spin locks, 00 represents that the first spin lock is not occupied, 01 represents that the first spin lock is occupied, 10 represents that the second spin lock is not occupied, and 11 represents that the second spin lock is occupied.
Specifically, preset information in the memory is read, the occupied state of the target spin lock is obtained, and the acquisition operation of the target spin lock is executed according to the occupied state of the target spin lock.
Step S106, under the condition that the acquisition of the target spin lock fails, controlling the cooperative distance to release CPU resources, and under the condition that the cooperative distance is detected to be scheduled next time, applying for acquiring the target spin lock again.
For example, a 0 in the predetermined information in the memory indicates that the target spin lock is unoccupied, and a 1 indicates that the target spin lock is occupied. If the return value of the read target spin lock is 0, the target spin lock is occupied by other coroutines, the acquisition of the target spin lock fails, the coroutines are controlled to release CPU resources, and the next coroutine scheduling is waited for trying to acquire the target spin lock.
Fig. 2 is a flowchart of obtaining a target spin lock according to an embodiment of the present application, as shown in fig. 2, when a coroutine 1 tries to take a lock, if the coroutine fails, the CPU resources are temporarily yielded to other coroutines, such as coroutine 2, the..and coroutine N in fig. 2, until the original coroutine 1 is scheduled back again to execute a subtask, and then the attempt to take the lock is performed, so that the program is prevented from being in the air in the cycle of attempting to take the lock, the CPU resources are wasted, and the real utilization rate of the CPU is improved.
Step S108, under the condition that the acquisition of the target spin lock is successful, the subtask is executed based on the CPU resource, and under the condition that the subtask is executed, the target spin lock is released.
For example, a 0 in the predetermined information in the memory indicates that the target spin lock is unoccupied, and a 1 indicates that the target spin lock is occupied. If the return value of the read target spin lock is 0, the success of obtaining the target spin lock is indicated, the preset information in the memory is set to be 1, and the code of the subtask is locked.
Further, after the code of the subtask is executed, a lock release flow is entered, and fig. 3 is a flow chart of releasing the target spin lock according to the embodiment of the present application, as shown in fig. 3, the preset information in the memory is set to 0, that is, the lock control bit is cleared by the atomic operation, so that the release of the target spin lock is completed, and thus the target spin lock can be successfully taken by other protocols Cheng Changshi.
According to the cooperative-program-based task execution method, a target task is completed through cooperation of a plurality of cooperative programs in a thread, and before any cooperative program in the thread executes a subtask, a target spin lock to be acquired is determined according to the subtask, wherein the subtask is a subtask in the target task, and the target spin lock is used for locking an execution code of the subtask; reading preset information in a memory, and executing the acquisition operation of a target spin lock, wherein the preset information records the occupied state of at least one spin lock; under the condition that the acquisition of the target spin lock fails, controlling the cooperative distance to release CPU resources, and under the condition that the cooperative distance is detected to be scheduled next time, applying for acquiring the target spin lock again; under the condition that the target spin lock is successfully obtained, the subtasks are executed based on the CPU resources, and the target spin lock is released under the condition that the subtasks are executed, so that the problem that the CPU resources are wasted when the program loops to try to take the lock and execute the tasks in the thread in the related technology is solved. And determining to acquire the required target spin lock according to the subtask, releasing the CPU resource under the condition that the target spin lock fails, and executing the subtask under the condition that the target spin lock fails, so as to achieve the effect of improving the utilization rate of the CPU resource.
Optionally, in the cooperative task execution method provided in the embodiment of the present application, when a spin lock is set in a memory, reading preset information in the memory, and executing an acquisition operation of a target spin lock includes: reading the occupied state of the target spin lock, and acquiring the target spin lock based on the occupied state of the target spin lock; under the condition that the target spin lock is unoccupied, determining that the target spin lock is successfully acquired; in the case that the target spin lock is occupied, it is determined that acquisition of the target spin lock fails.
Specifically, the preset information is a control bit of the spin lock, and the cooperative distance judges whether the return value is 0 by operating the control bit of the spin lock through an atomic operation function. If the return value is 1, the control bit of the lock is already set, which represents that the spin lock is occupied; at this time, the cooperative interface gives up the CPU, waits for next cooperative scheduling to try to rob the lock, if the return value is 0, the successful rob the lock is indicated, and the control bit of the atomic lock is successfully set to be 1, so that the step of rob the lock is completed.
It should be noted that, in this embodiment, the success of taking the lock is represented by 0 to 1, the success of releasing the lock is represented by 1 to 0, and the like, and the specific value of the control bit is not limited in this embodiment.
In the case that a spin lock is arranged in the memory, the state control of the spin lock only needs to occupy one bit of memory data structure space, so that the memory occupied space of the data structure of the atomic lock is fully reduced, and the processes of locking and unlocking are simple and efficient.
Optionally, in the cooperative task execution method provided in the embodiment of the present application, when at least two spin locks are provided in the memory, the reading preset information in the memory and executing the target spin lock obtaining operation includes: judging whether a high-level spin lock exists in the memory, wherein the high-level spin lock refers to a spin lock with a level higher than that of a target spin lock; reading the occupied state of the high-level spin lock and the occupied state of the target spin lock under the condition that the high-level spin lock exists, and acquiring the target spin lock based on the occupied state of the high-level spin lock and the occupied state of the target spin lock; if the high-level spin lock and the target spin lock are not occupied, determining that the target spin lock is successfully acquired, and if the high-level spin lock and/or the target spin lock are occupied, determining that the target spin lock is failed to acquire; reading the occupied state of the target spin lock without the high-level spin lock, and acquiring the target spin lock based on the occupied state of the target spin lock; and under the condition that the target spin lock is not occupied, determining that the target spin lock is successfully acquired, and under the condition that the target spin lock is occupied, determining that the target spin lock is failed to acquire.
It should be noted that, in the case where at least two spin locks are provided in the memory, the data structure of the control bit may be set to 2 bytes or more, for example, in the case where at least two spin locks are provided in the memory, the data structure of the control bit may be set to 2 bytes, setting 00 indicates that the first spin lock is unoccupied, 01 indicates that the first spin lock is occupied, 10 indicates that the second spin lock is unoccupied, 11 indicates that the second spin lock is occupied, and different levels may be set for different spin locks, for example, the level of the first spin lock is higher than the level of the second spin lock.
Specifically, the cooperative distance applies for spin locks of different levels according to the level of the subtasks, and under the condition that the existing spin lock is occupied by the cooperative distance, if the level of the subtasks of other cooperative distances is higher, the cooperative distance can apply for occupying the spin lock of higher level, and execute the subtasks of the cooperative distance after waiting for the cooperative distance occupied by the spin lock to release the CPU; if the subtask level of other coroutines is lower, then spin locks occupying lower levels cannot be applied.
Optionally, in the method for executing tasks based on coroutines provided in the embodiments of the present application, when an exclusive lock and a shared lock are set in a memory, a level of the exclusive lock is higher than a level of the shared lock. The exclusive lock refers to that only the co-process acquiring the lock can execute access to the code of the target task, and the shared lock refers to that if the current existing co-process executes access to the code of the target task, other co-processes acquiring the shared lock can execute access to the code of the target task.
For example, in the case that the existing shared lock is occupied by the coroutine, if the subtask level of other coroutines is higher, the application may apply to occupy the exclusive lock of the higher level, and wait for the coroutine that has occupied the shared lock to release the CPU, and then execute its own subtask. For another example, in the case where there is already an exclusive lock occupied by a coroutine, if the subtask level of the other coroutine is lower, then the shared lock occupying the lower level cannot be applied.
Optionally, in the method for executing tasks based on coroutines provided in the embodiments of the present application, when a write data lock and a read data lock are provided in a memory, a level of the write data lock is higher than a level of the read data lock. The read data lock refers to a lock which needs to be acquired by a coroutine when executing a data reading task, and the write data lock refers to a lock which needs to be acquired by the coroutine when executing a data writing task.
For example, in the case that the existing read lock is occupied by the coroutine, if the subtask level of other coroutines is higher, the application of occupying the write lock of the higher level may be performed, and after waiting for the coroutine that has occupied the read lock releases the CPU, the subtask itself is executed. For another example, in the case where the existing write lock is occupied by the coroutine, if the subtask level of the other coroutine is lower, then the read lock occupying the lower level cannot be applied.
That is, under the condition that the existing subtasks are in the execution state, the coroutine of the subtasks at a higher level can apply for the spin lock at a higher level to order the subtasks to be executed, while the coroutine of the subtasks at a lower level needs to apply for the spin lock and execute the subtasks of the higher level after the subtasks in the execution state and the high level subtasks in the queuing state release the CPU resources.
In order to further improve the utilization rate of the CPU resource, optionally, in the task execution method based on the coroutine provided in the embodiment of the present application, executing the subtasks based on the CPU resource under the condition that the target spin lock is successfully obtained includes: in the process of executing the subtasks, if the current cooperative program needs to wait for the scheduling results of other cooperative programs, the control cooperative program releases CPU resources, continuously occupies target spin lock, and continues to execute the subtasks under the condition that the cooperative program is scheduled next time until the execution of the subtasks is completed.
It should be noted that, in the process of executing the subtasks of the current cooperative program, there is a situation that the subtasks need to wait for the execution results of other subtasks to continue to execute, that is, the current cooperative program needs to wait for the scheduling results of other cooperative programs, if the waiting time is longer than the preset time, the current cooperative program can be controlled to release the CPU resource first, so that other cooperative programs can use the CPU resource, meanwhile, the current cooperative program continuously occupies the target spin lock, other cooperative programs cannot apply to occupy the spin lock, cannot apply to occupy the spin lock with lower level, and under the condition that the current cooperative program is scheduled next time, the spin lock is not required to be applied again, and if the execution results of other subtasks are required to be obtained, the subtasks of the current self can be executed continuously. According to the embodiment, on one hand, the utilization rate of the CPU is improved, and on the other hand, the execution progress of the subtasks of the current cooperative program is not influenced.
Optionally, in the task execution method based on coroutine provided in the embodiment of the present application, executing the subtasks based on the CPU resource includes: judging whether a low-level spin lock in an occupied state exists or not under the condition that at least two spin locks are arranged in a memory, wherein the low-level spin lock is a spin lock with a level lower than that of a target spin lock; detecting whether a coroutine occupying a low-level spin lock releases CPU resources under the condition that the low-level spin lock in an occupied state exists; the subtasks are performed with the coroutine that occupies the low level spin lock freeing up CPU resources.
Specifically, under the condition that the existing spin lock is occupied by the cooperative program, if the level of the current cooperative program subtask is higher, the occupied spin lock of a higher level can be applied, after the spin lock of a high level is successfully acquired, the cooperative program of a low level needs to wait for releasing the CPU resource, and after the cooperative program of the low level releases the CPU resource, the subtask of the front cooperative program can be executed.
It should be noted that, the case of releasing the CPU resource by the low-level coroutine includes two cases, and the low-level spin lock is released, or the coroutine occupying the low-level spin lock needs to wait for the execution result of other tasks and release the CPU resource halfway in the process of executing the subtasks.
In the method for executing the task based on the coroutine provided by the embodiment of the application, the preset information in the memory is read by calling the first atomic operation function so as to apply for obtaining the target spin lock; and adjusting the value in the preset information by calling a second atomic operation function so as to release the target spin lock.
Specifically, the first atomic operation function may be a self-contained atomic operation function of the programming language compiler Gcc, and may perform an atomic or operation on a value or pointer type of 1, 2, 4, 8 bytes, and return a value before the operation.
Fig. 4 is a schematic diagram one of obtaining a spin lock through an atomic operation according to an embodiment of the present application, as shown in fig. 4, an original value representing a state of the spin lock is obtained by using a first atomic operation function, the original value is 0, which indicates that the lock is not occupied, the lock is successfully taken, the original value is taken or operated with 1, a value of a lock bit is set to 1, which indicates that the lock is occupied, and fig. 5 is a schematic diagram two of obtaining the spin lock through an atomic operation according to an embodiment of the present application, as shown in fig. 5, an original value representing a state of the spin lock is obtained by using a first atomic operation function, the original value is 1, which indicates that the lock is occupied, the lock is failed, and the original value is taken or operated with 1, which does not change a value of the lock bit.
The second atomic operation function may be __ sync_fetch_and_and, which is an atomic operation function carried by the programming language compiler Gcc, and may perform an atomic and operation on a value or pointer type of 1, 2, 4, 8 bytes and return a value before the operation.
FIG. 6 is a schematic diagram of releasing a spin lock by atomic operation according to an embodiment of the present application, as shown in FIG. 6, the value of the lock bit is cleared by using a second atomic operation function, and the value of the original lock bit is set from 1 to 0, which indicates that the lock has been released.
It should be noted that the first atomic operation function and the second atomic operation function in this embodiment may be replaced by atomic operation functions with similar functions.
It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer executable instructions, and that although a logical order is illustrated in the flowcharts, in some cases the steps illustrated or described may be performed in an order other than that illustrated herein.
The embodiment of the application also provides a task execution device based on the coroutine, and it should be noted that the task execution device based on the coroutine in the embodiment of the application can be used for executing the task execution method based on the coroutine provided in the embodiment of the application. The following describes a task execution device based on coroutine provided in the embodiment of the present application.
Fig. 7 is a schematic diagram of a task execution device based on coroutine according to an embodiment of the present application. The target task is completed through cooperation of multiple coroutines in the thread, as shown in fig. 7, the apparatus includes: a determination unit 71, a reading unit 72, a first control unit 73 and a second control unit 74.
Specifically, the determining unit 71 is configured to determine, according to the subtasks, a target spin lock to be acquired before any one of the threads performs the subtasks, where the subtasks are subtasks in the target tasks, and the target spin lock is used to lock an execution code of the subtasks.
The reading unit 72 is configured to read preset information in the memory, and perform an acquisition operation of the target spin lock, where the preset information records an occupied state of at least one spin lock.
The first control unit 73 is configured to control the cooperative process to release the CPU resource in case of failure in acquiring the target spin lock, and apply for acquiring the target spin lock again in case that the cooperative process is detected to be scheduled next time.
The second control unit 74 is configured to execute a subtask based on the CPU resource if the target spin lock is successfully acquired, and release the target spin lock if the subtask is completed.
According to the cooperative task execution device provided by the embodiment of the application, before any cooperative task in a thread executes a subtask, the target spin lock to be acquired is determined according to the subtask through the determining unit 71, wherein the subtask is a subtask in the target task, and the target spin lock is used for locking an execution code of the subtask; a reading unit 72 for reading preset information in the memory and performing an acquisition operation of the target spin lock, wherein the preset information records an occupied state of at least one spin lock; the first control unit 73 controls the cooperative distance to release the CPU resource in case of failure in acquiring the target spin lock, and applies for acquiring the target spin lock again in case that the cooperative distance is detected to be scheduled next time; the second control unit 74 executes the subtask based on the CPU resource in case that the acquisition of the target spin lock is successful, and releases the target spin lock in case that the execution of the subtask is completed, thereby solving the problem of CPU resource waste caused by the program loop attempting to take the lock when the task is executed in the thread in the related art, determining to acquire the required target spin lock according to the subtask, releasing the CPU resource in case that the target spin lock fails, and executing the subtask in case that the target spin lock fails, and further achieving the effect of improving the utilization rate of the CPU resource.
Optionally, in the coroutine-based task execution device provided in the embodiment of the present application, in a case where one spin lock is provided in the memory, the reading unit 72 includes: the first reading module is used for reading the occupied state of the target spin lock and acquiring the target spin lock based on the occupied state of the target spin lock; the first determining module is used for determining that the target spin lock is successfully acquired under the condition that the target spin lock is unoccupied; and the second determining module is used for determining that the acquisition of the target spin lock fails under the condition that the target spin lock is occupied.
Optionally, in the case where at least two spin locks are provided in the memory, the reading unit 72 includes: the first judging module is used for judging whether a high-level spin lock exists in the memory, wherein the high-level spin lock is a spin lock with a level higher than that of a target spin lock; the acquisition module is used for reading the occupied state of the high-level spin lock and the occupied state of the target spin lock under the condition that the high-level spin lock exists, and acquiring the target spin lock based on the occupied state of the high-level spin lock and the occupied state of the target spin lock; the third determining module is used for determining that the target spin lock is successfully acquired if the high-level spin lock and the target spin lock are not occupied, and determining that the target spin lock is failed to acquire if the high-level spin lock and/or the target spin lock are occupied; the second reading module is used for reading the occupied state of the target spin lock under the condition that the high-level spin lock is not present, and acquiring the target spin lock based on the occupied state of the target spin lock; and the fourth determining module is used for determining that the target spin lock is successfully acquired under the condition that the target spin lock is unoccupied, and determining that the target spin lock is failed to acquire under the condition that the target spin lock is occupied.
Optionally, the second control unit 74 further includes: and the control module is used for controlling the cooperative program to release CPU resources and continuously occupy target spin lock if the current cooperative program needs to wait for the scheduling results of other cooperative programs in the process of executing the subtasks, and continuously executing the subtasks under the condition that the cooperative program is scheduled next time until the execution of the subtasks is completed.
Optionally, the second control unit 74 further includes: the second judging module is used for judging whether the low-level spin lock in the occupied state exists or not under the condition that at least two spin locks are arranged in the memory, wherein the low-level spin lock is a spin lock with a level lower than that of the target spin lock; the detection module is used for detecting whether the cooperative journey occupying the low-level spin lock releases CPU resources or not under the condition that the low-level spin lock in the occupied state exists; and the execution module is used for executing the subtasks under the condition that the CPU resource is released by the coroutine occupying the spin lock at the low level.
Optionally, reading preset information in the memory by calling a first atomic operation function to apply for obtaining the target spin lock; and adjusting the value in the preset information by calling a second atomic operation function so as to release the target spin lock.
Alternatively, in the case where an exclusive lock and a shared lock are provided in the memory, the level of the exclusive lock is higher than the level of the shared lock.
Optionally, in a case where a write data lock and a read data lock are provided in the memory, the write data lock is higher in level than the read data lock.
The coroutine-based task execution device includes a processor and a memory, and the determining unit 71, the reading unit 72, the first control unit 73, the second control unit 74, and the like are stored in the memory as program units, and the processor executes the program units stored in the memory to realize corresponding functions.
The processor includes a kernel, and the kernel fetches the corresponding program unit from the memory. The kernel can be provided with one or more than one kernel, and the problem that CPU resources are wasted when a program circularly tries to take a lock during the task execution in the thread in the related technology is solved by adjusting the kernel parameters.
The memory may include volatile memory, random Access Memory (RAM), and/or nonvolatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM), among other forms in computer readable media, the memory including at least one memory chip.
The embodiment of the application also provides a computer storage medium which is used for storing the program, wherein the program is used for controlling the equipment where the nonvolatile storage medium is located to execute a task execution method based on the cooperative program when running.
An electronic device is further provided in the embodiments of the present application, and fig. 8 is a schematic diagram of the electronic device provided in the embodiments of the present application, where, as shown in fig. 8, the electronic device 80 includes a processor and a memory; the memory stores computer readable instructions, and the processor is configured to execute the computer readable instructions, where the computer readable instructions execute a coroutine-based task execution method when executed. The electronic device herein may be a server, a PC, a PAD, a mobile phone, etc.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In one typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, etc., such as Read Only Memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.
Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises an element.
The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and changes may be made to the present application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. which are within the spirit and principles of the present application are intended to be included within the scope of the claims of the present application.

Claims (11)

1. A cooperative-program-based task execution method, characterized in that a target task is completed through cooperation of a plurality of cooperative programs in a thread, the method comprising:
before any cooperative program in the thread executes a subtask, determining a target spin lock to be acquired according to the subtask, wherein the subtask is a subtask in the target task, and the target spin lock is used for locking an execution code of the subtask;
reading preset information in a memory, and executing the acquisition operation of the target spin lock, wherein the preset information records the occupied state of at least one spin lock;
under the condition that acquisition of the target spin lock fails, controlling the cooperative distance to release CPU resources, and under the condition that the cooperative distance is detected to be scheduled next time, applying for acquisition of the target spin lock again;
And under the condition that the target spin lock is successfully obtained, executing the subtask based on the CPU resource, and releasing the target spin lock under the condition that the subtask is executed.
2. The method of claim 1, wherein, in the case where one spin lock is provided in the memory, reading the preset information in the memory and performing the target spin lock acquisition operation comprises:
reading the occupied state of the target spin lock, and acquiring the target spin lock based on the occupied state of the target spin lock;
under the condition that the target spin lock is unoccupied, determining that the target spin lock is successfully acquired;
and determining that acquisition of the target spin lock fails in the condition that the target spin lock is occupied.
3. The method of claim 1, wherein, in the case where at least two spin locks are provided in the memory, reading preset information in the memory and performing the target spin lock acquisition operation comprises:
judging whether a high-level spin lock exists in the memory, wherein the high-level spin lock is a spin lock with a level higher than that of the target spin lock;
Reading the occupied state of the high-level spin lock and the occupied state of the target spin lock in the presence of the high-level spin lock, and acquiring the target spin lock based on the occupied state of the high-level spin lock and the occupied state of the target spin lock;
if the high-level spin lock and the target spin lock are not occupied, determining that the acquisition of the target spin lock is successful, and if the high-level spin lock and/or the target spin lock are occupied, determining that the acquisition of the target spin lock is failed;
reading the occupied state of the target spin lock in the absence of the high-level spin lock, and acquiring the target spin lock based on the occupied state of the target spin lock;
and under the condition that the target spin lock is not occupied, determining that the target spin lock is successfully acquired, and under the condition that the target spin lock is occupied, determining that the target spin lock is failed to acquire.
4. The method of claim 1, wherein, in the event that the target spin lock is acquired successfully, performing the subtask based on the CPU resource comprises:
And in the process of executing the subtasks, if the current cooperative program needs to wait for the scheduling results of other cooperative programs, controlling the CPU resource of the cooperative program Cheng Shifang, continuously occupying the target spin lock, and continuously executing the subtasks under the condition that the cooperative program is scheduled next time until the execution of the subtasks is completed.
5. The method of claim 4, wherein, in the event that the target spin lock is successfully acquired, performing the subtask based on the CPU resource comprises:
judging whether a low-level spin lock in an occupied state exists or not under the condition that at least two spin locks are arranged in the memory, wherein the low-level spin lock is a spin lock with a level lower than that of the target spin lock;
detecting whether a coroutine occupying a low-level spin lock releases the CPU resource under the condition that the low-level spin lock in an occupied state exists;
the subtasks are performed with the CPU resources of the co-Cheng Shifang that occupy the low-level spin lock.
6. The method of claim 1, wherein the target spin lock is applied for acquisition by calling a first atomic operation function to read preset information in a memory; and adjusting the value in the preset information by calling a second atomic operation function so as to release the target spin lock.
7. A method according to any one of claims 3 to 6, wherein in the event that an exclusive lock and a shared lock are provided in the memory, the level of the exclusive lock is higher than the level of the shared lock.
8. A method according to any one of claims 3 to 6, wherein in the case where a write data lock and a read data lock are provided in the memory, the level of the write data lock is higher than the level of the read data lock.
9. The task execution device based on cooperative program is characterized in that the task execution device completes target tasks through cooperation of a plurality of cooperative programs in a thread, and comprises:
the determining unit is used for determining a target spin lock to be acquired according to the subtasks before any cooperative program in the threads executes the subtasks, wherein the subtasks are the subtasks in the target tasks, and the target spin lock is used for locking the execution codes of the subtasks;
the reading unit is used for reading preset information in the memory and executing the acquisition operation of the target spin lock, wherein the preset information records the occupied state of at least one spin lock;
the first control unit is used for controlling the cooperative distance to release CPU resources under the condition that the acquisition of the target spin lock fails, and applying for acquiring the target spin lock again under the condition that the cooperative distance is detected to be scheduled next time;
And the second control unit is used for executing the subtasks based on the CPU resource under the condition that the target spin lock is successfully acquired, and releasing the target spin lock under the condition that the subtasks are completely executed.
10. A computer storage medium for storing a program, wherein the program when executed controls a device in which the computer storage medium is located to perform the coroutine-based task execution method according to any one of claims 1 to 8.
11. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, the processor being arranged to execute the co-program based task execution method according to any of claims 1 to 8 by means of the computer program.
CN202310519101.9A 2023-05-09 2023-05-09 Task execution method and device based on coroutine, storage medium and electronic equipment Active CN116225728B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310519101.9A CN116225728B (en) 2023-05-09 2023-05-09 Task execution method and device based on coroutine, storage medium and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310519101.9A CN116225728B (en) 2023-05-09 2023-05-09 Task execution method and device based on coroutine, storage medium and electronic equipment

Publications (2)

Publication Number Publication Date
CN116225728A CN116225728A (en) 2023-06-06
CN116225728B true CN116225728B (en) 2023-07-14

Family

ID=86570001

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310519101.9A Active CN116225728B (en) 2023-05-09 2023-05-09 Task execution method and device based on coroutine, storage medium and electronic equipment

Country Status (1)

Country Link
CN (1) CN116225728B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117112235B (en) * 2023-10-19 2024-06-14 苏州元脑智能科技有限公司 Task execution method and device
CN117112246B (en) * 2023-10-24 2024-02-09 苏州元脑智能科技有限公司 Control device of spin lock

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014182507A (en) * 2013-03-18 2014-09-29 Mitsubishi Electric Corp Computer, exclusive control method, and exclusive control program
CN109710644A (en) * 2018-12-26 2019-05-03 苏州思必驰信息科技有限公司 The method and apparatus for preventing caching from penetrating
CN111767159A (en) * 2020-06-24 2020-10-13 浙江大学 Asynchronous system calling system based on coroutine
CN113918336A (en) * 2021-10-14 2022-01-11 海宁奕斯伟集成电路设计有限公司 FreeRTOS task running method and device based on multi-core CPU
CN115344302A (en) * 2022-10-19 2022-11-15 北京中科网威信息技术有限公司 User state queue spin lock generation method and device, electronic equipment and storage medium
CN116069512A (en) * 2023-03-23 2023-05-05 之江实验室 Serverless efficient resource allocation method and system based on reinforcement learning

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022100372A1 (en) * 2020-11-16 2022-05-19 Hui Ronald Chi Chun Processor architecture with micro-threading control by hardware-accelerated kernel thread

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014182507A (en) * 2013-03-18 2014-09-29 Mitsubishi Electric Corp Computer, exclusive control method, and exclusive control program
CN109710644A (en) * 2018-12-26 2019-05-03 苏州思必驰信息科技有限公司 The method and apparatus for preventing caching from penetrating
CN111767159A (en) * 2020-06-24 2020-10-13 浙江大学 Asynchronous system calling system based on coroutine
CN113918336A (en) * 2021-10-14 2022-01-11 海宁奕斯伟集成电路设计有限公司 FreeRTOS task running method and device based on multi-core CPU
CN115344302A (en) * 2022-10-19 2022-11-15 北京中科网威信息技术有限公司 User state queue spin lock generation method and device, electronic equipment and storage medium
CN116069512A (en) * 2023-03-23 2023-05-05 之江实验室 Serverless efficient resource allocation method and system based on reinforcement learning

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于远程直接内存访问的零拷贝远程过程调用框架的设计与实现;周华平;中国优秀硕士学位论文全文数据库 (信息科技辑);全文 *

Also Published As

Publication number Publication date
CN116225728A (en) 2023-06-06

Similar Documents

Publication Publication Date Title
CN116225728B (en) Task execution method and device based on coroutine, storage medium and electronic equipment
US20180321966A1 (en) Efficient detection and respone to spin waits in multi-processor virtual machines
US7406699B2 (en) Enhanced runtime hosting
US9170844B2 (en) Prioritization for conflict arbitration in transactional memory management
US9778962B2 (en) Method for minimizing lock contention among threads when tasks are distributed in multithreaded system and apparatus using the same
US5893157A (en) Blocking symbol control in a computer system to serialize accessing a data resource by simultaneous processor requests
CN111414256A (en) Application program process derivation method, system and medium based on kylin mobile operating system
JP2004288162A (en) Operating system architecture using synchronous task
JP2008522277A (en) Efficient switching between prioritized tasks
CN113157428A (en) Container-based resource scheduling method and device and container cluster management device
CN113918336A (en) FreeRTOS task running method and device based on multi-core CPU
CN115408117A (en) Coroutine operation method and device, computer equipment and storage medium
US9274819B2 (en) Performing garbage collection using a virtual thread in operating system without kernel thread support
US7603673B2 (en) Method and system for reducing context switch times
CN115576671A (en) Single-thread multi-task execution method, device, equipment and medium
KR101191727B1 (en) System and method for muulti-thread hadling using multi-virtual machine
JP5678347B2 (en) IT system configuration method, computer program thereof, and IT system
CN115061779B (en) Kernel lock management method and device for user state virtual machine
Horie et al. Balanced double queues for GC work-stealing on weak memory models
CN113810479B (en) Service coordination system and service coordination method
CN110018880B (en) IO thread execution method and device
CN115016948B (en) Resource access method and device, electronic equipment and readable storage medium
CN117608775A (en) Task scheduling method and device and electronic equipment
CN112379980A (en) Priority processing method and processing device for automatic operation and maintenance task
CN115543612A (en) Thread control method and device, electronic equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant