CN116224016A

CN116224016A - Chip testing device

Info

Publication number: CN116224016A
Application number: CN202211640322.3A
Authority: CN
Inventors: 白建民; 朱跃强; 于升辉; 高慧欣; 姚锡刚; 白俊; 朱海华
Original assignee: Bengbu Ximag Technology Co ltd
Current assignee: Bengbu Ximag Technology Co ltd
Priority date: 2022-12-20
Filing date: 2022-12-20
Publication date: 2023-06-06

Abstract

The invention provides a chip testing device which comprises a base, a testing mechanism, a carrier and a magnet, wherein the testing mechanism is connected with the base and comprises a plurality of first testing probes; the carrier is connected with the base, the carrier is arranged on one side of the testing mechanism, the carrier is suitable for placing a chip to be tested, and the magnet is arranged on one side of the carrier; the first test probe is close to the chip to be tested under the action of external force until the first test probe is in a detection state electrically connected with the chip to be tested, in the detection state, the magnet moves under the action of external force to change the gradient magnetic field at the chip to be tested, so that the test mechanism drives the magnet to move through the external force to change the gradient magnetic field at the chip to be tested in the movement state detected by the chip to be tested, the signal output of the chip to be tested is correspondingly changed, and the quality of the chip to be tested can be judged through the parameters.

Description

Chip testing device

Technical Field

The invention relates to the technical field of test tools of sensors, in particular to a chip test device.

Background

Test principle of linear displacement magnetic encoder: when the direction of an external gradient magnetic field (a magnetic field to be detected) with stronger magnetic field strength changes, the output of the encoder correspondingly changes. By collecting, testing and analyzing the output signals of the encoder, a relation curve between the output of the encoder and an external gradient magnetic field is obtained, and basic characteristics of the encoder, such as sensitivity, zero magnetic field output, precision and the like, can be obtained through the relation curve, and the product quality can be judged through the parameters.

In the traditional test fixture, an externally-changed gradient magnetic field cannot be provided for an encoder to be tested, the output condition of the encoder under the change of the externally-changed gradient magnetic field cannot be detected, namely, a relation curve between the output of the encoder and the externally-changed gradient magnetic field cannot be obtained, and further, the test requirements on performances such as sensitivity and precision of the encoder cannot be met, so that the sensitivity of the encoder cannot be obtained, and the performance excellent judgment of the encoder is affected.

Disclosure of Invention

Therefore, the technical problem to be solved by the invention is that in the test fixture in the prior art, an external variable gradient magnetic field cannot be provided for the encoder to be tested, so that the output condition of the encoder under the change of the external gradient magnetic field cannot be detected, namely, a relation curve between the output of the encoder and the external gradient magnetic field cannot be obtained, further, the test requirements on the performances of the sensitivity, the precision and the like of the encoder cannot be met, so that the sensitivity of the encoder cannot be obtained, and the excellent judgment of the performance of the encoder is influenced.

To this end, the present invention provides a chip testing apparatus comprising:

a base;

the test mechanism is connected with the base and comprises a plurality of first test probes;

the carrier is connected with the base, is arranged on one side of the testing mechanism and is suitable for placing a chip to be tested;

the magnet is arranged on one side of the object carrying body;

the first test probe is close to the chip to be tested under the action of external force until the first test probe is electrically connected with the chip to be tested, and in the detection state, the magnet moves under the action of external force to change the gradient magnetic field at the chip to be tested, so that the test mechanism detects the movement state of the chip to be tested.

Optionally, the testing device further comprises a limiting plate, wherein the limiting plate is connected with the base and arranged on one side, away from the testing mechanism, of the object carrying body, and a groove suitable for placing the magnet is formed in the limiting plate.

Optionally, the carrier is provided with a plurality of limit frames arranged in parallel, and the grooves are arranged along the length direction of the limit frames arranged in parallel.

Optionally, the method further comprises:

a slide bar, one end of which is connected with the magnet, and the slide bar is suitable for sliding in the groove;

the limiting block is connected with the other end of the sliding strip to limit the sliding distance of the sliding strip in the groove, and is in sliding connection with the sliding rail on the base;

and the pull rod is connected with the limiting block to drive the limiting block to move.

Optionally, the testing mechanism further includes a first printed circuit board, an upper port of the first printed circuit board is connected with the first test probe, and a voltage and/or current input end of the first printed circuit board is suitable for being connected with a plurality of power line groups so as to supply voltage and/or current to the first printed circuit board.

Optionally, the device further comprises a pressing plate mechanism, wherein the mounting end of the pressing plate mechanism is connected with the base, and the driving end of the pressing plate mechanism is connected with the first printed circuit board so as to drive the first test probe on the first printed circuit board to be far away from or close to the chip to be tested.

Optionally, the platen mechanism includes:

the support plate is connected with the base;

the fixed rib plate is connected with the supporting plate;

and one end of the clamp assembly is movably connected with the fixed rib plate, the other end of the clamp assembly is connected with the first printed circuit board, and the clamp assembly is configured to rotate around the movable connection part of the clamp assembly and the fixed rib plate so as to drive a first test probe on the first printed circuit board to be far away from or close to the chip to be tested.

Optionally, the platen mechanism further comprises:

a connecting block connected with the clamp assembly;

the fixed plate is connected with one side of the connecting block, which is far away from the clamp assembly;

and the upper pressing plate is connected with the fixed plate, the first printed circuit board is arranged between the fixed plate and the upper pressing plate, and a through hole which is suitable for the first test probe to pass through is formed in the upper pressing plate.

Optionally, the upper pressing plate is provided with a positioning hole suitable for being matched with a positioning pin on the carrier, and the depth of the positioning hole is smaller than the height of the positioning pin.

Optionally, the device further comprises a second printed circuit board connected between the carrier and the limiting plate, and a second test probe suitable for being connected with the chip to be tested is arranged on the second printed circuit board.

The technical scheme provided by the invention has the following advantages:

1. the invention provides a chip testing device, which comprises a base, a testing mechanism, a carrier and a magnet, wherein the testing mechanism is connected with the base and comprises a plurality of first testing probes; the carrier is connected with the base, the carrier is arranged on one side of the testing mechanism, the carrier is suitable for placing a chip to be tested, and the magnet is arranged on one side of the carrier; the first test probe is close to the chip to be tested under the action of external force until the first test probe is electrically connected with the chip to be tested, and in the detection state, the magnet moves under the action of external force to change the gradient magnetic field at the chip to be tested, so that the test mechanism detects the movement state of the chip to be tested.

According to the chip testing device with the structure, the magnet is arranged on one side of the object carrying body, the chip to be tested is placed on the object carrying body, the first testing probe in the testing mechanism is close to the chip to be tested under the action of external force until the first testing probe is electrically connected with the chip to be tested, the magnet is driven to move through the external force, and then the gradient magnetic field at the chip to be tested is changed, so that the signal output of the chip to be tested is correspondingly changed, the relation curve between the output of the chip to be tested and the external gradient magnetic field is obtained through collecting, testing and analyzing the output signal of the chip to be tested, and the basic characteristics of the encoder such as sensitivity, zero magnetic field output and precision of the encoder can be obtained through the relation curve, and the quality of the chip to be tested can be judged through the parameters.

2. The chip testing device provided by the invention further comprises a limiting plate, wherein the limiting plate is connected with the base and arranged on one side of the carrier far away from the testing mechanism, the limiting plate is provided with a groove suitable for placing the magnet, the carrier is provided with a plurality of limiting frames which are arranged in parallel, and the grooves are arranged along the length direction of the limiting frames which are arranged in parallel.

According to the chip testing device with the structure, the grooves suitable for placing the magnets are formed in the limiting plates, the plurality of limiting frames which are arranged in parallel are arranged on the carrier, and the grooves are arranged along the length direction of the limiting frames which are arranged in parallel, so that the connection test can be realized in batches and rapidly, and the testing efficiency is improved.

3. The chip testing device provided by the invention further comprises a pressing plate mechanism, wherein the mounting end of the pressing plate mechanism is connected with the base, and the driving end of the pressing plate mechanism is connected with the first printed circuit board so as to drive a first testing probe on the first printed circuit board to be far away from or close to the chip to be tested.

The chip testing device with the structure is characterized in that the pressing plate mechanism is arranged, the mounting end of the pressing plate mechanism is connected with the base, the driving end of the pressing plate mechanism is connected with the first printed circuit board, and the pressing plate mechanism can be pressed or lifted to drive the first testing probe on the first printed circuit board to approach or separate from the chip to be tested so as to realize measurement of the chip to be tested.

4. According to the chip testing device provided by the invention, the upper pressing plate is provided with the positioning holes which are suitable for being matched with the positioning pins on the carrier, and the depth of the positioning holes is smaller than the height of the positioning pins.

The chip testing device with the structure is characterized in that the depth of the locating hole is smaller than the height of the locating pin, so that a gap exists on the surface of the upper pressing plate above the corresponding limit frame of the chip to be tested, a certain safety distance is formed, and the chip to be tested and the upper pressing plate are prevented from being directly contacted and deformed to influence the testing effect during clamping.

5. The chip testing device provided by the invention further comprises a second printed circuit board which is connected between the carrier and the limiting plate, wherein a second testing probe which is suitable for being connected with the chip to be tested is arranged on the second printed circuit board.

The chip testing device with the structure is connected between the carrier and the limiting plate by arranging the second printed circuit board, and the second printed circuit board is provided with the second testing probes which are suitable for being connected with the chip to be tested, so that when the pin distribution surface to be tested of the chip to be tested is positioned below, the second testing probes on the second printed circuit board can be used for detection.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic view of the structure of a chip testing apparatus provided in an embodiment of the present invention;

FIG. 2 is an enlarged view of the structure at A in FIG. 1;

FIG. 3 is a schematic view of a structure of a chip testing apparatus according to an embodiment of the present invention with a cover plate removed from a base;

fig. 4 is a schematic diagram illustrating the cooperation of a limiting plate, a magnet, a slide bar, a limiting block and a pull rod in a chip testing device according to an embodiment of the present invention;

FIG. 5 is a schematic diagram illustrating the cooperation of a magnet, a slide bar, a stopper and a pull rod in a chip test device according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a test mechanism and a carrier in a chip test apparatus according to an embodiment of the present invention;

fig. 7 is an enlarged view of the structure at B in fig. 6;

FIG. 8 is an enlarged view of the structure at C in FIG. 6;

fig. 9 is a schematic structural diagram of a clamp assembly in a chip testing apparatus according to an embodiment of the present invention.

Reference numerals illustrate:

1-a base; 11-a slide rail;

2-a testing mechanism; 21-a first test probe; 22-a first printed circuit board;

3-carrying an article;

4-a chip to be tested;

51-a magnet; 52-sliding strips; 53-limiting blocks; 54-pull rod;

6, a limiting plate;

7-a platen mechanism; 71-a support plate; 72-fixing rib plates; 73-a clamp assembly; 731-handle; 732-an adapter; 733-connecting rod; 734-abutment; 74-connecting blocks; 75-fixing plates; 76-upper press plate; 77-a guide bar;

8-a second printed circuit board.

Detailed Description

The following description of the embodiments of the present invention will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.

Examples

The present embodiment provides a chip testing apparatus, as shown in fig. 1 to 9, including a base 1, a testing mechanism 2, a carrier 3, a magnet 51, and a platen mechanism 7. The carrier 3 is connected to the base 1, on which a chip 4 to be tested is disposed, the test mechanism 2 is provided with a plurality of first test probes 21, the first test probes 21 are electrically connected to the chip 4 to be tested, so that the test mechanism 2 can test the chip 4 to be tested, when the first test probes 21 are electrically connected to the chip 4 to be tested, the magnet 51 slides on one side of the chip 4 to be tested, and then the gradient magnetic field at the chip 4 to be tested is changed, so that the signal output of the chip 4 to be tested is correspondingly changed, and the output signal of the chip 4 to be tested is collected, tested and analyzed to obtain a relationship curve between the output of the chip 4 to be tested and the external gradient magnetic field, through which the basic characteristics of the encoder, such as sensitivity, zero magnetic field output, precision and the like, can determine the excellent performance of the chip 4 to be tested through the parameters.

The invention is applicable to the test of the encoder chip, and can apply a variable external gradient magnetic field to the encoder chip to be tested, thereby realizing the detection of the relation between the output of the encoder chip and the external gradient magnetic field, providing possibility for analyzing performance indexes such as sensitivity, precision and the like of the encoder chip, and simultaneously taking the detection as a good judgment standard to reduce the outflow of defective products.

Specifically, as shown in fig. 1 to 3, the pressing plate mechanism 7 includes a support plate 71, a fixing rib plate 72 and a clamp assembly 73, the support plate 71 is connected with the base 1 and is perpendicular to the surface of the base 1, the fixing rib plate 72 is connected with the support plate 71, and the clamp assembly 73 is arranged on one side of the fixing rib plate 72 close to the carrier 3.

As shown in fig. 2 and 9, the clamp assembly 73 includes a handle 731, a adapting piece 732, a connecting rod 733 and an abutting piece 734, the handle 731 is fixedly connected with the adapting piece 732, the adapting piece 732 is hinged to the surface of the fixed rib plate 72, one end of the abutting piece 734 is hinged to the adapting piece 732, the other end of the abutting piece 734 is hinged to the connecting rod 733, so that when the operating end of the handle 731 is lifted upwards, the handle 731 drives the adapting piece 732 to rotate upwards, the adapting piece 732 drives the abutting piece 734 to move upwards, and then the abutting piece 734 drives the connecting rod 733 to move upwards together, so that the connecting rod 733 drives the connecting block 74 connected with the other end of the connecting rod 733 to move upwards, and similarly, when the operating end of the handle 731 is pressed downwards, the handle 731 drives the connecting rod 733 to move downwards, so that the connecting block 74 connected with the other end of the connecting rod is driven to move downwards.

Further, as shown in fig. 3, a fixing plate 75 is fixedly connected to the connecting block 74, through holes are formed in four corners of the fixing plate 75, guide rods 77 are slidably connected to the through holes, one ends of the four guide rods 77 are fixedly connected to the base 1, and therefore the four guide rods 77 can limit the moving direction of the fixing plate 75.

As shown in fig. 1 to 3 and fig. 6 to 8, the fixing plate 75 is fixedly connected with the first printed circuit board 22 and the upper pressing plate 76 by screws, the first printed circuit board 22 is arranged between the fixing plate 75 and the upper pressing plate 76, and the screws are made of nonmagnetic brass or aluminum alloy. The voltage or current input end of the first printed circuit board 22 is connected with a plurality of power line groups for supplying variable voltage or current to the first printed circuit board 22, the output port of the first printed circuit board 22 is connected with a plurality of joint line groups, the other end of the joint line groups is connected with a detection device, and the real-time voltage of the output end of the first printed circuit board 22 is collected through the detection device.

Further, a plurality of first test probes 21 are fixed on the first printed circuit board 22, one end of each first test probe 21 is suitable for being correspondingly connected with the chip 4 to be tested, the other end of each first test probe 21 is connected with a port of the printed circuit board, and the first printed circuit board 22 provides power for the chip 4 to be tested through the first test probes 21 and collects output signals of the chip 4 to be tested. As shown in fig. 7, the upper platen 76 is provided with a plurality of probe through holes for passing the first test probes 21, and the first test probes 21 protrude from the surface of the upper platen 76 through the probe through holes.

The number of the first test probes 21 can be adjusted according to the structure of the chip 4 to be tested.

According to the invention, the operation end of the handle 731 is pressed downwards to drive the connecting rod 733 and the connecting block 74 to move downwards, so that a plurality of first test probes 21 on the first printed circuit board 22 are driven to move downwards until the first test probes 21 are electrically connected with the chip 4 to be tested, so that the first test probes 21 are in a detection state.

As shown in fig. 3, a limiting plate 6 is fixedly connected to one side of the base 1, which is close to the chip 4 to be tested, and a strip-shaped through groove is formed in one side of the limiting plate 6, which is close to the chip 4 to be tested, and a magnet 51 is slidably arranged in the through groove.

Specifically, as shown in fig. 4 and 5, one end of the magnet 51 is connected with the sliding bar 52, the other end of the sliding bar 52 is connected with the limiting block 53, and the cross section size of the limiting block 53 is larger than that of the through groove, so that the limiting block 53 can limit the sliding distance of the magnet 51 in the through groove, and further, the other end of the limiting block 53 is fixedly connected with the pull rod 54, and the magnet 51 can be driven to slide in the through groove by pulling the pull rod 54. The limiting block 53 is slidably connected with the sliding rail 11 provided on the base 1 on a side close to the base 1, and the sliding rail 11 can limit a moving track of the limiting block 53.

The present invention is provided by providing a magnet 51 on one side of the carrier 3, the magnet 51 being a magnetic grid ruler or magnetic code bar or the like arranged to be able to generate a gradient magnetic field. The chip 4 to be tested is placed on the carrier 3, the first test probe 21 in the test mechanism 2 approaches to the chip 4 to be tested under the action of the handle 731 until the first test probe is electrically connected with the chip 4 to be tested, the pull rod 54 drives the magnet 51 to move in the through groove, and then the gradient magnetic field at the chip 4 to be tested is changed, so that the signal output of the chip 4 to be tested is correspondingly changed, the relation curve between the output of the chip 4 to be tested and the external gradient magnetic field is obtained through collecting, testing and analyzing the output signal of the chip 4 to be tested, the basic characteristics of the encoder such as sensitivity, zero magnetic field output, accuracy and the like of the encoder can be obtained through the relation curve, and the excellent performance of the chip 4 to be tested can be judged through the parameters.

Wherein, the upper pressing plate 76 is provided with a positioning hole suitable for being matched with a positioning pin on the object-carrying body 3, and the depth of the positioning hole is smaller than the height of the positioning pin, so that a gap exists on the surface of the upper pressing plate 76 above the corresponding limit frame of the chip 4 to be tested, a certain safety distance is formed, and the chip 4 to be tested is prevented from being directly contacted with the upper pressing plate 76 to deform under stress during clamping, thereby influencing the testing effect.

Further, a plurality of limit frames are arranged on the carrier 3 in parallel, the chips 4 to be tested are placed in the limit frames, and the first test probes 21 are arranged on the first printed circuit board 22 corresponding to the positions of each limit frame, so that batch detection of the chips 4 to be tested can be realized. And simultaneously, before the chips are not removed from the mother board, the whole mother board can be clamped, and all the chips on the mother board are tested at the same time, so that the test is directly carried out when the chips are semi-finished products.

In other embodiments, a second printed circuit board 8 may be further disposed between the carrier 3 and the limiting board 6, where a second test probe adapted to be connected to the chip 4 to be tested is disposed on the second printed circuit board 8, so that when the pin distribution surface to be tested of the chip 4 to be tested is located below, the second test probe on the second printed circuit board 8 can be used to detect, or when the pin distribution surface to be tested of the chip 4 to be tested is located above and below, the first printed circuit board 22 and the second printed circuit board 8 together detect the chip 4 to be tested.

In the chip testing device provided in this embodiment, during testing, the chip 4 to be tested is respectively placed in the limiting frame of the carrier 3, the handles 731 are held by hand to press down, the upper pressing plate 76 slides down at this time, the upper pressing plate 76 and the carrier 3 are pressed together, the first testing probe 21 on the first printed circuit board 22 is connected with the chip 4 to be tested, meanwhile, the first printed circuit board 22 is supplied with variable voltage or current, the hand-held pull rod 54 is pulled and plugged once, the real-time voltage of the output end on the first printed circuit board 22 is collected through the detection device, the power supply assembly and the data processor are connected through the circuit to provide power for the detection device, and the data collection processing is performed to timely record whether each chip 4 to be tested on the carrier 3 is qualified or not.

The chip testing device of the embodiment of the application is not limited to testing the encoder chip, and can be applied to other chips which need to provide an external variable gradient magnetic field for testing.

It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While still being apparent from variations or modifications that may be made by those skilled in the art are within the scope of the invention.

Claims

1. A chip testing apparatus, comprising:

a base (1);

the test mechanism (2) is connected with the base (1), and the test mechanism (2) comprises a plurality of first test probes (21);

the carrier (3) is connected with the base (1), the carrier (3) is arranged on one side of the testing mechanism (2), and the carrier (3) is suitable for placing a chip (4) to be tested;

a magnet (51) provided on one side of the carrier (3);

the first test probe (21) approaches the chip (4) to be tested under the action of external force until the first test probe (21) is electrically connected with the chip (4) to be tested, and in the detection state, the magnet (51) moves under the action of external force to change the gradient magnetic field at the chip (4) to be tested, so that the test mechanism (2) can detect the movement state of the chip (4) to be tested.

2. The chip testing device according to claim 1, further comprising a limiting plate (6), wherein the limiting plate (6) is connected with the base (1) and is arranged on one side of the carrier (3) away from the testing mechanism (2), and a groove suitable for placing the magnet (51) is formed in the limiting plate (6).

3. The chip testing device according to claim 2, wherein the carrier (3) is provided with a plurality of limit frames arranged in parallel, and the grooves are arranged along the length direction of the limit frames arranged in parallel.

4. The chip testing apparatus according to claim 3, further comprising:

a slide bar (52) having one end connected to the magnet (51), the slide bar (52) being adapted to slide in the recess;

the limiting block (53) is connected with the other end of the sliding strip (52) to limit the sliding distance of the sliding strip (52) in the groove, and the limiting block (53) is in sliding connection with the sliding rail on the base (1);

and the pull rod (54) is connected with the limiting block (53) to drive the limiting block (53) to move.

5. Chip testing device according to any of claims 1-4, wherein the testing mechanism (2) further comprises a first printed circuit board (22), wherein an upper port of the first printed circuit board (22) is connected to the first test probe (21), and wherein the voltage and/or current input of the first printed circuit board (22) is adapted to be connected to several power line groups for supplying the voltage and/or current to the first printed circuit board (22).

6. The chip testing apparatus according to claim 5, further comprising a platen mechanism (7), wherein a mounting end of the platen mechanism (7) is connected to the base (1), and a driving end of the platen mechanism (7) is connected to a first printed circuit board (22) to drive a first test probe (21) on the first printed circuit board (22) away from or close to the chip (4) under test.

7. Chip testing device according to claim 6, characterized in that the platen mechanism (7) comprises:

a support plate (71) connected to the base (1);

a fixing rib plate (72) connected with the supporting plate (71);

and one end of the clamp assembly (73) is movably connected with the fixed rib plate (72), the other end of the clamp assembly (73) is connected with the first printed circuit board (22), and the clamp assembly (73) is configured to rotate around the movable connection part with the fixed rib plate (72) so as to drive a first test probe (21) on the first printed circuit board (22) to be far away from or close to the chip (4) to be tested.

8. Chip testing device according to claim 7, wherein the platen mechanism (7) further comprises:

a connection block (74) connected to the clamp assembly (73);

a fixing plate (75) connected with one side of the connecting block (74) away from the clamp assembly (73);

the upper pressing plate (76) is connected with the fixing plate (75), the first printed circuit board (22) is arranged between the fixing plate (75) and the upper pressing plate (76), and a through hole which is suitable for the first test probe (21) to pass through is formed in the upper pressing plate (76).

9. Chip testing device according to claim 8, wherein the upper platen (76) is provided with positioning holes adapted to cooperate with positioning pins on the carrier body (3), and wherein the positioning holes have a depth smaller than the height of the positioning pins.

10. Chip testing apparatus according to any of claims 6-9, further comprising a second printed circuit board (8) connected between the carrier body (3) and the limiting plate (6), the second printed circuit board (8) being provided with second test probes adapted to be connected to the chip (4) to be tested.