CN116190210B - Reprocessing method of wafer level package - Google Patents

Reprocessing method of wafer level package Download PDF

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CN116190210B
CN116190210B CN202310431692.4A CN202310431692A CN116190210B CN 116190210 B CN116190210 B CN 116190210B CN 202310431692 A CN202310431692 A CN 202310431692A CN 116190210 B CN116190210 B CN 116190210B
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wafer
layer
reprocessing
steps
tiw
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CN116190210A (en
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崔正山
程李标
张国栋
龙欣江
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Jiangsu Silicon Integrity Semiconductor Technology Co Ltd
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Jiangsu Silicon Integrity Semiconductor Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02079—Cleaning for reclaiming
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

The invention discloses a reprocessing method of wafer level packaging, which comprises the following steps: if the PI layer does not need to be removed, the wafer is only required to be subjected to the treatment of removing the Bump, removing the Ti or TiW; if a PI layer is required to be removed, the reprocessing method comprises the steps of removing the PI layer (IPA soaking), removing the Bump, removing the Ti or TiW. The invention not only solves the problem that Al pad (chip press area/aluminum pad) is damaged during reworking and reprocessing of wafers, but also can reprocess part or all of procedures for nPnM structures such as 0P1M, 1P2M, 2P2M and the like related to various products such as WLCSP, pillar, solder and the like. The reprocessing method can save low-quality wafers, reprocess abnormal procedures, even restore the wafer products to the incoming state, and facilitate the subsequent reprocessing to improve the wafer yield, thereby improving the yield of the whole wafer products.

Description

Reprocessing method of wafer level package
Technical Field
The invention relates to the technical field of semiconductor detection, in particular to a reprocessing method of wafer level packaging.
Background
Wafer level packaging (Wafer LevelPackaging, abbreviated WLP) is an advanced packaging technology, which has the advantages of small size, excellent electrical performance, good heat dissipation, low cost, etc., and has been rapidly developed in recent years.
In the WLP packaging process, yield of the packaged product is lost due to various anomalies, and low-quality packaged products appear. For example, the patterns displayed after development do not meet the process requirements because of uneven photoresist coating, poor photoresist curing effect, poor exposure alignment precision and the like; and the Bump has the abnormal conditions of tin explosion, bridging, deformation and the like, and the package requirement is not met. At this time, in order to improve the yield of the packaged product and meet the requirement of customers on the yield of the product, the low-quality packaged product needs to be saved, for example, reprocessed to a process that the low-quality product is abnormal, or the packaged product is restored to a material feeding state, so that the subsequent reprocessing is convenient to improve the yield of the wafer. In general, in the reprocessing process, not only the PI layer (photoresist layer) needs to be removed, but also the bump, even Ti or TiW (seed layer) directly connected to the lower surface of the PI layer (photoresist layer), needs to be removed.
The structures related to the multi-type products such as WLCSP, pillar, solder are nPnM structures such as 0P1M, 1P2M and 2P 2M. In the prior art, the reworking and reprocessing process is single, and the reworking and reprocessing method only aims at the PI layer or the seed layer, and does not have a method for carrying out complete flow reworking and reprocessing on a plurality of types of products such as WLCSP, pillar, solder. In addition, in the conventional reworking and reprocessing process, there is often a case where Al pad (die pad/aluminum pad) is damaged.
Accordingly, there is a need to provide a reprocessing method that can be adapted to multiple types of wafer level packages.
Disclosure of Invention
In order to solve the above problems, the present invention provides a reprocessing method of wafer level package, which can save low-quality wafers, reprocess abnormal processes, and even restore the wafers to a material-receiving state, so as to facilitate the subsequent reprocessing to improve the wafer yield, thereby improving the yield of the whole wafer product.
The invention discloses a reprocessing method of wafer level packaging, which comprises the following steps:
s1, performing a wafer de-Bump process, which comprises the following steps:
a. when the Bump of the wafer is CuSn, niSnAg, cuSnAg, cuNiSnAg plating and the Cu plating structure has a height of more than 20um, removing the Bump by using a stripping solution A, wherein the stripping solution A comprises the following components: 45% -55% of nitric acid, 0.5% -1% of aluminum protective agent and the balance of DI water;
or when the Bump of the wafer is a Cu plating structure with the height of less than 20um, removing the Bump by using a stripping solution B, wherein the stripping solution B comprises the following components: h 2 O 2 1%-5%，H 3 PO 4 5% -20%, the balance being DI water;
b. taking out the wafer from the deplating liquid A or the deplating liquid B, immediately flushing the wafer by using a QDR groove, or cleaning the wafer by sequentially passing through the QDR groove and a single chip cleaning machine; drying the wafer after cleaning;
c. high-pressure cleaning is carried out by using the single-chip cleaning machine again, so that the wafer has no Bump residue;
s2, carrying out Ti or TiW annealing treatment on the wafer subjected to the Bump annealing treatment, wherein the method comprises the following steps of:
a. placing the wafer into the etching solution A for Ti removal treatment, or placing the wafer into the etching solution B for TiW removal treatment;
b. immediately flushing and drying the Ti or TiW by a QDR groove after Ti or TiW is removed;
c. and (3) performing high-pressure cleaning by using the single-chip cleaning machine again to ensure that the wafer has no Ti or TiW residues.
In some embodiments, prior to step S1, a step S0 of de-PI layer and IPA soak process is further included, comprising the steps of:
a. immersing the wafer in a PI layer removing solution with the temperature kept at 160+/-20 ℃, wherein the thickness of the PI layer is H um, and the immersion time T= (5+H) min;
b. immediately placing the wafer into IPA solution to cool and remove residual liquid on the surface of the wafer after the immersion time is over;
c. after the wafer is taken out of the IPA solution, the wafer is immediately washed by a QDR groove or is washed by a single-chip washer; drying the wafer after cleaning;
d. and (3) performing high-pressure cleaning by using the single-chip cleaning machine again to ensure that the wafer has no PI layer residue.
Compared with the prior art, the invention has the beneficial effects that:
the invention not only solves the problem of damage to Al pad (chip press area/aluminum pad) during wafer reprocessing, but also can carry out the reworking and reprocessing of part or all of procedures for nPnM structures such as 0P1M, 1P2M, 2P2M and the like related to various products such as WLCSP, pillar, solder and the like.
The reprocessing method can save low-quality wafers, reprocess abnormal procedures, even restore the wafer products to the incoming state, and facilitate the subsequent reprocessing to improve the wafer yield, thereby improving the yield of the whole wafer products.
Drawings
FIG. 1 is a flow chart of reworking and reprocessing a wafer product having a 1P1M structure according to embodiment 1 of the present invention;
fig. 2 is a flow chart of reworking and reprocessing of a 2P2M structure wafer product according to embodiment 3 of the present invention.
Reference numerals illustrate: 1. a chip press region; 2. a passivation layer; 3. a seed layer; 4. a buffer; 5. a PI layer; 6. a rewiring layer; 51. a first PI layer; 52. and a second PI layer.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments.
The present invention can be used for reworking and reprocessing part or all of the processes for npnM structures such as 0P1M, 1P2M, 2P2M, etc. related to various types of products such as WLCSP, pillar, solder, and is specifically described in the following examples.
In the whole reworking and reprocessing process, the shorter the specific time is, the better the specific time is, and the longer the wafer is left unused, so that the Al pad is at risk of damage, and the whole reworking and reprocessing process time is required to be controlled within 24 hours.
Example 1
For reworking and reprocessing of the wafer products with the structures of 0P1M and 1P1M, the PI layer 5 is not required to be removed, and the reprocessing method only needs to remove the Bump4, the Ti or the TiW (seed layer 3) for processing, namely, the steps S1-S2 are two steps, and the reprocessing method can be specifically carried out according to the following method:
s1, carrying out a wafer de-Bump 4 treatment;
s2, carrying out Ti or TiW annealing treatment on the wafer subjected to the Bump4 annealing treatment.
The step S1 includes the following steps:
a. when the Bump4 of the wafer is CuSn, niSnAg, cuSnAg, cuNiSnAg plated and Cu plated structures with a height greater than 20um, the Bump4 is removed using the stripping solution a.
When the Bump4 of the wafer is a Cu plating structure having a height of less than 20um, the Bump4 is removed using the stripping solution B.
The deplating solution A comprises the following components: 45% -55% of nitric acid, 0.5% -1% of aluminum protective agent and the balance of DI water; the deplating solution B comprises the following components: h 2 O 2 1%-5%，H 3 PO 4 5% -20%, the balance being DI water;
b. taking out the wafer from the deplating liquid A or the deplating liquid B, immediately flushing the wafer by using a QDR groove, or cleaning the wafer by sequentially passing through the QDR groove and a single chip cleaning machine; and drying the wafer after cleaning.
c. And (5) performing high-pressure cleaning by using the single-chip cleaning machine again to ensure that the wafer has no Bump4 residues.
The reworking and reprocessing of the wafer is only a low-frequency event, and millions of reprocessing exclusive machine stations are allocated for the low-frequency event, so that most of the reprocessing process operation in the invention can be carried out by using the existing machine stations, such as a groove type QDR groove (quick Rinse) or a single-chip cleaning machine, the groove type QDR groove is divided into a photoresist-removing QDR groove and a corrosion QDR groove, reprocessing products cannot be cleaned in the photoresist-removing QDR groove, because the photoresist-removing QDR groove has photoresist-removing residues, the photoresist-removing solution is alkaline, aluminum reacts with alkali, adverse effects are caused on the wafer products, and damage to Al pad (chip pressure area/aluminum pad) is avoided. DI water cleaning is performed by the single-chip cleaning machine under the condition of conditional permission, and the wafer product only contacts with the sprayed DI water because the DI water of the single-chip cleaning machine is not contacted with the groove, so that the purity of the DI water is ensured. The specific cleaning mode is as follows: and (3) immediately spraying and flushing the wafer product for 2min by using a QDR groove after the wafer product is taken out of the deplating liquid A or the deplating liquid B, then placing the wafer product into a transfer box with DI water, and immediately transferring the wafer product to a single-chip cleaning machine for cleaning.
The Q-Time of steps a through c in step S1 is within 1 h. Finally, after checking that PI layer 5 has no residue by OM (optical microscope), the following step S2 is performed.
After the unbuff 4 processing is completed, step S2 is performed, where step S2 includes the following steps:
a. placing the wafer into the etching solution A for Ti removal treatment, or placing the wafer into the etching solution B for TiW removal treatment;
b. immediately flushing and drying the Ti or TiW by a QDR groove after Ti or TiW is removed; the QDR tank also uses a clean tank and cannot be used to clean reprocessed wafer products for reasons set forth above.
c. And (3) performing high-pressure cleaning by using the single-chip cleaning machine again to ensure that the wafer has no Ti or TiW residues. The OM (optical microscope) was used to examine whether Ti or TiW remained.
The Q-Time of steps S2 a to c is within 2 h. And 2D scanning is carried out after inspection, and the function of the 2D scanning is to confirm the yield of the reprocessed wafer, namely, if residues or foreign matters exist on the surfaces of the chip press region 1 and the PI layer 5, the processing is carried out in a targeted manner, and the yield after reprocessing is improved.
Fig. 1 schematically shows a wafer product rework re-process flow diagram of a 1P1M structure.
Example 2
For reworking and reprocessing of a wafer product with a 1P2M structure, a PI removal layer 5 is generally required, and the reprocessing method includes three steps of PI removal layer 5 (IPA soaking), bump removal 4, ti removal or TiW treatment, namely steps S0-S1-S2, and specifically can be performed according to the following method:
s0, removing the PI layer 5 and performing IPA soaking treatment;
s1, carrying out a wafer de-Bump 4 treatment;
s2, carrying out Ti or TiW annealing treatment on the wafer subjected to the Bump4 annealing treatment.
The step S0 includes the following steps:
a. immersing the wafer in the PI layer removing liquid with the temperature kept at 160+/-20 ℃, wherein the thickness of the PI layer 5 of the wafer is H um, and the immersion time T= (5+H) min.
The PI-removing layer liquid in this embodiment includes the following components: 1-methyl-2-pyrrolidone is more than 60 percent, and 2- (2-amino ethoxy) ethanol is 10 to 20 percent. Polyimide dissolves slowly in the high temperature PI-removing layer liquid. Because a large amount of smoke is generated under the high temperature condition of the PI layer liquid, the PI layer liquid needs to be operated under the condition of good air exhaust.
Regarding the immersion time t= (5+H) min, i.e., if the PI layer 5 of the wafer is 5um thick, the immersion time is 5+5=10 min. The wafer is immersed in the high-temperature PI layer removing liquid for 10 minutes.
b. And immediately placing the wafer into an IPA (isopropyl alcohol) solution to cool after the immersion time is over, and removing residual liquid on the surface of the wafer. Soaking time is 1-5min. The key point of this embodiment is that the wafer is immediately put into the IPA solution after being taken out of the PI-removing solution, and the wafer cannot be drained, otherwise, the PI-removing solution is easy to dry on the surface of the wafer, so that excessive foreign matters exist on the wafer.
c. After the wafer is taken out of the IPA solution, the wafer is immediately washed by a clean QDR groove or is washed by a single-chip washer; drying the wafer after cleaning;
d. and (5) performing high-pressure cleaning by using the single-chip cleaning machine again to ensure that the wafer has no PI layer 5 residue.
After the PI layer 5 removal process is completed, the wafer may be inspected, and after the PI layer 5 is inspected to have no residue by using an OM (optical microscope), steps S1 and S2 are performed, which are the same as those in embodiment 1, and are not described herein.
After the whole reprocessing process is finished, the wafer is subjected to 2D scanning, and the function of the 2D scanning is to confirm the yield of the reprocessed wafer, namely, if residues or foreign matters exist on the surfaces of the chip press region 1 and the passivation layer 2, the reprocessed wafer is processed in a targeted manner, and the yield after reprocessing is improved.
Example 3
Fig. 2 schematically illustrates a reworking and reprocessing flow diagram of a 2P2M structured wafer product. For the reprocessing of the wafer product with the 2P2M structure, if the PI layer 5 is required to be processed, because there are 2 PI layers 5, i.e. the first PI layer 51 and the second PI layer 52, 2 PI layer steps are required, and the reprocessing method includes the processing of the PI layer (IPA soaking), the processing of the PI layer 4, the processing of the Ti layer or the TiW layer and the processing of the PI layer (IPA soaking), i.e. the steps S0-S1-S2-S0, which can be specifically performed according to the following method:
s0, removing the PI layer and performing IPA soaking treatment;
s1, carrying out a wafer de-Bump 4 treatment;
s2, ti or TiW (seed layer 3) removing treatment is carried out on the wafer subjected to the Bump4 removing treatment;
s0, removing the PI layer and performing IPA soaking treatment.
And for reprocessing the 2P2M product, the PI layer 5 is firstly retreated to the Bump4, and the rewiring layer 6 (RDL) can be removed together at the same time of retreating the Bump4, so that the reprocessing procedure and time are saved.
The three steps S0-S1-S2 are the same as the implementation of the embodiment 2, and only after S2, the PI layer removal process needs to be performed on the last PI layer, which is specifically the step S0 of placing the wafer subjected to Ti or TiW removal into the PI layer removal solution to complete the process, and the step S0 is the same as the requirements of the embodiments 1 and 2, and will not be repeated here.
Similarly, after the whole reprocessing process is completed, the wafer is subjected to 2D scanning, and the effect of the 2D scanning is to confirm the yield of the reprocessed wafer product, that is, if residues or foreign matters exist on the surfaces of the die pressing area 1 and the passivation layer 2, the reprocessed wafer product is processed in a targeted manner, so that the yield after reprocessing is improved.
In summary, the invention solves the problem of damage to Al pad (chip press area/aluminum pad) during reworking and reprocessing of the wafer by a specific method, and can also reprocess part or all of procedures according to nPnM structures such as 0P1M, 1P2M, 2P2M and the like related to a plurality of types of products such as WLCSP, pillar, solder, and only needs to combine each step according to actual needs, thereby the method is simple and reliable and the reprocessing success rate of the wafer is improved. The wafer packaging method has the advantages that low-quality wafer packaging is saved, abnormal procedures are reprocessed, even the wafer products are restored to the incoming state, and the subsequent reprocessing is facilitated to improve the wafer yield, so that the yield of the whole wafer products is improved. However, in the reworking and reprocessing process, since the used PI-removing layer liquid is organic, a large amount of smoke is generated, and the respiratory tract is easily damaged, the reprocessor needs to work under the condition of good air exhaust, and the reprocessor needs to take a 3M mask (with an organic filter box) for further protection. The deplating solution A contains nitric acid, has strong corrosiveness, and reacts with metal to generate a large amount of brown yellow acid gas NO 2 The operation is required under the condition of good air exhaust, and the reprocessor needs to carry 2 layers of nitrile gloves, protective clothing, protective face masks and 3M masks (with acid-base filter boxes) during reprocessing.
While only certain embodiments of the present invention have been described, it will be apparent to those skilled in the art that other modifications and improvements can be made without departing from the inventive concept of the present invention.

Claims (7)

1. A method of reprocessing a wafer level package, the method comprising the steps of:
s1, performing bump removal processing on a wafer, wherein the bump removal processing comprises the following steps of:
a. when the bumps of the wafer are CuSn, niSnAg, cuSnAg, cuNiSnAg plating layers and Cu plating layer structures with the heights of more than 20um, removing the bumps by using a stripping solution A, wherein the stripping solution A comprises the following components: 45% -55% of nitric acid, 0.5% -1% of aluminum protective agent and the balance of deionized water;
or when the bumps of the wafer are of a Cu plating structure with the height less than 20um, removing the bumps by using a stripping solution B, wherein the stripping solution B comprises the following components: h 2 O 2 1%-5%，H 3 PO 4 5% -20%, and the balance is deionized water;
b. taking out the wafer from the deplating liquid A or the deplating liquid B, immediately flushing the wafer by using a quick-discharge flushing tank, or cleaning the wafer by using the quick-discharge flushing tank and a single-chip cleaning machine in sequence; drying the wafer after cleaning;
c. cleaning the wafer by using a single-chip cleaning machine again to ensure that the wafer has no bump residues;
s2, carrying out Ti or TiW removing treatment on the wafer subjected to the bump removing treatment, wherein the method comprises the following steps of:
a. placing the wafer into the etching solution A for Ti removal treatment, or placing the wafer into the etching solution B for TiW removal treatment;
b. immediately flushing and drying the Ti or TiW by using a quick-discharge flushing tank after Ti or TiW is removed;
c. cleaning the wafer by using a single-chip cleaning machine again, so that the wafer has no Ti or TiW residues;
before step S1, the method further comprises a step S0 of removing the PI layer and IPA soaking treatment, which comprises the following steps:
a. immersing the wafer in a PI layer removing solution with the temperature kept at 160+/-20 ℃, wherein the thickness of the PI layer is H um, and the immersion time T= (5+H) min;
b. immediately placing the wafer into IPA solution to cool and remove residual liquid on the surface of the wafer after the immersion time is over;
c. after the wafer is taken out of the IPA solution, the wafer is immediately washed by a quick-discharge washing tank or is washed by a single-chip washer; drying the wafer after cleaning;
and cleaning the wafer by using the single-chip cleaning machine again, so that the wafer has no PI layer residue.
2. The method of claim 1, wherein the de-PI layer comprises the following components: 1-methyl-2-pyrrolidone is more than 60 percent, and 2- (2-amino ethoxy) ethanol is 10 to 20 percent.
3. The method of claim 2, wherein the fast-drain flushing slots in steps S0 to S2 are clean slots.
4. A method of reprocessing a wafer level package according to claim 3, wherein the completion time of a to c in step S1 is within 1 h.
5. The method of claim 4, wherein the completion time of a to c in step S2 is within 2 h.
6. The method of claim 5, wherein the cleaning in steps S0 to S2 is performed at a pressure of 600-1000 Psi.
7. The method of claim 6, wherein the completion time of steps S0 to S2 is within 24 hours.
CN202310431692.4A 2023-04-21 2023-04-21 Reprocessing method of wafer level package Active CN116190210B (en)

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