CN116170000A - Delay turn-off control circuit, power supply and electronic equipment - Google Patents

Delay turn-off control circuit, power supply and electronic equipment Download PDF

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Publication number
CN116170000A
CN116170000A CN202310243000.3A CN202310243000A CN116170000A CN 116170000 A CN116170000 A CN 116170000A CN 202310243000 A CN202310243000 A CN 202310243000A CN 116170000 A CN116170000 A CN 116170000A
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CN
China
Prior art keywords
transistor
power supply
circuit
control circuit
signal input
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CN202310243000.3A
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Chinese (zh)
Inventor
李振国
刘永锋
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Chengdu Bor Microcrystalline Technology Co ltd
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Chengdu Bor Microcrystalline Technology Co ltd
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Priority to CN202310243000.3A priority Critical patent/CN116170000A/en
Publication of CN116170000A publication Critical patent/CN116170000A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28Modifications for introducing a time delay before switching
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28Modifications for introducing a time delay before switching
    • H03K17/284Modifications for introducing a time delay before switching in field effect transistor switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K2217/00Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036Means reducing energy consumption
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention relates to the technical field of analog circuits, and particularly discloses a delay turn-off control circuit, a power supply and electronic equipment, wherein the delay turn-off control circuit comprises: the power supply circuit, the inverting circuit, the RS trigger, the first transistor, the second transistor, the first signal input end, the second signal input end and the first capacitor; the output end of the power supply circuit is connected with the source electrode of the first transistor, the drain electrode of the first transistor is connected with the drain electrode of the second transistor, the first signal input end is connected with the grid electrode of the first transistor and the grid electrode of the second transistor, the source electrode of the second transistor is connected with the drain electrode of the second transistor and the input end of the inverting circuit through the first capacitor, the output end of the inverting circuit is connected with the R end of the RS trigger, the second signal input end is connected with the trigger end of the RS trigger, and the Q end of the RS trigger is the circuit output end; the delay turn-off control circuit has the advantages of small occupied layout area, simple structure and low power consumption.

Description

Delay turn-off control circuit, power supply and electronic equipment
Technical Field
The application relates to the technical field of analog circuits, in particular to a delay turn-off control circuit, a power supply and electronic equipment.
Background
With the continuous development of science and technology, the requirements of people on the use comfort level of electronic products are continuously improved.
Due to electronics, such as products employing motor drives, there is always a face to motor standby. After the electronic equipment stands by, the internal power supply is turned off, if the electronic equipment needs to work continuously, the internal power supply needs to be restarted, so that the electronic equipment can be powered off after each standby, and the defect of low restarting speed is caused; the existing electronic equipment also has the function of realizing time-delay power-off by adopting structures such as a positive feedback circuit and the like, but the circuit structures are complex and occupy large layout area.
In view of the above problems, no effective technical solution is currently available.
Disclosure of Invention
The purpose of the application is to provide a delay turn-off control circuit, a power supply and electronic equipment, so as to simplify the circuit structure of delay turn-off control of the power supply and reduce the layout area.
In a first aspect, the present application provides a delay shutdown control circuit for controlling a power supply to be turned off in a delay, the delay shutdown control circuit including:
the power supply circuit, the inverting circuit, the RS trigger, the first transistor, the second transistor, the first signal input end, the second signal input end and the first capacitor;
the output end of the power supply circuit is connected with the source electrode of a first transistor, the drain electrode of the first transistor is connected with the drain electrode of a second transistor, the first signal input end is connected with the grid electrode of the first transistor and the grid electrode of the second transistor, the source electrode of the second transistor is connected with the drain electrode of the second transistor and the input end of the inverting circuit through a first capacitor, the output end of the inverting circuit is connected with the R end of the RS trigger, the second signal input end is connected with the trigger end of the RS trigger, the S end of the RS trigger is connected with VDD, the Q end of the RS trigger is a circuit output end, and input signals of the first signal input end and the second signal input end are the same.
The delay turn-off control circuit realizes the delay turn-off control of the power supply, so that the power supply can be turned off after standby delay, and the power supply is not required to be started again to be electrified if the power supply is switched to a working state again before the power supply is turned off.
The delay turn-off control circuit is characterized in that the power supply circuit is a current mirror circuit.
In this example, the bias current source and the current mirror can form a series of current sources for outputting currents with different magnitudes, so that the internal circuit resources of the power supply are fully utilized, and the mirror currents with different magnitudes can be designed according to actual requirements.
The delay turn-off control circuit comprises a current mirror circuit, a first current source and a second current mirror circuit, wherein the current mirror circuit comprises a third transistor, a fourth transistor and a first current source;
the source electrode of the third transistor is connected with the source electrode of the fourth transistor and is connected with the power supply voltage, the grid electrode of the third transistor is connected with the grid electrode of the fourth transistor and the drain electrode of the third transistor, the drain electrode of the third transistor is grounded through a first current source, and the drain electrode of the fourth transistor is connected with the source electrode of the first transistor.
The delay turn-off control circuit comprises a third transistor, a fourth transistor and a delay turn-off control circuit, wherein the third transistor and the fourth transistor are PMOS transistors.
And the delay turn-off control circuit comprises an odd number of inverters which are sequentially connected.
And the delay turn-off control circuit comprises three inverters.
The delay turn-off control circuit is characterized in that the first transistor is a PMOS transistor, and the second transistor is an NMOS transistor.
The delay turn-off control circuit is characterized in that the first signal input end and the second signal input end are consistent in structure and are single-channel input ends or multi-input ends or gates.
In this example, when the first signal input end and the second signal input end are single-channel input ends, the input signals are equal to the output signals, that is, the delay turn-off control circuit of the present application directly performs power switch control according to the input signals of the first signal input end and the second signal input end; the input signals of the first signal input end and the second signal input end represent the working state of the whole power supply; the first signal input end and the second signal input end are multiple-input or gates, input signals of the multiple-input or gates are output according to the logical operation of the or gates based on a plurality of input signals, the input signals respectively correspond to working states of different modules of the power supply, and when any one or more modules are in the working states, the multiple-input or gates output high-level signals, so that the delay turn-off control circuit keeps the output state.
In a second aspect, the present application further provides a power supply, including the delay turn-off control circuit provided in the first aspect.
The power supply of the electronic equipment belongs to the internal power supply of the electronic equipment, the delay turn-off control circuit is adopted to realize delay turn-off control, the turn-off can be performed after standby delay, if the switch-off is performed before the turn-off is switched to the working state again, the power supply is not required to be started again, the delay turn-off control circuit is simple in structure, and the power consumption is generated only in the delay process due to the fact that the first capacitor is charged, so that the electronic equipment has the advantages of being small in occupied layout area and small in power consumption.
In a third aspect, the present application also provides an electronic device, including the power supply provided in the second aspect.
From the above, the application provides a delay turn-off control circuit, a power supply and electronic equipment, wherein, delay turn-off control circuit has realized that power delay turns off control for the power can turn off after standby delay again, if switch to operating condition again before turning off then need not to start the power on again, this delay turn-off control circuit simple structure just charges because of first electric capacity in the delay in-process and produces the consumption, has occupation territory area little, simple structure, advantage that the consumption is little.
Drawings
Fig. 1 is a schematic structural diagram of a delay turn-off control circuit according to an embodiment of the present application.
Fig. 2 is a schematic diagram of a power supply circuit.
Fig. 3 is a schematic diagram of a more preferred structure of the delayed turn-off control circuit according to the embodiment of the present application.
Reference numerals: 1. a power supply circuit; 2. an inverter circuit; 3. an RS flip-flop; 4. a first signal input terminal; 5. a second signal input terminal; m1, a first transistor; m2, a second transistor; m3, a third transistor; m4, a fourth transistor; ip, first current source; c1, a first capacitor; OUT, circuit output.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to be within the scope of the present application.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the present disclosure, components and arrangements of specific examples are described below. They are, of course, merely examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the application of other processes and/or the use of other materials.
1-3, some embodiments of the present application provide a delay turn-off control circuit for controlling a power supply to be turned off in a delay manner, where the delay turn-off control circuit includes:
a power supply circuit 1, an inverter circuit 2, an RS flip-flop 3, a first transistor M1, a second transistor M2, a first signal input terminal 4, a second signal input terminal 5, and a first capacitor C1;
the output end of the power supply circuit 1 is connected with the source electrode of the first transistor M1, the drain electrode of the first transistor M1 is connected with the drain electrode of the second transistor M2, the first signal input end 4 is connected with the grid electrode of the first transistor M1 and the grid electrode of the second transistor M2, the source electrode of the second transistor M2 is connected with the drain electrode of the second transistor M2 and the input end of the inverting circuit 2 through the first capacitor C1, the output end of the inverting circuit 2 is connected with the R end of the RS trigger 3, the second signal input end 5 is connected with the trigger end of the RS trigger 3, the S end of the RS trigger 3 is connected with VDD, the Q end of the RS trigger 3 is a circuit output end OUT, and the input signals of the first signal input end 4 and the second signal input end 5 are the same.
Specifically, the input signals of the first signal input end 4 and the second signal input end 5 are control signals of a delay turn-off circuit, and the delay turn-off control circuit in this embodiment of the present application is used for controlling the delay turn-off of a power supply, so that the control signals come from the power supply, may be load signals of the power supply, may also be turn-off signals of the power supply, may also be working signals of the power supply, may also be standby working signals of an electronic device with the power supply, may also be working signals of each module of the electronic device with the power supply, and in this embodiment of the present application, are preferably load signals of the power supply, that is, whether the delay turn-off function needs to be started or not is determined based on whether the power supply is connected with an operating load.
More specifically, the delay turn-off control circuit of the embodiment of the present application aims to implement a delay turn-off function when the input signal is switched from the operation state of the characterization power supply to the standby state of the characterization power supply, that is, to delay the output signal of the circuit output terminal OUT when the input signal is switched from the operation state of the characterization power supply to the standby state of the characterization power supply, regardless of the types of the input signals of the first signal input terminal 4 and the second signal input terminal 5.
More specifically, the circuit output terminal OUT is used for outputting an output signal with a high level or a low level to control the on-off state of the power supply, and may be connected with a logic circuit to control the on-off state of the power supply circuit, or connected with the output of the switching tube to control the power supply circuit, or connected with the input of the switching tube to control the power supply circuit.
More specifically, the power source is an internal power source in the corresponding electronic device, i.e. an internal voltage source and/or a current source for powering the respective working modules in the electronic device when the electronic device is in a working state.
More specifically, embodiments of the present application aim to provide a delayed shutdown control circuit capable of controlling delayed shutdown of a power supply, so as to simplify the structure of the existing delayed shutdown circuit and reduce power consumption; the working principle of the delay turn-off control circuit in the embodiment of the application is as follows: under the condition that the power supply works normally, the output signals of the first signal input end 4 and the second signal input end 5 are state one signals (which can be high level signals or low level signals), the state one signals enable the first transistor M1 to be turned off and the second transistor M2 to be turned on (the types of the first transistor M1 and the second transistor M2 are selected according to the types of the state one signals, for example, when the state one signals are high level signals, the first transistor M1 and the second transistor M2 are respectively a PMOS (P-channel metal oxide semiconductor) tube and an NMOS (N-channel metal oxide semiconductor) tube, otherwise, when the state one signals are low level signals, the first transistor M1 and the second transistor M2 are respectively an NMOS tube and a PMOS tube), the point B of the circuit in fig. 1 is grounded through the second transistor M2, so that the point B is in low level, the output end of the inverter circuit 2 with the input end connected with the point B is in high level, namely, the R end of the RS trigger 3 is connected with the high level, and meanwhile, the CP end of the RS trigger 3 is connected with the state one signal input end 5, otherwise, when the state one signal with the state one signal is in the state one signal is connected with the end of the second signal input end 3, the S trigger 3 is connected with the R end, the output end of the RS trigger 3 is connected with the high level signal, and the output end of the power supply is normally controlled to be in high level; when the power supply is standby, the output signals of the first signal input end 4 and the second signal input end 5 are switched from a state one signal to a state two signal (a signal opposite to the state one signal in level), the state two signal enables the first transistor M1 to be conducted and the second transistor M2 to be turned off, at the moment, one end of the point B is connected with the power supply circuit 1, the other end of the point B is connected with the first capacitor C1, so that the power supply circuit 1 charges the first capacitor C1, and the input end of the inverting circuit 2 is kept connected with a low level in the charging process, so that the output state of the RS trigger 3 is kept, and the power supply keeps the output state; after the first capacitor C1 is fully charged, the current at the point B normally flows to the inverting circuit 2, so that the output end of the inverting circuit 2 is turned to be low level, and then the R end of the RS trigger 3 is connected to be low level, so that the RS trigger 3 is turned to output a low level signal to control the power supply to be powered off, and the delay turn-off control function of the power supply is realized.
More specifically, during the charging process of the first capacitor C1, if the power supply is switched from the standby state to the working state again, the output signals of the first signal input terminal 4 and the second signal input terminal 5 are switched from the state two signals to the state one signal, so that the first transistor M1 is turned off again and the second transistor M2 is turned on again, so that the first transistor M1 cuts off the current input by the power supply circuit 1 towards the first capacitor C1, the grounded first capacitor C1 releases the unfilled current to the ground, so that the input terminal of the inverter circuit 2 keeps being connected to the low level, and the RS flip-flop 3 maintains the high level signal to enable the power supply to work normally without restarting from the power-off state.
More specifically, according to the above working principle, the delay time length of the delay turn-off control circuit in the embodiment of the present application depends on the charging time of the first capacitor C1, that is, the delay time length is determined by the capacitance of the first capacitor C1 and the current output by the power supply circuit 1, that is, the larger the capacitance of the first capacitor C1, the longer the delay time length, the larger the current output by the power supply circuit 1, and the shorter the delay time length; the delay turn-off control circuit can reduce the power consumption of the whole circuit and reduce the circuit layout area by arranging the small-current power supply circuit 1 and the first capacitor C1 with small capacitance.
The delay turn-off control circuit realizes the delay turn-off control of the power supply, so that the power supply can be turned off after standby delay, and the power supply does not need to be started again to be electrified if the power supply is switched to a working state again before the power supply is turned off.
In some preferred embodiments, the power supply circuit 1 is a current mirror circuit.
In particular, the input of the supply circuit 1 may be an additional current source, or may be a bias current source inside the power supply, i.e. a current source generating a bias current inside the power supply based chip circuit.
More specifically, in the embodiment of the present application, the power supply circuit 1 is configured as a current mirror circuit, and may obtain an image current based on the bias current source image, for charging the first capacitor C1 during the delay.
More specifically, the bias current source and the current mirror can form a series of current sources for outputting currents with different magnitudes, so that the internal circuit resources of the power supply are fully utilized, and the mirror currents with different magnitudes can be designed according to actual requirements.
More specifically, in the embodiment of the present application, the power supply circuit 1 preferably outputs the mirror current with the lowest level to charge the first capacitor C1, and the first capacitor C1 selects a capacitor with a suitable capacitance specification according to the delay time length and the magnitude of the mirror current, so as to meet the use requirements of low power consumption, small layout area and accurate delay.
More specifically, in some other embodiments, the first capacitor C1 may select a capacitor with a suitable capacitance specification according to a layout area requirement, and the mirror current output by the power supply circuit 1 is output in a mirror mode according to a delay time length, so as to meet the use requirement of low power consumption, small layout area and accurate delay, and dynamically change the magnitude of the bias current connected to the power supply circuit 1 according to the actually required delay time length, so as to realize real-time adjustment of the delay time length, so that the delay turn-off control circuit in the embodiment of the application has the characteristic of adjustable delay.
It should be noted that, the power supply circuit 1 in the embodiment of the present application supplies power based on the current source that generates the bias current inside the chip circuit of the power supply, and can be designed in the power supply circuit in an integrated manner, so that the integration level of the power supply circuit can be effectively improved.
In some preferred embodiments, the current mirror circuit includes a third transistor M3, a fourth transistor M4, and a first current source Ip;
the source of the third transistor M3 is connected to the source of the fourth transistor M4 and to the supply voltage, the gate of the third transistor M3 is connected to the gate of the fourth transistor M4 and the drain of the third transistor M3, the drain of the third transistor M3 is grounded via the first current source Ip, and the drain of the fourth transistor M4 is connected to the source of the first transistor M1.
Specifically, in the embodiment of the present application, the power supply voltage is preferably VDD.
More specifically, the first current source Ip is preferably a current source that generates a bias current inside the chip circuit of the above-described power supply.
More specifically, when the first transistor M1 is turned on, the current mirror circuit can output a mirror current associated with the first current source Ip from the drain of the fourth transistor M4, thereby charging the first capacitor C1.
More specifically, in this embodiment, the magnitude of the mirror current depends on the magnitude of the current of the first current source Ip, the width-to-length ratio of the third transistor M3, and the width-to-length ratio of the fourth transistor M4, so the delay turn-off control circuit in this embodiment of the present application can set the current of the first current source Ip, the width-to-length ratio of the third transistor M3, and the width-to-length ratio of the fourth transistor M4 to obtain the mirror current with the proper magnitude according to different usage requirements to charge the first capacitor C1.
In some preferred embodiments, as shown in fig. 2, the third transistor M3 and the fourth transistor M4 are PMOS transistors.
In some preferred embodiments, the inverting circuit 2 comprises an odd number of inverters connected in sequence.
Specifically, an odd number of inverters connected in sequence can output signals with opposite levels to the input end, so that the operation requirement of the working principle is met.
More specifically, due to the logic gate delay (logic path delay at the time of level up-pull, down-pull transition) characteristics, the sequential connection of a plurality of inverters can also produce a state delay effect.
In some preferred embodiments, the inverters are three.
Specifically, in the embodiment of the application, the three inverters are arranged to meet the inversion function of the inversion circuit 2, the state switching delay can be realized, and the layout area can be reduced as much as possible.
In some preferred embodiments, as shown in fig. 3, the first transistor M1 is a PMOS transistor and the second transistor M2 is an NMOS transistor.
Specifically, in the embodiment of the present application, when the power supply is in the working state, the output signals of the first signal input terminal 4 and the second signal input terminal 5 are preferably high-level signals, and when the power supply is in the standby state, the output signals of the first signal input terminal 4 and the second signal input terminal 5 are preferably low-level signals; in combination with the above working principle, the first transistor M1 is a PMOS transistor, and the second transistor M2 is an NMOS transistor.
In some preferred embodiments, the first signal input 4 is identical to the second signal input 5 and is a single-channel input or a multiple-input or gate.
Specifically, when the first signal input end 4 and the second signal input end 5 are single-channel input ends, the input signals are equal to the output signals, that is, the delay turn-off control circuit in the embodiment of the application directly performs power switch control according to the input signals of the first signal input end 4 and the second signal input end 5; the input signals of the first signal input 4 and the second signal input 5 represent the overall operating state of the power supply.
More specifically, the first signal input terminal 4 and the second signal input terminal 5 are multiple input terminals or gates, the input signals of which are output according to or gate logic operation based on multiple input signals, the multiple input signals respectively correspond to the working states of different modules of the power supply, and when any one or more modules are in the working states, the multiple input terminals or gates all output high-level signals, so that the delay turn-off control circuit keeps the output state.
More specifically, in the embodiment of the present application, the first signal input terminal 4 and the second signal input terminal 5 are preferably multiple-input or gates, and different input terminals of the multiple-input or gates may be connected to different modules in the power supply through PINs to monitor the working states of the corresponding modules, where, as shown in fig. 3, the first signal input terminal 4 and the second signal input terminal 5 are selected as a connection structure of two input or gates.
In a second aspect, some embodiments of the present application further provide a power supply, including the delayed turn-off control circuit provided in the first aspect.
In this embodiment, the first signal input end 4 and the second signal input end 5 of the delay turn-off control circuit are connected to the power circuit through a PIN to monitor the power working state, and the circuit output end OUT controls the power switch state through an on-off control structure such as a switch tube.
The power supply of the embodiment of the application belongs to an internal power supply of electronic equipment, realizes delay turn-off control by adopting a delay turn-off control circuit, can turn off after standby delay, does not need to start power on again if the power supply is switched to a working state again before turn-off, has a simple structure, only generates power consumption due to the charging of a first capacitor C1 in the delay process, and has the advantages of small occupied layout area and small power consumption.
In a third aspect, some embodiments of the present application further provide an electronic device, including the power supply provided in the second aspect.
In summary, the embodiment of the application provides a delay turn-off control circuit, a power supply and electronic equipment, wherein, delay turn-off control circuit has realized that power delay turns off control for the power can turn off after standby delay again, if switch to operating condition again before turning off then need not to start the power on again, this delay turn-off control circuit simple structure just charges because of first electric capacity C1 in the delay in-process and produces the consumption, has occupation territory area little, simple structure, advantage that the consumption is little.
In the description of the present specification, reference to the terms "one embodiment," "certain embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
What has been described above is merely some embodiments of the present invention. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit of the invention.

Claims (10)

1. A time delay shutdown control circuit for controlling a power supply to be turned off in a time delay, the time delay shutdown control circuit comprising:
the power supply circuit, the inverting circuit, the RS trigger, the first transistor, the second transistor, the first signal input end, the second signal input end and the first capacitor;
the output end of the power supply circuit is connected with the source electrode of a first transistor, the drain electrode of the first transistor is connected with the drain electrode of a second transistor, the first signal input end is connected with the grid electrode of the first transistor and the grid electrode of the second transistor, the source electrode of the second transistor is connected with the drain electrode of the second transistor and the input end of the inverting circuit through a first capacitor, the output end of the inverting circuit is connected with the R end of the RS trigger, the second signal input end is connected with the trigger end of the RS trigger, the S end of the RS trigger is connected with VDD, the Q end of the RS trigger is a circuit output end, and input signals of the first signal input end and the second signal input end are the same.
2. The time-delay shutdown control circuit of claim 1, wherein the power supply circuit is a current mirror circuit.
3. The delay turn-off control circuit of claim 2, wherein the current mirror circuit comprises a third transistor, a fourth transistor, and a first current source;
the source electrode of the third transistor is connected with the source electrode of the fourth transistor and is connected with the power supply voltage, the grid electrode of the third transistor is connected with the grid electrode of the fourth transistor and the drain electrode of the third transistor, the drain electrode of the third transistor is grounded through a first current source, and the drain electrode of the fourth transistor is connected with the source electrode of the first transistor.
4. The time delay shutdown control circuit of claim 3, wherein the third transistor and the fourth transistor are PMOS transistors.
5. The time delay shutdown control circuit of claim 1, wherein the inverter circuit comprises an odd number of inverters connected in sequence.
6. The time delay shutdown control circuit of claim 5, wherein the inverters are three.
7. The delay turn-off control circuit of claim 1, wherein the first transistor is a PMOS transistor and the second transistor is an NMOS transistor.
8. The time delay shutdown control circuit of claim 1, wherein the first signal input is identical to the second signal input in configuration and is a single channel input or a multiple input or gate.
9. A power supply comprising a time-delay shutdown control circuit as claimed in any one of claims 1 to 8.
10. An electronic device comprising the power supply of claim 9.
CN202310243000.3A 2023-03-14 2023-03-14 Delay turn-off control circuit, power supply and electronic equipment Pending CN116170000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310243000.3A CN116170000A (en) 2023-03-14 2023-03-14 Delay turn-off control circuit, power supply and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310243000.3A CN116170000A (en) 2023-03-14 2023-03-14 Delay turn-off control circuit, power supply and electronic equipment

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CN116170000A true CN116170000A (en) 2023-05-26

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