CN116168647A

CN116168647A - Pixel circuit, driving method thereof and display panel

Info

Publication number: CN116168647A
Application number: CN202211691076.4A
Authority: CN
Inventors: 鲁建军; 高利朋; 米磊
Original assignee: Yungu Guan Technology Co Ltd
Current assignee: Yungu Guan Technology Co Ltd
Priority date: 2022-12-27
Filing date: 2022-12-27
Publication date: 2023-05-26

Abstract

The invention discloses a pixel circuit, a driving method thereof and a display panel. The pixel circuit includes: the device comprises a data writing module, a driving module, a light emitting module and a biasing module; the data writing module is connected between the driving module and the data line and is used for writing the data voltage provided by the data line into the driving module in a data writing stage; the first end of the driving module is connected with the first power supply, the second end of the driving module is connected with the first end of the light-emitting module, the driving module is used for generating driving current according to the data voltage in the light-emitting stage, the second end of the light-emitting module is connected with the second power supply, and the light-emitting module is used for responding to the driving current to emit light; the first end of the bias module is connected with the bias signal line, and the second end of the bias module is at least connected with the second end of the driving module. The technical scheme of the embodiment of the invention improves the display effect of the display panel.

Description

Pixel circuit, driving method thereof and display panel

Technical Field

The present invention relates to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display panel.

Background

The organic light emitting diode display panel drives the organic light emitting diode to emit light through the pixel circuit, and specifically, the driving transistor in the pixel circuit generates driving current to drive the organic light emitting diode to emit light.

However, at different refresh frequencies of the display panel, the characteristics of the driving transistors are different, resulting in different display brightness after switching the refresh frequency and display brightness before switching the refresh frequency, and further resulting in poor display effect of the display panel.

Disclosure of Invention

The invention provides a pixel circuit, a driving method thereof and a display panel, so as to improve the display effect of the display panel.

According to an aspect of the present invention, there is provided a pixel circuit including: the device comprises a data writing module, a driving module, a light emitting module and a biasing module;

the data writing module is connected between the driving module and the data line and is used for writing the data voltage provided by the data line into the driving module in a data writing stage;

the first end of the driving module is connected with a first power supply, the second end of the driving module is connected with the first end of the light-emitting module, the driving module is used for generating driving current according to the data voltage in a light-emitting stage, the second end of the light-emitting module is connected with a second power supply, and the light-emitting module is used for responding to the driving current to emit light;

the first end of the bias module is connected with a bias signal line, the second end of the bias module is at least connected with the second end of the driving module, and the bias module is used for writing bias voltage provided by the bias signal line into the first end and the second end of the driving module after the data writing stage and before the light emitting stage.

Optionally, the bias module includes a first bias unit;

the control end of the first bias unit is connected with a first scanning signal line, the first end of the first bias unit is connected with the bias signal line, and the second end of the first bias unit is connected with the second end of the driving module.

Optionally, one driving period of the pixel circuit includes a data writing frame and a data holding frame; the data writing frame comprises a data writing stage and a first light emitting sub-stage, and the data holding frame comprises a second light emitting sub-stage;

the first bias unit is used for writing a first bias voltage provided by the bias signal line into a first end and a second end of the driving module after the data writing stage and before the first light-emitting sub-stage; writing a second bias voltage provided by the bias signal line into the first end and the second end of the driving module before a second light emitting sub-stage of the data holding frame;

preferably, the second bias voltage is greater than the first bias voltage.

Optionally, the bias module includes a first bias unit and a second bias unit; the bias signal line comprises a first bias sub-signal line and a second bias sub-signal line;

The control end of the first bias unit is connected with a first scanning signal line, the first end of the first bias unit is connected with the first bias sub-signal line, and the second end of the first bias unit is connected with the first end of the driving module;

the control end of the second bias unit is connected with a second scanning signal line, the first end of the second bias unit is connected with the second bias sub-signal line, and the second end of the second bias unit is connected with the second end of the driving module.

the first bias unit is used for writing a first bias voltage provided by the first bias sub-signal line into the first end of the driving module after the data writing stage and before the first light-emitting sub-stage; writing a second bias voltage provided by the first bias sub-signal line into the first end of the driving module before a second light-emitting sub-phase of the data-holding frame;

the second bias unit is used for writing a third bias voltage provided by the second bias sub-signal line into the second end of the driving module after the data writing stage and before the first light-emitting sub-stage; writing a fourth bias voltage provided by the second bias sub-signal line into the second end of the driving module before the second light-emitting sub-phase of the data holding frame;

Preferably, the second bias voltage is greater than the first bias voltage; and/or, the fourth bias voltage is greater than the third bias voltage.

Optionally, the pixel circuit further includes: the device comprises a storage module, a threshold compensation module, a first initialization module, a first light-emitting control module and a second light-emitting control module;

the control end of the data writing module is connected with a third scanning signal line, the first end of the data writing module is connected with the data line, and the second end of the data writing module is connected with the first end of the driving module;

the storage module is connected between the first power supply and the control end of the driving module and is used for storing the data voltage;

the first end of the driving module is connected with a first power supply through the first light-emitting control module, the second end of the driving module is connected with the light-emitting module through the second light-emitting control module, the control end of the first light-emitting control module is connected with a first light-emitting control signal line, and the control end of the second light-emitting control module is connected with a second light-emitting control signal line; the first light-emitting control module and the second light-emitting control module are used for controlling whether the driving current generated by the driving module is transmitted to the light-emitting module or not;

The threshold compensation module is connected between the second end of the driving module and the control end of the driving module, the control end of the threshold compensation module is connected with a fourth scanning signal line, and the threshold compensation module is used for carrying out threshold compensation on the driving module in a threshold compensation stage;

the control end of the first initialization module is connected with a fifth scanning signal line, the first initialization module is connected between a first reference signal line and a first end of the light emitting module, and the first initialization module is used for writing a first reference voltage provided by the first reference signal line into the first end of the light emitting module and writing the first reference voltage into the driving module through the second light emitting control module and the threshold compensation module in a first initialization sub-stage of a data writing frame; writing a second reference voltage provided by the first reference signal line into the first end of the light emitting module in a second initialization sub-stage of the data holding frame;

preferably, the second reference voltage is greater than the first reference voltage.

Optionally, the pixel circuit further includes: a second initialization module;

the control end of the second initialization module is connected with a sixth scanning signal line, the second initialization module is connected between a second reference signal line and the second end of the driving module, and the second initialization module is used for writing a third reference voltage provided by the second reference signal line into the second end and the control end of the driving module in the first initialization sub-stage.

Optionally, when the data voltages are different, bias voltages provided by the bias signal lines are different;

preferably, the larger the data voltage, the larger the bias voltage.

According to another aspect of the present invention, there is provided a driving method of a pixel circuit including: the device comprises a data writing module, a driving module, a light emitting module and a biasing module; the data writing module is connected between the driving module and the data line; the first end of the driving module is connected with a first power supply, the second end of the driving module is connected with the first end of the light-emitting module, and the second end of the light-emitting module is connected with a second power supply; the first end of the bias module is connected with a bias signal line, and the second end of the bias module is at least connected with the second end of the driving module;

the driving method includes:

in a data writing stage, the data writing module writes the data voltage provided by the data line into the driving module;

in a bias stage, the bias module writes bias voltage provided by the bias signal line into a first end and a second end of the driving module;

in the light emitting stage, the driving module generates driving current according to the data voltage, and the light emitting module emits light in response to the driving current.

According to another aspect of the present invention, there is provided a display panel including the pixel circuit according to any embodiment of the present invention.

According to the technical scheme, after a data writing stage and before a light emitting stage, a bias module writes bias voltages provided by bias signals into a first end and a second end of a driving module, resets the first end and the second end of the driving module, and changes the pressure difference between the first end of the driving module and a control end of the driving module, so that the bias state of the driving module is adjusted, and the characteristics of the driving module are improved; the first end of the driving module has the same potential under different refresh frequencies, so that the bias state of the driving module before generating the driving current is the same under different refresh frequencies, the driving current generated by the driving module tends to be consistent, and the display brightness tends to be consistent before and after the refresh frequencies are switched. The brightness change caused by the switching refresh frequency is reduced by ensuring that the display brightness tends to be consistent before and after the switching refresh frequency, and the display effect of the display panel is improved.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of a pixel circuit according to another embodiment of the present invention;

FIG. 3 is a schematic diagram of a pixel circuit according to another embodiment of the present invention;

FIG. 4 is a schematic diagram of a pixel circuit according to another embodiment of the present invention;

FIG. 5 is a timing diagram of a pixel circuit according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a pixel circuit according to another embodiment of the present invention;

FIG. 7 is a timing diagram of yet another pixel circuit according to an embodiment of the invention;

fig. 8 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention;

fig. 9 is a schematic structural diagram of a display panel according to an embodiment of the invention.

Detailed Description

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

As mentioned in the background art, the existing display panel has a problem that the display brightness after the refresh frequency is switched is different from the display brightness before the refresh frequency is switched, so that the display effect is poor, and the applicant has found through careful study that the reason for generating the technical problem is that: the light emitting diode emits light according to the driving current generated by the driving transistor, but the potential holding time of the control electrode of the driving transistor is different at different refresh frequencies of the display panel; when the refresh frequency is high, the potential holding time of the control electrode of the driving transistor is short, so that the gate-source voltage difference holding time of the driving transistor is short, namely, the time that the driving transistor works in a forward bias state is short, and small threshold deviation can be caused; when the refresh frequency is small, the potential of the control electrode of the driving transistor is kept for a long time, and when the driving transistor works in a forward bias state for a long time, a large threshold shift is caused, that is, the threshold shift states of the driving transistor are different at different refresh frequencies, so that the characteristics of the driving transistor are different. Therefore, under different refresh frequencies of the display panel, the characteristics of the driving transistors are different, resulting in different display brightness after switching the refresh frequency and display brightness before switching the refresh frequency, and further resulting in poor display effect of the display panel.

Aiming at the technical problems, the embodiment of the invention provides a pixel circuit. Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, and referring to fig. 1, the pixel circuit according to the embodiment of the present invention includes: a data writing module 101, a driving module 102, a light emitting module 103, and a bias module 104; the Data writing module 101 is connected between the driving module 102 and the Data line Data, and the Data writing module 101 is used for writing the Data voltage provided by the Data line Data into the driving module 102 in a Data writing stage; the first end of the driving module 102 is connected with a first power supply VDD, the second end of the driving module 102 is connected with the first end of the light emitting module 103, the driving module 102 is used for generating driving current according to data voltage in a light emitting stage, the second end of the light emitting module 103 is connected with a second power supply VSS, and the light emitting module 103 is used for responding to the driving current to emit light; the first end of the bias module 104 is connected to the bias signal line V1, the second end of the bias module 104 is connected to at least the second end of the driving module 102, and the bias module 104 is configured to write the bias voltage provided by the bias signal line V1 into the first end and the second end of the driving module 102 after the data writing stage and before the light emitting stage.

The Data line Data may provide a Data voltage, and the Data writing module 101 writes the Data voltage to the driving module 102. The bias signal line V1 may provide a bias voltage, and the bias module 104 may write the bias voltage to the first and second terminals of the driving module 102, and reset the first and second terminals of the driving module 102. The first power supply VDD may provide a first power supply voltage, the driving module 102 generates a driving current according to the data voltage and the first power supply voltage, the light emitting module 103 is, for example, an organic light emitting diode, and the light emitting module 103 emits light in response to the driving current, thereby displaying a target display luminance. The working process of the pixel circuit provided by the embodiment of the invention can comprise a data writing stage, a biasing stage and a light emitting stage.

Specifically, in the Data writing stage, the Data writing module 101 is turned on, and the Data writing module 101 writes the Data voltage supplied from the Data line Data into the driving module 102.

In the bias stage, the bias module 104 is turned on, the bias module 104 writes the bias voltage provided by the bias signal line V1 into the first end and the second end of the driving module 102, resets the first end and the second end of the driving module 102, changes the pressure difference between the first end and the control end of the driving module 102, adjusts the ion polarization degree inside the driving module 102, further adjusts the bias state of the driving module 102, and improves the characteristics of the driving module 102. Before the driving module 102 generates the driving current, the electric potential of the first end of the driving module 102 is the same under different refresh frequencies, so that the bias state of the driving module 102 before the driving current is generated is the same under different refresh frequencies, the driving current generated by the driving module tends to be consistent, and the display brightness tends to be consistent before and after the refresh frequencies are switched.

In the light emitting stage, the driving module 102 generates a driving current according to the first power voltage and the data voltage, and the light emitting module 103 emits light in response to the driving current. Because the first end and the second end of the driving module 102 are reset before the driving module 102 generates the driving current, the driving module 102 can generate the driving current better by adjusting the bias state of the driving module 102, and the light emitting module 103 can display the target display brightness better.

It should be noted that, the bias module 104 may be connected to the second terminal of the driving module 102, because after writing the data voltage to the driving module 102, the driving module 102 is turned on, and when the bias module 104 writes the bias voltage to the second terminal of the driving module 102, the first terminal and the second terminal of the driving module 102 may be written, and the first terminal and the second terminal of the driving module 102 are reset. The bias module 104 may also be connected to the first end and the second end of the driving module 102, respectively, and different bias voltages may be written into the first end and the second end of the driving module 102 according to the bias state that the driving module 102 needs to reach. Fig. 1 illustrates the case where the bias module 104 is connected to the second end of the driving module 102, but is not limited thereto.

On the basis of the technical scheme, optionally, when the data voltages are different, the bias voltages provided by the bias signal lines are different; preferably, the larger the data voltage, the larger the bias voltage.

Specifically, when the data voltages are different, the voltages at the control ends of the driving module 102 are different, the voltage difference between the control ends of the driving module 102 and the first ends of the driving module is different, and by setting different bias voltages, the characteristic change of the driving module 102 caused by the different voltage differences is compensated, so that after the bias voltages are written, the bias states of the driving module 102 are kept consistent. For example, when the data voltage is larger, the voltage difference between the control end and the second end of the driving module 102 is larger, a larger bias voltage can be written into the second end of the driving module 102, so as to reduce the voltage difference between the control end and the second end of the driving module 102 and compensate the characteristic change of the driving module 102 caused by the larger voltage difference. Similarly, when the data voltage is smaller, the voltage difference between the control end and the second end of the driving module 102 is smaller, the smaller bias voltage can be written into the second end of the driving module 102, the voltage difference between the control end and the second end of the driving module 102 is increased, and the characteristic change of the driving module 102 caused by the smaller voltage difference is compensated, so that the bias state of the driving module 102 is kept consistent after the bias voltage is written. When the target display brightness of the light emitting module 103 is different, the data voltages are different, and by setting different bias voltages, the characteristics of the driving module 102 are better improved under different target display brightness, so that the display effect of the display panel is improved.

Based on the above technical solution, the bias module 104 may include a bias unit, where a bias unit is connected to the second end of the driving module 102; the biasing module 104 may also include two biasing units coupled to the first and second ends of the drive module 102, respectively. The specific structure of bias module 104 is described below, but is not limiting to the application.

In one implementation, fig. 2 is a schematic structural diagram of still another pixel circuit according to an embodiment of the present invention, optionally, referring to fig. 2, the bias module 104 includes a first bias unit 1041; the control end of the first bias unit 1041 is connected to the first scan signal line S1, the first end of the first bias unit 1041 is connected to the bias signal line V1, and the second end of the first bias unit 1041 is connected to the second end of the driving module 102.

Specifically, the second end of the first bias unit 1041 is connected to the second end of the driving module 102, and when the first scan signal provided by the first scan signal line S1 controls the first bias unit 1041 to be turned on, the bias module 104 may write bias voltages into the second end and the first end of the driving module 102, reset the first end and the second end of the driving module 102, change the voltage difference between the first end and the control end of the driving module 102, and adjust the bias state of the driving module 102.

Optionally, one driving period of the pixel circuit provided by the embodiment of the invention includes a data writing frame and a data holding frame; the data writing frame comprises a data writing stage and a first light emitting sub-stage, and the data holding frame comprises a second light emitting sub-stage; the first bias unit 1041 is configured to write a first bias voltage provided by a bias signal line into the first end and the second end of the driving module 102 after the data writing phase and before the first light emitting sub-phase; and writing a second bias voltage provided by the bias signal line V1 into the first and second terminals of the driving module 102 before the second light emitting sub-stage of the data holding frame; preferably, the second bias voltage is greater than the first bias voltage.

Specifically, after the data writing stage of the data writing frame and before the first light emitting sub-stage, the first bias voltage provided by the bias signal line V1 is written into the first end and the second end of the driving module 102, and the first end and the second end of the driving module 102 are reset to adjust the bias state of the driving module 102; before the second light-emitting sub-stage of the data holding frame, the second bias voltage provided by the bias signal line V1 is written into the first end and the second end of the driving module 102, the first end and the second end of the driving module 102 are reset, and the bias state of the driving module 102 is adjusted, so that the bias state of the driving module 102 in the data writing frame is consistent with the bias state of the data holding frame, the driving current generated by the driving module 102 in the data writing frame and the data holding frame is prevented from having larger phase difference, the light-emitting brightness of the light-emitting module 103 in the data writing frame and the data holding frame is ensured to be consistent, and the jump of the display brightness is prevented.

For example, the time of the data holding frame is generally longer, the control terminal potential of the driving module 102 is greatly changed due to longer leakage time, and by setting the second bias voltage corresponding to the data holding frame to be greater than the first bias voltage corresponding to the data writing frame, the bias state of the driving module 102 in the data holding frame can be better improved, and the bias state of the driving module 102 in the data writing frame and the data holding frame is ensured to be consistent.

In another implementation, fig. 3 is a schematic structural diagram of still another pixel circuit according to an embodiment of the present invention, optionally, referring to fig. 3, the bias module 104 includes a first bias unit 1041 and a second bias unit 1042; the bias signal line V1 includes a first bias sub-signal line V11 and a second bias sub-signal line V12; the control end of the first bias unit 1041 is connected with the first scanning signal line S1, the first end of the first bias unit 1041 is connected with the first bias sub-signal line V11, and the second end of the first bias unit 1041 is connected with the first end of the driving module 102; the control end of the second bias unit 1042 is connected to the second scan signal line S2, the first end of the second bias unit 1042 is connected to the second bias sub-signal line V12, and the second end of the second bias unit 1042 is connected to the second end of the driving module 102.

Specifically, by providing the first bias unit 1041 and the second bias unit 1042, the bias voltage is written to the first end of the driving module 102 by the first bias unit 1041, the bias voltage is written to the second end of the driving module 102 by the second bias unit 1042, the bias voltages written to the first end and the second end of the driving module 102 may be the same or different, and the bias voltages written to the first bias unit 1041 and the second bias unit 1042 may be set according to the driving module 102 needs to reach the bias state. For example, the bias voltage of the first bias unit 1041 written into the first end of the driving module 102 is greater than the bias voltage of the second bias unit 1042 written into the second end of the driving module 102, so that the bias current between the first end and the second end of the driving module 102 is increased, and the degree of ion polarization inside the driving module 102 is better adjusted, so that the bias state of the driving module 102 can be better improved.

Optionally, one driving period of the pixel circuit provided by the embodiment of the invention includes a data writing frame and a data holding frame; the data writing frame comprises a data writing stage and a first light emitting sub-stage, and the data holding frame comprises a second light emitting sub-stage; the first bias unit 1041 is configured to write the first bias voltage provided by the first bias sub-signal line V11 to the first end of the driving module 102 after the data writing phase and before the first light emitting sub-phase; writing a second bias voltage provided by the first bias sub-signal line V11 into the first end of the driving module before the second light-emitting sub-stage of the data holding frame; the second bias unit is configured to write the third bias voltage provided by the second bias sub-signal line V12 to the second end of the driving module 102 after the data writing phase and before the first light emitting sub-phase; and writing the fourth bias voltage provided by the second bias sub-signal line V12 to the second terminal of the driving module 102 before the second light-emitting sub-stage of the data-holding frame; preferably, the second bias voltage is greater than the first bias voltage; and/or the fourth bias voltage is greater than the third bias voltage.

Specifically, the first bias unit 1041 writes the first bias voltage provided by the first bias sub-signal line V11 to the first end of the driving module 102 after the data writing phase and before the first light emitting sub-phase of the data writing frame, and the second bias unit 1042 writes the second bias voltage provided by the second bias sub-signal V12 to the second end of the driving module 102, so as to reset the first end and the second end of the driving module 102 and change the bias state of the driving module 102; before the second lighting sub-stage of the data holding frame, the first bias unit 1041 writes the third bias voltage provided by the first bias sub-signal line V11 into the first end of the driving module 102, the second bias unit 1042 writes the fourth bias voltage provided by the second bias sub-signal V12 into the second end of the driving module 102, resets the first end and the second end of the driving module 102, changes the voltage difference between the first end and the control end of the driving module 102, adjusts the bias state of the driving module 102, and enables the bias state of the driving module 102 in the data writing frame to be consistent with the bias state of the data holding frame, thereby avoiding that the driving current generated by the driving module 102 in the data writing frame and the data holding frame is greatly different, ensuring that the lighting brightness of the lighting module 103 in the data writing frame and the data holding frame tends to be consistent, and avoiding display brightness jump.

The first bias unit 1041 and the second bias unit 1042 may write bias voltages to the driving module 102 at the same time, or may write bias voltages to the driving module 102 in a time-sharing manner, for example, the first bias unit 1041 writes a first bias voltage to a first end of the driving module 102, and the second bias unit 1042 writes a second bias voltage to a second end of the driving module 102.

By setting the second bias voltage corresponding to the data holding frame to be greater than the first bias voltage corresponding to the data writing frame, the fourth bias voltage corresponding to the data holding frame is greater than the third bias voltage corresponding to the data writing frame, the bias state of the driving module 102 in the data holding frame can be better improved, the bias state of the driving module 102 in the data writing frame and the bias state of the data holding frame are guaranteed to be consistent, and accordingly the driving current phase difference generated by the driving module 102 in the data writing frame and the data holding frame is prevented from being larger, the light emitting brightness of the light emitting module 103 in the data writing frame and the data holding frame is guaranteed to be consistent, and jump of display brightness is prevented.

On the basis of the above aspects, optionally, referring to fig. 2 or fig. 3, the pixel circuit further includes: a storage module 105, a threshold compensation module 106, a first initialization module 107, a first light emission control module 108, and a second light emission control module 109; the control end of the data writing module 101 is connected with the third scanning signal line S3, the first end of the data writing module 101 is connected with the data line, and the second end of the data writing module 101 is connected with the first end of the driving module 102; the storage module 105 is connected between the first power supply and the control end of the driving module, and the storage module 105 is used for storing data voltages; the first end of the driving module 102 is connected with a first power supply VDD through a first light-emitting control module 108, the second end of the driving module 102 is connected with the light-emitting module 103 through a second light-emitting control module 109, the control end of the first light-emitting control module 108 is connected with a first light-emitting control signal line EM1, and the control end of the second light-emitting control module 109 is connected with a second light-emitting control signal line EM2; the first light emitting control module 108 and the second light emitting control module 109 are used for controlling whether the driving current generated by the driving module 102 is transmitted to the light emitting module 103; the threshold compensation module 106 is connected between the second end of the driving module 102 and the control end of the driving module 102, the control end of the threshold compensation module 106 is connected with the fourth scanning signal line S4, and the threshold compensation module 106 is configured to perform threshold compensation on the driving module 102 in a threshold compensation stage; the control end of the first initialization module 107 is connected to the fifth scan signal line S5, the first initialization module 107 is connected between the first reference signal line Vref1 and the first end of the light emitting module 103, and the first initialization module 107 is configured to write a first reference voltage provided by the first reference signal line Vref1 into the first end of the light emitting module 103 and write the first reference voltage into the driving module 102 through the second light emission control module 109 and the threshold compensation module 106 in a first initialization sub-stage of the data writing frame; writing a second reference voltage provided by the first reference signal line Vref1 into the first end of the light emitting module 103 at a second initialization sub-stage of the data holding frame; preferably, the second reference voltage is greater than the first reference voltage.

Specifically, the storage module 105 can store the data voltage, maintain the potential of the control terminal of the driving module 102, avoid the larger potential variation of the control terminal of the driving module 102, and avoid the larger variation of the driving current generated by the driving module 102. The threshold compensation module 106 can perform threshold compensation on the driving module 102, so that the voltage after threshold compensation is written into the control end of the driving module 102, and the driving current change caused by the threshold voltage change of the driving module 102 is avoided, which is beneficial to the better display brightness of the display target of the light emitting module 103. The first initialization module 107, in a first initialization sub-stage of the data writing frame, writes a first reference voltage provided by the first reference signal line Vref1 into a first end of the light emitting module 103, and writes the first reference voltage into a second end and a control end of the driving module 102 through the second light emitting control module 109 and the threshold compensation module 106, initializes the light emitting module 103 and the driving module 102, and clears the residual charges of the previous frame. The first initializing module 107 writes the second reference voltage provided by the first reference signal line Vref1 into the first end of the light emitting module 103 in the second initializing sub-stage of the data holding frame, initializes the light emitting module 103, and clears the residual charge of the previous frame, so that the light emitting module 103 can better display the target display brightness.

The data holding frame has a longer time, the driving module 102 maintains the potential of the control terminal thereof for a longer time, and the control terminal of the driving module 102 generates a leakage current for a longer time, which easily results in a larger potential change of the control terminal of the driving module 102. By setting the second reference voltage corresponding to the data holding frame to be greater than the first reference voltage corresponding to the data writing frame, the initialization degree of the light emitting module 103 and the driving module 102 is lower than that of the data writing frame in the second initialization sub-stage of the data holding frame, so that the potential change of the driving module 102 in the data holding frame is compensated, the driving currents generated by the driving module 102 in the data holding frame and the data writing frame tend to be consistent, and the light emitting brightness of the light emitting module 103 in the data holding frame and the data writing frame is kept consistent, so that jump of display brightness is avoided.

The pixel circuit includes a data writing frame and a data holding frame, wherein the data writing frame includes a first initialization sub-stage, a data writing stage, a threshold compensation stage, a first bias sub-stage and a first light emitting sub-stage; the data-holding frame includes a second initialization sub-stage, a second bias sub-stage, and a second light-emitting sub-stage.

Specifically, in the first initialization sub-stage, the fifth scan signal provided by the fifth scan signal line S5 controls the first initialization module 107 to be turned on, the fourth scan signal provided by the fourth scan signal line S4 controls the threshold compensation module 106 to be turned on, the second light emission control signal line EM2 controls the second light emission control module 109 to be turned on, the first initialization module 107 writes the first reference voltage provided by the first reference signal line Vref1 into the first end of the light emitting module 103, and writes the first reference voltage into the second end and the control end of the driving module 102 through the second light emission control module 109 and the threshold compensation module 106, and initializes the light emitting module 103 and the driving module 102.

In the Data writing stage, the second scanning signal provided by the second scanning signal line S2 controls the Data writing module 101 to be turned on, the fourth scanning signal provided by the fourth scanning signal line S4 controls the threshold compensation module 106 to be turned on, and the Data writing module 101 writes the Data voltage Vdata provided by the Data line Data into the control end of the driving module 102 through the threshold compensation module 106; at the same time, the threshold compensation module 106 performs preliminary threshold compensation for the driving module 102.

In the threshold compensation stage, the fourth scan signal provided by the fourth scan signal line S4 controls the threshold compensation module 106 to be turned on, and the threshold compensation module 106 continues to perform threshold compensation on the driving module 102 until the potential at the control end of the driving module 102 is vdata+vth, where Vth is the threshold voltage of the driving module 102.

In the first bias sub-stage, the bias module 104 is turned on, the bias module 104 writes bias voltages into the first end and the second end of the driving module 102, resets the first end and the second end of the driving module 102, and changes the pressure difference between the first end and the control end of the driving module 102, so as to adjust the bias state of the driving module 102, so that the bias state of the driving module 102 before generating driving current is kept consistent under different refresh frequencies, the driving current generated by the driving module 102 is consistent, and the display brightness before and after switching the refresh frequencies is ensured to be consistent.

In the first light emitting sub-phase, the first light emitting control signal line EM1 controls the first light emitting control module 108 to be turned on, the second light emitting control signal line EM2 controls the second light emitting control module 109 to be turned on, the driving module 102 generates a driving current according to the threshold-compensated data voltage and the first power voltage provided by the first power supply VDD, and the light emitting module 103 emits light in response to the driving current.

In the second initialization sub-stage, the fifth scan signal provided by the fifth scan signal line S5 controls the first initialization module 107 to be turned on, and the first initialization module 107 writes the second reference voltage provided by the second reference signal line Vref2 into the first end of the light emitting module 103 to initialize the light emitting module 103.

In the second bias sub-stage, the bias module 104 is turned on, the bias module 104 writes bias voltages into the first end and the second end of the driving module 102, resets the first end and the second end of the driving module 102, and changes the pressure difference between the first end and the control end of the driving module 102, so as to adjust the bias state of the driving module 102, so that the bias state of the driving module 102 before generating driving current is kept consistent under different refresh frequencies, the driving current generated by the driving module 102 is consistent, and the display brightness before and after switching the refresh frequencies is ensured to be consistent. And by changing the bias state of the driving module 102, the bias states of the driving modules 102 of the data writing frame and the data writing frame are kept consistent, so that the driving current generated by the driving module 102 in the data writing frame and the data writing frame is prevented from being larger in phase difference, the light-emitting brightness of the light-emitting module 103 in the data writing frame and the data writing frame is ensured to be consistent, and the jump of the display brightness is prevented.

In the second light emitting sub-stage, the first light emitting control signal line EM1 controls the first light emitting control module 108 to be turned on, the second light emitting control signal line EM2 controls the second light emitting control module 109 to be turned on, the driving module 102 generates a driving current according to the threshold-compensated data voltage and the first power voltage provided by the first power supply VDD, and the light emitting module 103 emits light in response to the driving current.

It should be noted that, in some embodiments, the second bias sub-stage may be between the second initialization sub-stage and the second light emitting sub-stage; in other embodiments, the second bias sub-stage may be performed concurrently with the second initialization sub-stage.

Optionally, with continued reference to fig. 2, the pixel circuit further includes: a second initialization module 110; the control end of the second initialization module 110 is connected to the sixth scan signal line S6, the second initialization module 110 is connected between the second reference signal line Vref2 and the second end of the driving module 102, and the second initialization module 110 is configured to write the third reference voltage provided by the second reference signal line Vref2 into the second end and the control end of the driving module 102 during the first initialization sub-stage.

Specifically, by providing the second initializing module 110, in the first initializing sub-stage, the second initializing module 110 writes the third reference voltage provided by the second reference signal line Vref2 into the control terminal and the second terminal of the driving module 102, so as to initialize the driving module 102, without initializing the driving module 102 by using the first initializing module 107, the first initializing module 107 only needs to initialize the light emitting module 103. The second initializing module 110 initializes the driving module 102, and the first initializing module 107 initializes the light emitting module 103, so that different reference voltages can be written into the driving module 102 and the light emitting module 103, and the driving module 102 and the light emitting module 103 are respectively initialized according to requirements.

In addition, referring to fig. 2 and 3, when the control end of the driving module 102 leaks electricity, only the threshold compensation module 106 leaks electricity, that is, only one leakage path exists, so that the leakage current of the driving module 102 can be reduced, the stability of the control end potential of the driving module 102 is further ensured, the change of the driving current generated by the driving module 102 is reduced, the display brightness of the light emitting module 102 can be better displayed, and the display effect of the display panel is improved.

As a further implementation manner of the present embodiment, the specific circuit configuration of the pixel circuit is further described below in addition to the above technical aspects, but is not limited to the present application.

In one implementation, fig. 4 is a schematic structural diagram of a further pixel circuit according to an embodiment of the present invention, optionally, referring to fig. 4, fig. 4 is a specific circuit structure corresponding to fig. 2, the data writing module 101 includes a first transistor T1, the driving module 102 includes a second transistor T2, the threshold compensation module 106 includes a third transistor T3, the first light emitting control module 108 includes a fourth transistor T4, the second light emitting control module 109 includes a fifth transistor T5, the first initialization module 107 includes a sixth transistor T6, the second initialization module 110 includes a seventh transistor T7, the first bias unit 1041 includes an eighth transistor T8, the storage module 105 includes a first capacitor C1, and the light emitting module 103 includes a light emitting diode D1; the control electrode of the first transistor T1 is connected with the third scanning signal line S3, and the first transistor T1 is connected between the second transistor T2 and the Data line Data; the first capacitor C1 is connected between the first power supply VDD and the control electrode of the second transistor T2; the first pole of the second transistor T2 is connected with the first power supply VDD through the fourth transistor T4, the second pole of the second transistor T2 is connected with the first pole of the light emitting diode D1 through the fifth transistor T5, and the second pole of the light emitting diode D1 is connected with the second power supply VSS; the control electrode of the third transistor T3 is connected with the fourth scanning signal line S4, and the third transistor T3 is connected between the second electrode of the second transistor T2 and the control electrode of the second transistor T2; a control electrode of the fourth transistor T4 is connected with the first light-emitting control signal line EM1, and a control electrode of the fifth transistor T5 is connected with the second light-emitting control signal EM2; a control electrode of the sixth transistor T6 is connected to the fifth scan signal line S5, and the sixth transistor T6 is connected between the first reference signal line Vref1 and the first electrode of the light emitting diode D1; a control electrode of the seventh transistor T7 is connected to the sixth scan signal line S6, and the seventh transistor T7 is connected between the second reference signal line Vref2 and the second electrode of the second transistor T2; the control electrode of the eighth transistor T8 is connected to the first scan signal line S1, the first electrode of the eighth transistor T8 is connected to the bias signal line V1, and the second electrode of the eighth transistor T8 is connected to the second electrode of the second transistor T2. The third transistor T3 is, for example, a low-temperature poly-oxide transistor, which can reduce leakage current and is beneficial to prolonging the potential maintaining time of the control end of the driving module 102; the remaining transistors may be low-temperature polysilicon transistors or low-temperature polysilicon oxide transistors, and fig. 4 illustrates only the case where the third transistor T3 is a low-temperature polysilicon oxide transistor and the remaining transistors are low-temperature polysilicon transistors, but the present invention is not limited thereto.

Fig. 5 is a timing chart of a pixel circuit according to an embodiment of the present invention, and the driving process of the pixel circuit is described below with reference to fig. 4 and 5, but is not limited thereto.

Specifically, in the first initialization sub-stage T11 of the data writing frame T1, the sixth Scan signal Scan6 supplied from the sixth Scan signal line S6 is at a low level, the seventh transistor T7 is turned on, the fourth Scan signal Scan4 supplied from the fourth Scan signal line S4 is at a high level, the third transistor T3 is turned on, the seventh transistor T7 writes the third reference voltage Vr3 supplied from the second reference signal line Vref2 into the gate of the second transistor T2 through the third transistor T3, and the second transistor T2 is initialized.

In the data writing stage T12 of the data writing frame T1, the third Scan signal Scan3 provided by the third Scan signal line S3 is at a low level, the first transistor T1 is turned on, the fourth Scan signal Scan4 provided by the fourth Scan signal line S4 is at a high level, and the third transistor T3 is turned on. The first transistor T1 writes the Data voltage Vdata supplied from the Data line Data into the second transistor T2, and at the same time, the third transistor T3 performs threshold compensation on the second transistor T2.

In the threshold compensation stage T13 of the data writing frame T1, the fourth Scan signal Scan4 provided by the fourth Scan signal line S4 is at a high level, the third transistor T3 is turned on, and the third transistor T3 continues to perform threshold compensation on the second transistor T2 until the voltage of the control electrode of the second transistor T2 is vdata+vth, that is, the data voltage after threshold compensation is written into the second transistor T2.

In the first bias sub-stage T14 of the data writing frame T1, the fifth Scan signal Scan5 provided by the fifth Scan signal line S5 is at a low level, the sixth transistor T6 is turned on, the first Scan signal Scan1 provided by the first Scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The sixth transistor T6 writes the first reference voltage Vr1 supplied from the first reference signal line Vref1 to the first pole of the light emitting diode D1, and initializes the light emitting diode D1. The eighth transistor T8 writes the first bias voltage VEH1 provided by the bias signal line V1 into the first pole and the second pole of the second transistor T2, resets the first pole and the second pole of the second transistor T2, changes the voltage difference between the first pole and the control pole of the second transistor T2, and changes the voltage difference between the second pole and the control pole of the second transistor T2, thereby changing the bias state of the second transistor T2, so that the bias state of the second transistor T2 before generating the driving current is kept consistent under different refresh frequencies, so that the driving current generated by the second transistor T2 tends to be consistent, and further, display brightness tends to be consistent before and after switching the refresh frequency is ensured.

In the first light emitting sub-stage T15 of the data writing frame T1, the first light emitting control signal E1 provided by the first light emitting control signal line EM1 is at a low level, the second light emitting control signal E2 provided by the second light emitting control signal line EM2 is at a low level, the fourth transistor T4 and the fifth transistor T5 are turned on, the second transistor T2 generates a driving current according to the threshold-compensated data voltage and the first power voltage provided by the first power supply VDD, and the light emitting diode D1 emits light in response to the driving current.

In the second bias sub-stage T21 (second initialization sub-stage) of the data holding frame T2, the fifth Scan signal Scan5 supplied from the fifth Scan signal line S5 is at a low level, the sixth transistor T6 is turned on, the first Scan signal Scan1 supplied from the first Scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The sixth transistor T6 writes the second reference voltage Vr2 supplied from the first reference signal line Vref1 to the first electrode of the light emitting diode D1, and initializes the light emitting diode D1. The eighth transistor T8 writes the second bias voltage VEH2 provided by the bias signal line V1 into the first pole and the second pole of the second transistor T2, resets the first pole and the second pole of the second transistor T2, changes the voltage difference between the first pole and the control pole of the second transistor T2, and changes the voltage difference between the second pole and the control pole of the second transistor T2, thereby changing the bias state of the second transistor T2, so that the bias state of the second transistor T2 before generating the driving current is kept consistent under different refresh frequencies, and the driving current generated by the second transistor T2 tends to be consistent, thereby ensuring that the display brightness tends to be consistent before and after switching the refresh frequency. And the bias state of the second transistor T2 is changed, so that the bias states of the second transistors T2 of the data writing frame and the data writing frame are kept consistent, the driving current phase difference generated by the second transistors T2 in the data writing frame and the data writing frame is prevented from being larger, the light-emitting brightness of the light-emitting diode D1 in the data writing frame and the data writing frame is ensured to be consistent, and the jump of the display brightness is prevented.

In the second light emitting sub-stage T22 of the data holding frame T2, the first light emitting control signal E1 provided by the first light emitting control signal line EM1 is at a low level, the second light emitting control signal E2 provided by the second light emitting control signal line EM2 is at a low level, the fourth transistor T4 and the fifth transistor T5 are turned on, the second transistor T2 generates a driving current according to the data voltage stored in the first capacitor C1 and the first power voltage provided by the first power supply VDD, and the light emitting diode D1 emits light in response to the driving current.

Note that, in the data writing frame T1, the sixth transistor T6 may be turned on simultaneously with the seventh transistor T7, that is, the light emitting diode D1 and the second transistor T2 may be initialized simultaneously, or the seventh transistor T7 may initialize the second transistor T2 in the first initialization sub-stage T11, the sixth transistor T6 may initialize the light emitting diode D1 in the first bias sub-stage T14, and the timing chart of fig. 5 only shows the case where the seventh transistor T7 initializes the second transistor T2 in the first initialization sub-stage T11, and the sixth transistor T6 initializes the light emitting diode D1 in the first bias sub-stage T14, but is not limited thereto. In the data retention frame T2, the sixth transistor T6 may initialize the light emitting diode D1 in the second bias sub-stage T21, i.e., the second bias sub-stage T21 and the second initialization sub-stage are the same stage; the sixth transistor T6 may initialize the light emitting diode D1 before the second bias sub-stage T21, and the timing chart of fig. 5 only shows, but is not limited to, a case where the sixth transistor T6 may initialize the light emitting diode D1 in the second bias sub-stage T21.

In addition, when the sixth transistor T6 initializes the light emitting diode D1 in the first bias sub-stage T14 and the second bias sub-stage T21, the timing of the fifth Scan signal Scan5 provided by the fifth Scan signal line S5 is the same as the timing of the first Scan signal Scan1 provided by the first Scan signal line S1, the sixth transistor T6 and the eighth transistor T8 may be connected to the same Scan signal line, i.e., the first Scan signal line S1 may be multiplexed to the fifth Scan signal line S5, so as to reduce the number of signal lines, thereby being beneficial to layout design and reducing cost. The first light emission control signal E1 and the second light emission control signal E2 have the same time sequence, and the first light emission control signal line EM1 and the second light emission control signal line EM2 can be connected with the same shift register, so that the number of shift registers can be reduced, and the cost can be saved.

It should be further noted that the pulse width and the frequency of the first Scan signal Scan1 can be adjusted, so as to flexibly adjust the bias state of the second transistor T2. The pulse width and the frequency of the first light emitting control signal E1 and the second light emitting control signal E2 can be adjusted, and the light emitting brightness of the light emitting diode D1 is adjusted, so that the difference between the display brightness before the refresh frequency is switched and the display brightness after the refresh frequency is switched is smaller. Furthermore, except the data writing stage t12, the time of other stages can be flexibly adjusted, which is beneficial to realizing broadband driving display.

As can be seen from the above driving process, the bias state of the second transistor T2 is adjusted by resetting the first and second poles of the second transistor T2 in the first and second bias sub-stages, changing the voltage difference between the first pole of the second transistor T2 and the control pole thereof, and changing the voltage difference between the second pole of the second transistor T2 and the control pole thereof. Before the second transistor T2 generates the driving current, the potential of the first electrode of the second transistor T2 is the same under different refresh frequencies; and under different refresh frequencies, the potential of the second pole of the second transistor T2 is the same, so that under different refresh frequencies, the bias state of the second transistor T2 before generating the driving current is kept consistent, thereby enabling the driving current generated by the second transistor T2 to tend to be consistent, and further ensuring that the display brightness tends to be consistent before and after switching the refresh frequencies. And the bias state of the second transistor T2 is changed, so that the bias states of the second transistors T2 of the data writing frame and the data writing frame are kept consistent, the driving current phase difference generated by the second transistors T2 in the data writing frame and the data writing frame is prevented from being larger, the light-emitting brightness of the light-emitting diode D1 in the data writing frame and the data writing frame is ensured to be consistent, and the jump of the display brightness is prevented.

In another implementation, fig. 6 is a schematic structural diagram of still another pixel circuit according to an embodiment of the present invention, optionally, referring to fig. 6, fig. 6 is a specific circuit structure corresponding to fig. 3, the data writing module 101 includes a first transistor T1, the driving module 102 includes a second transistor T2, the threshold compensation module 106 includes a third transistor T3, the first light emitting control module 108 includes a fourth transistor T4, the second light emitting control module 109 includes a fifth transistor T5, the first initialization module 107 includes a sixth transistor T6, the first bias unit 1041 includes an eighth transistor T8, the second bias unit 1042 includes a ninth transistor T9, the storage module 105 includes a first capacitor C1, and the light emitting module 103 includes a light emitting diode D1; the control electrode of the first transistor T1 is connected with the third scanning signal line S3, and the first transistor T1 is connected between the second transistor T2 and the Data line Data; the first capacitor C1 is connected between the first power supply VDD and the control electrode of the second transistor T2; the first pole of the second transistor T2 is connected with the first power supply VDD through the fourth transistor T4, the second pole of the second transistor T2 is connected with the first pole of the light emitting diode D1 through the fifth transistor T5, and the second pole of the light emitting diode D1 is connected with the second power supply VSS; the control electrode of the third transistor T3 is connected with the fourth scanning signal line S4, and the third transistor T3 is connected between the second electrode of the second transistor T2 and the control electrode of the second transistor T2; a control electrode of the fourth transistor T4 is connected with the first light-emitting control signal line EM1, and a control electrode of the fifth transistor T5 is connected with the second light-emitting control signal EM2; a control electrode of the sixth transistor T6 is connected to the fifth scan signal line S5, and the sixth transistor T6 is connected between the first reference signal line Vref1 and the first electrode of the light emitting diode D1; a control electrode of the eighth transistor T8 is connected with the first scanning signal line S1, a first electrode of the eighth transistor T8 is connected with the first bias sub-signal line V11, and a second electrode of the eighth transistor T8 is connected with a first electrode of the second transistor T2; the control electrode of the ninth transistor T9 is connected to the second scan signal line S2, the first electrode of the ninth transistor T9 is connected to the second bias sub signal line V12, and the second electrode of the ninth transistor T9 is connected to the second electrode of the second transistor T2. The third transistor T3 is, for example, a low-temperature poly-oxide transistor, which can reduce leakage current and is beneficial to prolonging the potential maintaining time of the control end of the driving module 102; the remaining transistors may be low-temperature polysilicon transistors or low-temperature polysilicon oxide transistors, and fig. 6 illustrates only the case where the third transistor T3 is a low-temperature polysilicon oxide transistor and the remaining transistors are low-temperature polysilicon transistors, but the present invention is not limited thereto.

Fig. 7 is a timing chart of a pixel circuit according to another embodiment of the present invention, and the driving process of the pixel circuit is described below with reference to fig. 6 and 7, but not limited thereto.

Specifically, in the first initialization sub-stage T11 of the data writing frame T1, the fifth Scan signal Scan5 provided by the fifth Scan signal line S5 is at a low level, the sixth transistor T6 is turned on, the fourth Scan signal Scan4 provided by the fourth Scan signal line S4 is at a high level, the third transistor T3 is turned on, the second emission control signal E2 provided by the second emission control signal line EM2 is at a low level, the fifth transistor T5 is turned on, the sixth transistor T6 writes the first reference voltage Vr1 provided by the first reference signal line Vref1 into the first pole of the light emitting diode D1, and writes the first reference voltage Vr1 into the control pole of the second transistor T2 through the fifth transistor T5 and the third transistor T3, thereby initializing the light emitting diode D1 and the second transistor T2.

In the first bias sub-stage T14 of the data writing frame T1, the eighth transistor T8 and the ninth transistor T9 may write bias voltages to the second transistor T2 at the same time, or may write bias voltages to the second transistor T2 in a time-sharing manner, and the first bias sub-stage T14 includes a first bias section T141 and a second bias section T142 when writing bias voltages in a time-sharing manner. In the first bias interval T141, the second Scan signal Scan2 supplied from the second Scan signal line S2 is at a low level, and the ninth transistor T9 is turned on. The ninth transistor T9 writes the third bias voltage VEH3 supplied from the second bias sub-signal line V12 to the second pole of the second transistor T2, changing the voltage difference between the second pole of the second transistor T2 and the control pole thereof. In the second bias interval T142, the first Scan signal Scan1 supplied from the first Scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The eighth transistor T8 writes the first bias voltage VEH1 supplied from the first bias sub-signal line V11 into the first pole of the second transistor T2, resets the first pole of the second transistor T2, and changes the voltage difference between the first pole of the second transistor T2 and the control pole thereof; therefore, the bias state of the second transistor T2 is changed, so that the bias state of the second transistor T2 before the driving current is generated is kept consistent under different refresh frequencies, the driving current generated by the second transistor T2 tends to be consistent, and further display brightness tends to be consistent before and after the refresh frequency is switched.

In the second initialization sub-stage T20 of the data holding frame T2, the fifth Scan signal Scan5 provided by the fifth Scan signal line S5 is at a low level, the sixth transistor T6 is turned on, the sixth transistor T6 writes the first reference voltage Vr1 provided by the first reference signal line Vref1 into the first pole of the light emitting diode D1, and initializes the light emitting diode D1.

In the second bias sub-stage T21 of the data holding frame T2, the eighth transistor T8 and the ninth transistor T9 may write the bias voltage to the second transistor T2 at the same time, or may write the bias voltage to the second transistor T2 in a time-sharing manner, and the second bias sub-stage T21 includes a third bias section T211 and a fourth bias section T212 when writing the bias voltage in a time-sharing manner. In the third bias interval T211, the second Scan signal Scan2 supplied from the second Scan signal line S2 is at a low level, and the ninth transistor T9 is turned on. The ninth transistor T9 writes the fourth bias voltage VEH4 supplied from the second bias sub-signal line V12 into the second pole of the second transistor T2, changing the voltage difference between the second pole of the second transistor T2 and the control pole thereof. In the fourth bias interval T212, the first Scan signal Scan1 supplied from the first Scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The eighth transistor T8 writes the second bias voltage VEH2 supplied from the first bias sub-signal line V11 into the first pole of the second transistor T2, resets the first pole of the second transistor T2, and changes the voltage difference between the first pole of the second transistor T2 and the control pole thereof; therefore, the bias state of the second transistor T2 is changed, so that the bias state of the second transistor T2 before the driving current is generated is kept consistent under different refresh frequencies, the driving current generated by the second transistor T2 tends to be consistent, and further display brightness tends to be consistent before and after the refresh frequency is switched.

It should be noted that, the third Scan signal Scan3 and the fifth Scan signal Scan5 are different in phase, and the third Scan signal line S3 and the fifth Scan signal line S5 may be connected to the same group of shift registers, that is, the shift registers connected to the third Scan signal line S3 and the shift registers connected to the fifth Scan signal line S5 are connected in cascade, so that the shift registers may be conveniently designed.

As can be seen from the above driving process, by resetting the first and second poles of the second transistor T2 in the first and second bias sub-stages, the voltage difference between the first pole of the second transistor T2 and the control pole thereof is changed, and the voltage difference between the second pole of the second transistor T2 and the control pole thereof is changed, thereby changing the bias state of the second transistor T2. Before the second transistor T2 generates the driving current, the potential of the first electrode of the second transistor T2 is the same under different refresh frequencies; and under different refresh frequencies, the potential of the second pole of the second transistor T2 is the same, so that under different refresh frequencies, the bias state of the second transistor T2 before generating the driving current is kept consistent, thereby enabling the driving current generated by the second transistor T2 to tend to be consistent, and further ensuring that the display brightness tends to be consistent before and after switching the refresh frequencies. And the bias state of the second transistor T2 is changed, so that the bias states of the second transistors T2 of the data writing frame and the data writing frame are kept consistent, the driving current phase difference generated by the second transistors T2 in the data writing frame and the data writing frame is prevented from being larger, the light-emitting brightness of the light-emitting diode D1 in the data writing frame and the data writing frame is ensured to be consistent, and the jump of the display brightness is prevented.

Optionally, referring to fig. 4 or 6, the pixel circuit further includes a second capacitor C2, a first pole of the second capacitor C2 is connected to the first power supply VDD, and a second pole of the second capacitor C2 is connected to the first end of the driving module 102. By adjusting the capacitance of the second capacitor C2, the time for the first transistor T1 to write the data voltage can be adjusted, thereby adjusting the threshold compensation time of the threshold compensation module 106.

The present embodiment also provides a method for driving a pixel circuit, where the method for driving a pixel circuit provided in any of the foregoing embodiments, and fig. 8 is a flowchart of a method for driving a pixel circuit provided in an embodiment of the present invention, and optionally, referring to fig. 1 and 8, the method for driving a pixel circuit includes:

s201, in a data writing stage, the data writing module writes the data voltage provided by the data line into the driving module.

S202, in the bias stage, the bias module writes bias voltage provided by the bias signal line into the first end and the second end of the driving module.

Specifically, in the bias stage, the bias module 104 is turned on, the bias module 104 writes the bias voltage provided by the bias signal line V1 into the first end and the second end of the driving module 102, resets the first end and the second end of the driving module 102, changes the differential pressure between the first end and the control end of the driving module 102, and changes the differential pressure between the second end and the control end of the driving module 102, thereby changing the bias state of the driving module 102, that is, changing the characteristics of the driving module 102. Before the driving module 102 generates the driving current, the potential of the first end of the driving module 102 is the same under different refresh frequencies; and under different refresh frequencies, the electric potential of the second end of the driving module 102 is the same, so that under different refresh frequencies, the bias state of the driving module 102 before generating the driving current is the same, the driving current generated by the driving module tends to be consistent, and further, the display brightness tends to be consistent before and after the refresh frequency is switched.

S203, in the light-emitting stage, the driving module generates driving current according to the data voltage, and the light-emitting module emits light in response to the driving current.

Specifically, in the light emitting stage, the driving module 102 generates a driving current according to the first power voltage and the data voltage, and the light emitting module 103 emits light in response to the driving current. Because the first end and the second end of the driving module 102 are reset before the driving module 102 generates the driving current, the bias state of the driving module 102 is changed, and the driving module 102 can generate the driving current better, so that the light emitting module 103 can display the target display brightness better.

The technical solution of the embodiment of the present invention further provides a display panel, where the display panel includes the pixel circuit provided by any embodiment of the present invention, fig. 9 is a schematic structural diagram of the display panel provided by the embodiment of the present invention, and referring to fig. 9, the display panel may be applied to a mobile phone, a tablet, a display, a smart watch, MP3, MP4, or other wearable devices, etc., and because the display panel includes the pixel circuit provided by any embodiment of the present invention, the display panel also has the same beneficial effects and is not repeated herein.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.

The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims

1. A pixel circuit, comprising: the device comprises a data writing module, a driving module, a light emitting module and a biasing module;

2. The pixel circuit of claim 1, wherein the bias module comprises a first bias unit;

3. The pixel circuit according to claim 2, wherein one driving period of the pixel circuit includes a data writing frame and a data holding frame; the data writing frame comprises a data writing stage and a first light emitting sub-stage, and the data holding frame comprises a second light emitting sub-stage;

preferably, the second bias voltage is greater than the first bias voltage.

4. The pixel circuit of claim 1, wherein the bias module comprises a first bias unit and a second bias unit; the bias signal line comprises a first bias sub-signal line and a second bias sub-signal line;

5. The pixel circuit according to claim 4, wherein one driving period of the pixel circuit includes a data writing frame and a data holding frame; the data writing frame comprises a data writing stage and a first light emitting sub-stage, and the data holding frame comprises a second light emitting sub-stage;

6. The pixel circuit according to claim 2 or 4, further comprising: the device comprises a storage module, a threshold compensation module, a first initialization module, a first light-emitting control module and a second light-emitting control module;

7. The pixel circuit of claim 6, further comprising: a second initialization module;

8. The pixel circuit according to claim 1, wherein,

when the data voltages are different, the bias voltages provided by the bias signal lines are different;

preferably, the larger the data voltage, the larger the bias voltage.

9. A driving method of a pixel circuit, characterized in that the pixel circuit comprises: the device comprises a data writing module, a driving module, a light emitting module and a biasing module; the data writing module is connected between the driving module and the data line; the first end of the driving module is connected with a first power supply, the second end of the driving module is connected with the first end of the light-emitting module, and the second end of the light-emitting module is connected with a second power supply; the first end of the bias module is connected with a bias signal line, and the second end of the bias module is at least connected with the second end of the driving module;

The driving method includes:

10. A display panel comprising the pixel circuit of any one of claims 1-8.