CN116166597A

CN116166597A - Method for accessing multi-page register through serial interface in UVM

Info

Publication number: CN116166597A
Application number: CN202211593953.4A
Authority: CN
Inventors: 戴威; 陈谡; 范学仕; 唐茂洁
Original assignee: China Key System and Integrated Circuit Co Ltd
Current assignee: China Key System and Integrated Circuit Co Ltd
Priority date: 2022-12-13
Filing date: 2022-12-13
Publication date: 2023-05-26

Abstract

The invention discloses a method for accessing a multi-page register in UVM through a serial interface, belonging to the field of chip verification. Firstly, establishing a bottom register block in a paging way, adding the bottom register block into a top register block, and giving different offset addresses to distinguish; then customizing a register front door access class, and replacing all register front door accesses with a custom front door access component; and finally, judging the page where the current register is located in the custom front door, setting a corresponding chip select signal, and starting a serial interface sequence to finish read-write operation. The invention solves the problem that more register accesses are realized in a paging chip selection mode of the register under the condition of limited address bit width.

Description

Method for accessing multi-page register through serial interface in UVM

Technical Field

The invention relates to the technical field of chip verification, in particular to a method for accessing a multi-page register through a serial interface in UVM.

Background

UVM (Universal Verification Methodology, universal validation methodology) is a validation library based on the SystemVerilog language, with OVM (Open Verification Methodology, open validation methodology) and VMM (Verification Methodology Manual, validation methodology manual) being pushed by accelera in 2011, 2 months, supported by Sysnopsys, mentor and Cadence, before UVM occurs. UVM almost inherits the advantages of the former two and overcomes the disadvantages, representing a future direction of development of the authentication methodology.

The UVM's register model is a set of high-level abstract classes used to model registers and memory in DUTs (Design Under Test, design test), whose basic structure is mainly composed of UVM _field (register field segment class), UVM _reg (register class), UVM _mem (memory class), UVM _reg_block (register block), and so on. Through a UVM register model, front door or back door operation on a register of the DUT can be simply and efficiently realized. It also provides some sequence of register test, which is convenient for users to use directly.

The normal register model workflow is: (1) calling a read-write function provided by a register model base class; (2) The register model sends out a uvm _reg_bus_op data type, wherein the data comprises write or read flag bits, addresses, numerical values, register read-write success status flags and the like; (3) Converting the operation type into a data type corresponding to an interface protocol sequence by a data type converter (Adapter); (4) starting sequence to read and write the bus. This approach has certain requirements for registers and interface protocols in the DUT, but the use of registers in practical terms is often complex, e.g., the number of registers is greater than the number of available addresses, etc., which cannot be satisfied.

Disclosure of Invention

The invention aims to provide a method for accessing a multi-page register through a serial interface in UVM (universal serial bus) so as to solve the problems in the background technology.

In order to solve the above technical problems, the present invention provides a method for accessing a multi-page register in UVM through a serial interface, including:

step A: paging to establish a bottom register block, adding the bottom register block into a top register block, and giving different offset addresses for distinguishing;

and (B) step (B): the method comprises the steps of customizing a register front door access class, and replacing all register front door accesses with a custom front door access component;

step C: judging the page of the current register in the custom front door, setting a corresponding chip select signal, and starting a serial interface sequence.

In one embodiment, in step A, all uvm _reg/uvm _mem categories for each page are integrated into one bottom register block, i.e., one page, and then all bottom register blocks are integrated into the top register block and different offset addresses are set.

In one embodiment, in the step B, the custom front door inherits from the uvm _reg_front_item base class, and uvm _reg_item type data is obtained from a register model formed by the bottom register block and the top register block, where the data includes an access type, a current register class handle, an operation type, read-write data, and offset address information; when the top-level environment is constructed, the front gate access modes of all registers are replaced by custom front gates through a set_front tdoor function.

In one embodiment, in the step C, in the body function of the custom front door, a chip select signal of the serial interface sequence is set according to a bottom register block where the current register is located, then the rest corresponding signals of the serial interface sequence are set according to the read-write type, address and data of the register, and finally the serial interface sequence is started to complete the read-write task.

In the method for accessing the multi-page register in the UVM through the serial interface, provided by the invention, the verification environment only needs to modify the register model integration and add the custom front door, the RTL code only needs to enable different bottom register modules through chip selection, the realization is simple and efficient, and the later-stage expansibility is strong. The invention solves the problem that more registers are accessed under the condition of limited address bit width.

Drawings

FIG. 1 is a block diagram of a top level register block integrating multiple bottom level register blocks;

FIG. 2 is a schematic diagram of a structure using a default data type converter Adapter and using custom front door access in an authentication environment

FIG. 3 is a schematic diagram of a process flow in a body function in a custom front-door class.

Detailed Description

A method for accessing multi-page registers through a serial interface in UVM according to the present invention is described in further detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.

FIG. 1 is a block diagram of a top-level register block integrating bottom-level register blocks, as shown in FIG. 1, uvm _reg_block0 and uvm _reg_block1 are two independent register block classes, respectively containing respective uvm _reg and uvm _mem classes, which are two register pages, integrated under the same top-level register block, respectively setting different offset addresses by an add_submap function, and then integrating the top-level register block into a verification environment.

FIG. 2 is a block diagram of converting register operation type data (uvm _reg_item) into a bus data type of a serial interface sequence by a custom register front door access method, wherein the custom front door method extends from uvm _reg_front door base class, and uvm _reg_item type data is obtained from a register model, and the data comprises information such as access type, current register class handle, operation type, read-write data, offset address and the like. All uvm _reg and uvm _mem classes will be obtained in the verification environment by the get_registers function and the get_memories function, and then the instantiated custom front door will be set as the default front door access way by the set_front door function.

FIG. 3 shows the contents of a body function in the custom front class, first determining which page of registers is currently operating, and setting the chip select signal for the corresponding page in the serial interface sequence; judging whether the current register type is uvm _reg type or uvm _mem type, if the current register type is uvm _reg type, judging whether the current register type is read operation or write operation again, writing addresses and data and starting a write serial interface sequence by the write operation, starting a read serial interface sequence by the write address by the read operation, and returning the read data to a register model; if the operation type is uvm _mem, the operation type is judged as well, and the corresponding serial interface sequence is restarted.

The technical key point of the invention is that the method for realizing more register access under the condition of limited address is realized by combining a paging register mode and a self-defined front door access method, the flow is only one realization method of the method, and a plurality of variants and improvements can be made, which belong to the protection scope of the invention. Accordingly, the scope of the invention should be limited only by the attached claims.

Claims

1. A method of accessing a multi-page register in UVM via a serial interface, comprising:

2. A method of accessing multi-page registers via a serial interface in UVM according to claim 1, wherein in step a, all UVM reg/UVM mem classes of each page are integrated into one bottom register block, i.e. one page, and then all bottom register blocks are integrated into the top register block and different offset addresses are set.

3. The method as claimed in claim 1, wherein in the step B, the custom front gate inherits from UVM _reg_front_item base class, and UVM _reg_item type data is obtained from a register model composed of a bottom register block and a top register block, and the data includes an access type, a current register class handle, an operation type, read-write data, and offset address information; when the top-level environment is constructed, the front gate access modes of all registers are replaced by custom front gates through a set_front tdoor function.

4. The method for accessing multi-page registers through serial interfaces according to claim 1, wherein in step C, in the body function of the custom front door, a chip select signal of serial interface sequence is set according to a bottom register block where a current register is located, then the rest corresponding signals of serial interface sequence are set according to a read-write type, an address and data of the register, and finally the serial interface sequence is started to complete a read-write task.