CN116156740A - Printed circuit board and manufacturing method - Google Patents
Printed circuit board and manufacturing method Download PDFInfo
- Publication number
- CN116156740A CN116156740A CN202310220319.4A CN202310220319A CN116156740A CN 116156740 A CN116156740 A CN 116156740A CN 202310220319 A CN202310220319 A CN 202310220319A CN 116156740 A CN116156740 A CN 116156740A
- Authority
- CN
- China
- Prior art keywords
- printed circuit
- circuit board
- hole
- working layers
- coplanar waveguide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
Abstract
The application provides a printed circuit board and a manufacturing method thereof, comprising the following steps: at least two working layers; a first hole penetrating the at least two working layers; the side wall of the first hole is provided with a coplanar waveguide structure, and the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers.
Description
Technical Field
The present application relates to the field of printed circuit boards, and more particularly, to a printed circuit board and a method of manufacturing the same.
Background
With the continuous development of technology, the rate of digital signals on a PCB (Printed Circuit Board ) is continuously refreshed, from the earliest megahertz to gigahertz (ghz) and then to hundreds of ghz, and the PCB is used as a carrier of high-speed electrical signals, so as to meet the signal integrity requirements of the signals in the transmission process, and continuous breakthrough is sought.
The traditional processing mode of the multilayer PCB adopts a drilling mode to solve the signal transmission problem among all layers. As shown in fig. 1, which is a schematic diagram of a PCB in the prior art, the PCB101 has a multi-layer structure, and two via structures 102-103 are provided by drilling holes on the multi-layer structure, specifically, a common hole is drilled at the junction of wires to be connected in each layer, and a hole disc, i.e. via hole, is provided. The hole disc of the via hole is communicated with copper foil of which each layer needs to be communicated in the middle, and the via hole structure is used for realizing signal transmission among all layers.
Because the conventional processing of the PCB is done by drilling, it is only continuously optimized in this configuration to meet the requirements of higher frequency signals. The signal quality problem caused by parasitic inductance and parasitic capacitance of the via hole becomes a bottleneck which is difficult to solve in signal transmission, and becomes an unsolvable problem.
Disclosure of Invention
In view of this, the present application provides a printed circuit board and a manufacturing method thereof, as follows:
a printed circuit board, comprising:
at least two working layers;
a first hole penetrating the at least two working layers;
the side wall of the first hole is provided with a coplanar waveguide structure, and the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers.
Optionally, in the above printed circuit board, the coplanar waveguide structure includes:
a wire region and a plating region disposed on a sidewall of the first hole, the plating region being adjacent to the wire region;
wherein, the wire area includes wires connecting any two working layers.
Optionally, in the above printed circuit board, the setting parameters of the wires in the wire area are related to parameters of the at least two working layers and thicknesses of the wires.
Optionally, in the above printed circuit board, a first wire in the wire area connects the first target layer and the second target layer;
wherein the first conductive line is etched for a plating layer provided on a side wall surface of the first hole based on the first target layer and the second target layer and the setting parameter.
Optionally, in the above printed circuit board, any one of the at least two working layers is provided with at least one connection endpoint on a side wall of the first hole, and the connection endpoint is connected with the coplanar waveguide structure.
Optionally, in the above printed circuit board, the first hole is a waist hole;
wherein the connection end point is on the side wall of the straight edge of the waist hole.
Optionally, the above printed circuit board further includes: at least one second hole for grounding the connected at least two working layers.
A method of making a printed circuit board, the method comprising:
pressing the generated at least two working layers to obtain an initial printed circuit board;
setting a first hole penetrating through the initial printed circuit board based on the signal exchange layer in the at least two working layers;
and forming a coplanar waveguide structure on the side wall of the first hole to obtain a printed circuit board, wherein the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers.
Optionally, in the above method, the forming a coplanar waveguide structure on a sidewall of the first hole includes:
electroplating on the side wall of the first hole to obtain an electroplated layer with a preset thickness;
and etching the electroplated layer based on the predetermined wire width and the predetermined spacing to form a coplanar waveguide structure.
Optionally, before the generating at least two working layers in sequence, the method further includes:
and determining coplanar waveguide parameters based on the parameters of the printed circuit board and the preset thickness of the electroplated layer, wherein the coplanar waveguide parameters at least comprise wire widths and pitches.
According to the technical scheme, the application provides a printed circuit board, which comprises: at least two working layers; a first hole penetrating the at least two working layers; the side wall of the first hole is provided with a coplanar waveguide structure, and the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers. In this embodiment, the first hole penetrating through the multilayer working layer is formed through the printed circuit board, and the coplanar waveguide structure electrically connecting the multilayer working layer is formed on the side wall of the first hole, so that signal transmission between the multilayer working layers is realized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a prior art PCB;
fig. 2 is a schematic structural view of a printed circuit board embodiment 1 provided in the present application;
FIG. 3 is a schematic view of the coplanar waveguide structure in embodiment 2 of the printed circuit board provided in the present application;
FIG. 4 is a schematic view of a lead area of embodiment 2 of a printed circuit board provided herein;
FIG. 5 is a schematic view of a first hole sidewall in example 5 of a printed circuit board provided herein;
FIG. 6 is a schematic view of a first hole in example 5 of a printed circuit board provided herein;
fig. 7 is a schematic structural view of a printed circuit board embodiment 4 provided in the present application;
FIG. 8 is a flow chart of example 1 of a manufacturing method provided in the present application;
FIG. 9 is a flow chart of example 2 of a manufacturing method provided in the present application;
fig. 10 is a flowchart of embodiment 3 of a manufacturing method provided in the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
As shown in fig. 2, a schematic structural diagram of a printed circuit board embodiment 1 provided in the present application includes: at least two working layers 201 and a first aperture 202;
wherein the first hole 202 penetrates the first hole of the at least two working layers 201;
the side wall of the first hole is provided with a coplanar waveguide structure, and the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers.
The printed circuit board is a multilayer printed circuit board and comprises a plurality of working layers, wherein printed circuits are arranged in the working layers, and the printed circuits of the working layers of each layer can be the same or different.
The printed circuit board is provided with a first hole penetrating through, the side wall of the first hole is provided with a coplanar waveguide structure, and the coplanar waveguide structure is used for electrically connecting the multiple working layers.
Specifically, signal layer change occurs in any two working layers, the position of the signal layer change occurs in each working layer is arranged at the side wall of the first hole, and the signal layer change positions are connected through the coplanar waveguide structure, so that signal transmission between the working layers is realized.
In a specific implementation, the location of the first hole on the printed circuit board is determined based on the signal exchange layer location in the at least two working layers.
In a specific implementation, when the working layer is manufactured, the printed circuit arranged in the working layer may be arranged, so that the printed circuit is arranged in an area other than the area corresponding to the first hole.
In the embodiment shown in fig. 2, the 4-layer structure represents at least two working layers in the printed circuit board, and in the embodiment, the number of layers of the printed circuit board is not limited thereto, and the number of layers may be set according to practical situations.
It should be noted that, the coplanar waveguide structure is a microwave planar transmission structure with excellent performance, compared with the via hole, the parasitic effect caused by the exchange of the layer of the signal passing through the via hole is reduced, the impedance matching is more consistent, the signal loss is smaller, and the performance of the coplanar waveguide structure is better. And the method can be used for small-scale optimization based on the existing PCB material, so that higher-speed signal transmission is realized, the use of high-frequency high-speed high-price plates is reduced, the product cost is reduced, and the product quality is improved.
In summary, the printed circuit board provided in this embodiment includes: at least two working layers; a first hole penetrating the at least two working layers; the side wall of the first hole is provided with a coplanar waveguide structure, and the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers. In this embodiment, the first hole penetrating through the multilayer working layer is formed through the printed circuit board, and the coplanar waveguide structure electrically connecting the multilayer working layer is formed on the side wall of the first hole, so that signal transmission between the multilayer working layers is realized.
In embodiment 2 of the printed circuit board provided herein, the printed circuit board includes: at least two working layers and a first hole, wherein the side wall of the first hole is provided with a coplanar waveguide structure.
As shown in fig. 3, which is a schematic structural view of a coplanar waveguide structure, the coplanar waveguide structure includes: a wire region 301 and a plated region 302;
wherein a wire region 301 and a plated region 302 are provided on the first hole sidewall, the plated region being adjacent to the wire region;
wherein, the wire area includes wires connecting any two working layers.
The wire area is specifically an area in which wires for layer-changing connection between engineering layers are uniformly distributed, and each wire can be electrically connected with any two working layers, so that layer-changing signal transmission between the two working layers is realized.
In specific implementations, one or more wire areas may be provided according to practical situations, and in this application, the schematic diagram is only used to illustrate one wire area, and is not limited to only providing one wire area.
Wherein the plating region is a part of the non-wire region, and is covered with metal by electroplating, and the plating region is not electrically connected with each working layer.
In particular, the thickness of the wire in the wire region is the same as the thickness of the plated region.
Wherein the setting parameters of the wires in the wire area are related to the parameters of the at least two working layers and the thickness of the wires.
The setting parameters of the wires comprise wire width, spacing and the like.
Specifically, the parameters of the at least two working layers include: dielectric constant, thickness, etc.
The calculation of the coplanar waveguide is related to the dielectric constant Er, the dielectric thickness H1, the wire width W, the distance D1, and the conductor thickness T1 of the plate, and the coplanar waveguide is designed so that the impedance is consistent with the transmission line impedance.
In the printed circuit board, the plate refers to a working layer, the medium is the multi-layer working layer, the thickness of the medium is the whole thickness of the multi-layer working layer (the thickness of the printed circuit board), the thickness of the conductor refers to the thicknesses of the wire and the plating layer, and the thicknesses of the wire and the plating layer are the same.
The line widths of the conducting wires and the transmission lines in the working layer are possibly different, if the impedance is the same but the widths are inconsistent, the conducting wires and the transmission lines can be connected through gradual change lines, simulation optimization is needed, and one conducting wire or two differential wires can be arranged between the coplanar waveguides.
As shown in fig. 4, which is a schematic view of a wire region in the present embodiment, a first wire 401 in the wire region connects a first target layer 402 and a second target layer 403;
wherein the first conductive line is etched for a plating layer provided on a side wall surface of the first hole based on the first target layer and the second target layer and the setting parameter.
In fig. 4, a wire is taken as an example, and in the implementation, a plurality of wires are disposed in the wire region.
The setting parameters are, in particular, the width of the wires and the distance from other wires or from the coating region.
In a specific implementation, the wire in the wire area is obtained by electroplating a metal coating on the surface of the side wall of the first hole and etching the metal coating based on the set parameters.
Specifically, after the signal layer change transmission is required between the first target layer and the second target layer, connection endpoints of the first target layer and the second target layer are determined, a first wire is reserved for forming a plating layer between the two connection endpoints based on the setting parameters, and the plating layer on the outer side of a corresponding area of the first wire is etched away to form a distance between the plating layer and other wires or the plating layer area.
In summary, in the printed circuit board provided in the present embodiment, the coplanar waveguide structure includes: a wire region and a plating region disposed on a sidewall of the first hole, the plating region being adjacent to the wire region; wherein, the wire area includes wires connecting any two working layers. In this embodiment, the coplanar waveguide structure is disposed on the printed circuit board by connecting the conductor region and the plating region formed by the conductors of any two working layers.
Embodiment 3 of a printed circuit board provided herein, the printed circuit board comprising: at least two working layers and a first hole, wherein the side wall of the first hole is provided with a coplanar waveguide structure.
And any one of the at least two working layers is provided with at least one connecting endpoint on the side wall of the first hole, and the connecting endpoint is connected with the coplanar waveguide structure.
The at least two working layers are provided with at least one connecting endpoint which is used for being connected with the other working layer in the process of layer change signal transmission, and is used for realizing electric connection with the other working layer, and the side wall of the first hole arranged on the connecting endpoint is electrically connected through a coplanar waveguide structure arranged on the side wall.
As shown in fig. 5, a schematic view of the sidewall of the first hole is provided with a connection terminal 501 on each working layer, and the wires 502 between any two working layers are connected together through the connection terminal to realize electrical connection.
In the schematic diagram, an example of setting a connection endpoint in each working layer is taken as an example for explanation, in specific implementation, the number of other working layers that each working layer can be connected to is not limited to 1, and the number of connection endpoints set in the working layers is not limited to 1.
Wherein, the first hole adopts a waist hole; the connecting end points are arranged on the side walls of the straight sides of the waist holes.
The waist hole comprises a straight edge and an arc part, wherein a connecting endpoint in the working layer is arranged at the side wall of the straight edge and is connected through a wire.
In particular, the first hole is milled on the printed circuit board by using a milling cutter, and the milled hole on the printed circuit board is a waist hole due to the structural limitation of the milling cutter.
As shown in fig. 6, a schematic view of a first hole in this embodiment is shown, and a waist hole is used as the first hole 601.
Wherein the wires 602 are bent in the direction of each layer to the right-angle side of the waist hole, and the formed wire region and the non-wire region form the waist hole shape.
In summary, in the printed circuit board provided in this embodiment, at least one connection endpoint is respectively disposed on a side wall of the first hole on any one of the at least two working layers, and the connection endpoint is connected with the coplanar waveguide structure, so as to realize electrical connection of the two working layers, and further realize layer-changing signal transmission between the two working layers.
As shown in fig. 7, a schematic structural diagram of a printed circuit board embodiment 4 provided in the present application includes: at least two working layers 701 and a first aperture 702 and at least one second aperture 703;
the structural functions of at least two working layers and the first hole are identical to those of the foregoing embodiment 1, and a detailed description is omitted in this embodiment.
Wherein the second hole 703 is used to ground the connected at least two working layers.
Wherein, the printed circuit board is also provided with one or more second holes according to grounding requirements, and the second holes can also be called grounding holes.
The second hole may be a hole penetrating the printed circuit board, and may be configured to connect to a ground of a wiring at a penetrating position, so as to unify overall grounding of the printed circuit board.
In a specific implementation, the area of the first hole is larger than the area of one of the second holes.
In summary, in the printed circuit board provided in this embodiment, the second hole for grounding the working layer is further provided, so that the circuit ground on the printed circuit board is ensured.
As shown in fig. 8, a flowchart of an embodiment 1 of a manufacturing method is provided for manufacturing a printed circuit board, the method includes the following steps:
step S801: pressing the generated at least two working layers to obtain an initial printed circuit board;
wherein, the printed circuit is carried out on each working layer according to the function of the working layer to obtain a plurality of working layers, and then the working layers are pressed to obtain the initial printed circuit board.
Step S802: setting a first hole penetrating through the initial printed circuit board based on the signal exchange layer in the at least two working layers;
when the working layer is arranged, the signal exchange layer is arranged at a uniform position, such as the middle position of the working layer.
After determining the position of the signal exchange layer in the working layer, a first hole penetrating the initial printed circuit board is arranged.
The signal exchange layer is specifically provided with a connection endpoint of the working layer.
The connection terminals of each layer may be disposed at a uniform position such that when the first hole is disposed on the initial printed circuit board, the connection terminals of each working layer are exposed at the side wall of the first hole.
In the implementation, since the sizes of the working layers are consistent, the regions of the printed circuits in the working layers can be limited based on the same coordinate system, so that the consistency of the regions which can be penetrated in the working layers is ensured.
Step S803: and forming a coplanar waveguide structure on the side wall of the first hole to obtain the printed circuit board.
The coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers.
And forming a coplanar waveguide structure on the side wall of the first hole so as to electrically connect the multiple working layers and realize signal layer-changing transmission.
And each layer is in layer-changing transmission with signals of different layers, and the layers are required to be connected through different wires of the wire area in the coplanar waveguide structure, so that respective signal separation is realized, and the signal transmission is not influenced.
It should be noted that, the coplanar waveguide structure is a microwave planar transmission structure with excellent performance, compared with the via hole, the parasitic effect caused by the exchange of the layer of the signal passing through the via hole is reduced, the impedance matching is more consistent, the signal loss is smaller, and the performance of the coplanar waveguide structure is better. And the method can be used for small-scale optimization based on the existing PCB material, so that higher-speed signal transmission is realized, the use of high-frequency high-speed high-price plates is reduced, the product cost is reduced, and the product quality is improved.
The printed circuit board can be provided with a plurality of second holes which are grounded according to the grounding requirement, and the positions of the second holes are arranged according to the circuit of the grounding requirement.
In summary, the manufacturing method provided in this embodiment includes: pressing the generated at least two working layers to obtain an initial printed circuit board; setting a first hole penetrating through the initial printed circuit board based on the signal exchange layer in the at least two working layers; and forming a coplanar waveguide structure on the side wall of the first hole to obtain a printed circuit board, wherein the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers. In this embodiment, the first hole penetrating through the multilayer working layer is formed through the printed circuit board, and the coplanar waveguide structure electrically connecting the multilayer working layer is formed on the side wall of the first hole, so that signal transmission between the multilayer working layers is realized.
As shown in fig. 9, a flowchart of an embodiment 2 of a manufacturing method is provided, and the method includes the following steps:
step S901: pressing the generated at least two working layers to obtain an initial printed circuit board;
step S902: setting a first hole penetrating through the initial printed circuit board based on the signal exchange layer in the at least two working layers;
steps S901-902 are identical to the corresponding steps in embodiment 1, and are not described in detail in this embodiment.
Step S903: electroplating on the side wall of the first hole to obtain an electroplated layer with a preset thickness;
and electroplating the side wall of the first hole penetrating through the printed circuit board, and generating an electroplated layer with a preset thickness on the side wall of the first hole.
The preset thickness may be set according to practical situations, and specific values of the thickness are not limited in the application.
Wherein copper can be used as the material for the plating.
Step S904: and etching the electroplated layer based on the predetermined wire width and the predetermined spacing to form a coplanar waveguide structure.
The width and the pitch of the wires are predetermined, and the plating layer on the side wall is etched based on the width and the pitch of the wires and the positions of the connection terminals of the working layers exposed in the first holes, so that the connected wires are formed between the working layers.
Wherein, the wires and the residual plating layer area in the side wall of the first hole form a coplanar waveguide structure on the side wall of the first hole.
In summary, the manufacturing method provided in this embodiment includes: electroplating is carried out on the side wall of the first hole to obtain an electroplated layer with a preset thickness, the electroplated layer is etched based on the preset wire width and the preset distance to obtain wires connected with all the working layers, and a coplanar waveguide structure is formed on the side wall of the first hole by combining the residual unetched plated layer area, so that the process of forming the coplanar waveguide structure on the side wall of the first hole is realized.
As shown in fig. 10, a flowchart of an embodiment 3 of a manufacturing method is provided herein, and the method includes the following steps:
step S1001: determining coplanar waveguide parameters based on the parameters of the printed circuit board and the preset thickness of the electroplated layer;
wherein the coplanar waveguide parameters include at least wire linewidth and spacing.
The method comprises the steps of carrying out analysis and determination on coplanar waveguide parameters related to a coplanar waveguide structure in advance before the working layer is produced.
The calculation of the coplanar waveguide is related to the dielectric constant Er, the dielectric thickness H1, the wire width W, the distance D1, and the conductor thickness T1 of the plate, and the coplanar waveguide is designed so that the impedance is consistent with the transmission line impedance.
In the printed circuit board, the plate refers to a working layer, the medium is the multi-layer working layer, the thickness of the medium is the whole thickness of the multi-layer working layer (the thickness of the printed circuit board), the thickness of the conductor refers to the thicknesses of the wire and the plating layer, and the thicknesses of the wire and the plating layer are the same.
The line widths of the conducting wires and the transmission lines in the working layer are possibly different, if the impedance is the same but the widths are inconsistent, the conducting wires and the transmission lines can be connected through gradual change lines, simulation optimization is needed, and one conducting wire or two differential wires can be arranged between the coplanar waveguides.
Specifically, impedance matching of the transmission line and the coplanar waveguide can be realized through simulation, and performance is optimized, so that the optimal coplanar waveguide parameters are obtained.
Step S1002: pressing the generated at least two working layers to obtain an initial printed circuit board;
step S1003: setting a first hole penetrating through the initial printed circuit board based on the signal exchange layer in the at least two working layers;
step S1004: electroplating on the side wall of the first hole to obtain an electroplated layer with a preset thickness;
step S1005: and etching the electroplated layer based on the predetermined wire width and the predetermined spacing to form a coplanar waveguide structure.
Steps S1002 to 1005 are identical to the corresponding steps in embodiment 2, and are not described in detail in this embodiment.
In summary, the manufacturing method provided in this embodiment further includes: and determining coplanar waveguide parameters based on the parameters of the printed circuit board and the preset thickness of the electroplated layer, wherein the coplanar waveguide parameters at least comprise wire widths and pitches. In this embodiment, parameters of the coplanar waveguide structure in the printed circuit board are analyzed and determined in advance, so as to provide a basis for forming the coplanar waveguide structure on the side wall of the first hole of the printed circuit board.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. The device provided in the embodiment corresponds to the method provided in the embodiment, so that the description is simpler, and the relevant points refer to the description of the method.
The previous description of the provided embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features provided herein.
Claims (10)
1. A printed circuit board, comprising:
at least two working layers;
a first hole penetrating the at least two working layers;
the side wall of the first hole is provided with a coplanar waveguide structure, and the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers.
2. The printed circuit board of claim 1, wherein the coplanar waveguide structure comprises:
a wire region and a plating region disposed on a sidewall of the first hole, the plating region being adjacent to the wire region;
wherein, the wire area includes wires connecting any two working layers.
3. The printed circuit board of claim 2, wherein the set parameters of the wires in the wire region are related to parameters of the at least two working layers and thickness of the wires.
4. The printed circuit board of claim 3, wherein a first wire in the wire region connects the first target layer and the second target layer;
wherein the first conductive line is etched for a plating layer provided on a side wall surface of the first hole based on the first target layer and the second target layer and the setting parameter.
5. The printed circuit board of claim 1, wherein any one of the at least two working layers is provided with at least one connection terminal at a side wall of the first hole, respectively, the connection terminal being connected to the coplanar waveguide structure.
6. The printed circuit board of claim 5, wherein the first hole is a waist hole;
wherein the connection end point is on the side wall of the straight edge of the waist hole.
7. The printed circuit board of claim 1, further comprising: at least one second hole for grounding the connected at least two working layers.
8. A method of making a printed circuit board, the method comprising:
pressing the generated at least two working layers to obtain an initial printed circuit board;
setting a first hole penetrating through the initial printed circuit board based on the signal exchange layer in the at least two working layers;
and forming a coplanar waveguide structure on the side wall of the first hole to obtain a printed circuit board, wherein the coplanar waveguide structure is used for electrically connecting the at least two working layers respectively so as to realize signal transmission between the at least two working layers.
9. The method of claim 8, wherein forming a coplanar waveguide structure at the sidewall of the first hole comprises:
electroplating on the side wall of the first hole to obtain an electroplated layer with a preset thickness;
and etching the electroplated layer based on the predetermined wire width and the predetermined spacing to form a coplanar waveguide structure.
10. The method of claim 9, further comprising, prior to sequentially generating the at least two working layers:
and determining coplanar waveguide parameters based on the parameters of the printed circuit board and the preset thickness of the electroplated layer, wherein the coplanar waveguide parameters at least comprise wire widths and pitches.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310220319.4A CN116156740A (en) | 2023-03-02 | 2023-03-02 | Printed circuit board and manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310220319.4A CN116156740A (en) | 2023-03-02 | 2023-03-02 | Printed circuit board and manufacturing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116156740A true CN116156740A (en) | 2023-05-23 |
Family
ID=86360072
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310220319.4A Pending CN116156740A (en) | 2023-03-02 | 2023-03-02 | Printed circuit board and manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116156740A (en) |
-
2023
- 2023-03-02 CN CN202310220319.4A patent/CN116156740A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8674781B2 (en) | Printed circuit board comprised of an insulating layer having buried microstrip lines and conductors with widths that narrow into the insulation layer | |
| TWI710163B (en) | Radio frequency connection arrangement | |
| US8248183B2 (en) | Circuit board pad having impedance matched to a transmission line and method for providing same | |
| US7202755B2 (en) | Semi-suspended coplanar waveguide on a printed circuit board | |
| JP2002531960A (en) | Printed circuit board and method of manufacturing the same | |
| US4772864A (en) | Multilayer circuit prototyping board | |
| JP3969523B2 (en) | Method for manufacturing printed wiring board | |
| JP2021502700A (en) | Additive Manufacturing Technology (AMT) Faraday Boundary in Radio Frequency Circuits | |
| US20230107707A1 (en) | Substrate Integrated Waveguide Transition | |
| CN111988910A (en) | Electronic component mounting structure and electronic component mounting method | |
| CN110324962B (en) | Method for reducing insertion loss of differential line of PCB (printed circuit board) | |
| CN113347780B (en) | Fin line structure formed by multilayer circuit boards | |
| US7002433B2 (en) | Microwave coupler | |
| US20180124917A1 (en) | System and method for improving isolation in high-density laminated printed circuit boards | |
| JPH0341803A (en) | Wiring board with reduced crosstalk noise between signal lines and its manufacture | |
| CN116156740A (en) | Printed circuit board and manufacturing method | |
| RU2378745C2 (en) | Bandpass filter | |
| US7196906B1 (en) | Circuit board having segments with different signal speed characteristics | |
| JP3186018B2 (en) | High frequency wiring board | |
| CN113540733B (en) | Vertical switching structure | |
| KR20200078539A (en) | Spiral antenna and related manufacturing technology | |
| US20210135329A1 (en) | Implementation of inductive posts in an siw structure and production of a generic filter | |
| EP1505685B1 (en) | Microstrip line and method for producing of a microstrip line | |
| CN110996508A (en) | Circuit board, manufacturing method thereof and electronic equipment | |
| KR101264106B1 (en) | Waveguide and method of manufacturing the waveguide |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |