CN116133242A - Circuit board and manufacturing method thereof - Google Patents

Abstract

The application provides a circuit board and a manufacturing method of the circuit board, wherein the circuit board comprises a substrate, a conductive bus, a plurality of conductive leads, a plurality of bonding pads and a plurality of plating layers; the conductive bus, the conductive leads, the bonding pads and the plurality of plating layers are uniformly distributed on the substrate, the plurality of conductive leads comprise a first lead and a second lead, the plurality of bonding pads comprise a first bonding pad and a second bonding pad which are arranged at intervals, the plurality of plating layers comprise a first plating layer and a second plating layer, the first plating layer covers the surface of the first bonding pad, the second plating layer covers the surface of the second bonding pad, the first lead is electrically connected between the conductive bus and the first plating layer, and the second lead is electrically connected between the conductive bus and the second plating layer; the plated area of the first bonding pad is larger than the plated area of the second bonding pad, and the resistance of the first lead is smaller than the resistance of the second lead. The circuit board and the manufacturing method of the circuit board can achieve the purposes of balancing the thickness of the bonding pad plating layer and improving the performance of products.

Description

Circuit board and manufacturing method thereof

Technical Field

The application relates to the technical field of circuit boards, in particular to a circuit board and a manufacturing method of the circuit board.

Background

A circuit board, also known as a printed circuit board or printed wiring board, is typically provided with a plurality of pads, which are small areas for soldering pins of a part, the plurality of pads being of different sizes, each pad being electrically connected together by conductive leads.

In the related art, nickel-Gold is plated at the position of a bonding pad, and nickel-Gold (Electrolytic Nickel/Gold) plating is a surface treatment process of a circuit board, wherein a layer of nickel is plated on a copper conductor on the surface of the circuit board, and then a layer of Gold is plated, wherein the nickel layer can be used for forming a welding spot, and can also prevent diffusion between the Gold and the copper, and the nickel layer can be protected by the Gold layer to prevent oxidation.

However, the plating layers of the circuit board have different thicknesses, which affect the performance of the bonding pad and cause poor soldering.

Disclosure of Invention

The application provides a circuit board and a manufacturing method of the circuit board, which are used for solving the problems that the thickness of a plating layer of the circuit board is different, the performance of a bonding pad can be influenced and poor welding is caused.

In one aspect, the present application provides a circuit board comprising a substrate, a conductive bus, a plurality of conductive leads, a plurality of pads, and a plurality of plating layers;

the substrate comprises a conductive bus, conductive leads, a bonding pad and a plurality of plating layers, wherein the plurality of conductive leads comprise a first lead and a second lead, the plurality of bonding pads comprise a first bonding pad and a second bonding pad which are arranged at intervals, the plurality of plating layers comprise a first plating layer and a second plating layer, the first plating layer covers the surface of the first bonding pad, the second plating layer covers the surface of the second bonding pad, one end of the first lead is electrically connected with the conductive bus, the other end of the first lead is electrically connected with the first plating layer, one end of the second lead is electrically connected with the conductive bus, and the other end of the second lead is electrically connected with the second plating layer;

the plated area of the first bonding pad is larger than the plated area of the second bonding pad, and the resistance of the first lead is smaller than the resistance of the second lead.

The circuit board that this application provided, conductive bus, conductive lead and pad equipartition locate the base plate, and the pad passes through conductive lead and connects in conductive bus to form the cladding material in the circular telegram of pad position, and change the current density of pad through the resistance of the conductive lead that changes different pad connections, thereby change the thickness that forms the cladding material on the pad, reach balanced pad cladding material thickness, improve the purpose of product performance. Specifically, the conductive lead comprises a first lead and a second lead, the bonding pad comprises a first bonding pad and a second bonding pad which are arranged at intervals, the plurality of plating layers comprise a first plating layer and a second plating layer, the first plating layer is covered on the surface of the first bonding pad, the second plating layer is covered on the surface of the second bonding pad, one end of the first lead is electrically connected with a conductive bus, the other end of the first lead is electrically connected with the first plating layer, one end of the second lead is electrically connected with the conductive bus, the other end of the second lead is electrically connected with the second plating layer, the plated area of the first bonding pad is larger than the plated area of the second bonding pad, the resistance of the first lead is smaller than the resistance of the second lead, thus, different conductive leads on the same conductive bus can conduct currents of different sizes, the current conducted by the first lead is larger than the current conducted by the second lead, the current density difference between the first bonding pad and the second bonding pad can be reduced, and the thickness difference of the formed plating layer is reduced.

In one possible implementation, the ratio of the plated area of the first pad to the plated area of the second pad is a preset value.

In one possible implementation, the first pad and the second pad are rectangular pads, the length of the first pad is equal to the length of the second pad, and the ratio of the width of the first pad to the width of the second pad is a preset value.

In one possible implementation, the resistance ratio of the first lead and the second lead is the inverse of the preset value.

In one possible implementation, the electrical conductivity of the first lead is equal to the electrical conductivity of the second lead, the length of the first lead is equal to the length of the second lead, and the ratio of the cross-sectional area of the first lead to the cross-sectional area of the second lead is a preset value.

In one possible implementation, the first lead and the second lead are rectangular in cross-sectional shape, the thickness of the first lead is equal to the thickness of the second lead, and the ratio of the width of the first lead to the width of the second lead is a preset value.

In one possible implementation, the cross-sectional area of the first lead is equal to the cross-sectional area of the second lead, the electrical conductivity of the first lead is equal to the electrical conductivity of the second lead, and the ratio of the length of the first lead to the length of the second lead is the inverse of the preset value.

On the other hand, the application provides a manufacturing method of a circuit board, which is used for manufacturing the circuit board provided by any one of the implementation modes, and the manufacturing method comprises the following steps:

manufacturing a conductive bus, a first bonding pad and a second bonding pad on a substrate, wherein the distance between the first bonding pad and the conductive bus is equal to the distance between the second bonding pad and the conductive bus;

acquiring a plated area S of a first bonding pad ₁ And the plated area S of the second bonding pad ₂ Is a ratio of (2);

according to the plated area S of the first bonding pad ₁ And the plated area S of the second bonding pad ₂ Is used to determine the cross-sectional area s of the first lead ₁ And the cross-sectional area s of the second lead ₂ Is a ratio of (2);

preparing a first lead and a second lead on a substrate;

a first plating layer and a second plating layer are formed on the first pad and the second pad, respectively.

According to the manufacturing method of the circuit board, the current density of the bonding pad is changed by changing the resistances of the conductive leads connected with different bonding pads, so that the thickness of a plating layer formed on the bonding pad is changed, the purpose of balancing the thickness of the plating layer of the bonding pad and improving the performance of a product is achieved. Specifically, a conductive bus, a first bonding pad and a second bonding pad are manufactured on a substrate, wherein the distance between the first bonding pad and the conductive bus is equal to the distance between the second bonding pad and the conductive bus, so that design layout is facilitated, and the length of a first lead and the length of a second lead are set to be the same value; acquiring a plated area S of a first bonding pad ₁ And the plated area S of the second bonding pad ₂ Ratio of (2) to obtain a firstA ratio of a current of the pad to a current of the second pad; according to the plated area S of the first bonding pad ₁ And the plated area S of the second bonding pad ₂ Is used to determine the cross-sectional area s of the first lead ₁ And the cross-sectional area s of the second lead ₂ To equalize the current density of the first pad and the current density of the second pad; the cross section shape of the conductive lead can be determined according to actual conditions, the values such as the thickness, the width and the like of the conductive lead are determined, and the first lead and the second lead are manufactured on the substrate; and the thickness of the plating layers prepared on the first bonding pad and the second bonding pad is equal, so that the thickness of the plating layers of the disc can be effectively controlled, and the purpose of improving the product performance is achieved.

In one possible implementation, the plated area S of the first pad is obtained ₁ And the plated area S of the second bonding pad ₂ Comprises:

acquiring the length and the width of the first bonding pad, and acquiring the length and the width of the second bonding pad;

determining the plated area of the first bonding pad according to the product of the length and the width of the first bonding pad;

the plated area of the second pad is determined from the product of the length and the width of the second pad.

In one possible implementation, the plated area S according to the first bonding pad ₁ And the plated area S of the second bonding pad ₂ Is used to determine the cross-sectional area s of the first lead ₁ And the cross-sectional area s of the second lead ₂ Comprises:

according to the formula: i=60×p×s×σv/4000×k×d×η, i=u/R and r=ρ×l/S, determining the plated area S of the first pad ₁ Plated area S of the second bonding pad ₂ Cross-sectional area s of second lead ₂ Cross-sectional area s of first lead ₁ ；

Wherein I is the current of the plating layer; the density of the coating is the P; sigma is the thickness of the coating; s is the plated area of the bonding pad; v is the speed of the substrate movement; k is the electrochemical equivalent of the coating; d is the length of the electroplating bath; η is the current efficiency of the coating.

The construction of the present application, as well as other objects and advantages thereof, will be more readily understood from the description of the preferred embodiments taken in conjunction with the accompanying drawings.

Drawings

The foregoing and other objects, features and advantages of embodiments of the present application will become more readily apparent from the following detailed description, which proceeds with reference to the accompanying drawings. Embodiments of the present application will now be described, by way of example and not limitation, in the figures of the accompanying drawings, in which:

fig. 1 is a partial schematic view of a circuit board according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a bonding pad and conductive leads provided in an embodiment of the present application;

fig. 3 is a flowchart of a method for manufacturing a circuit board according to an embodiment of the present application;

fig. 4 is a flowchart of S200 in fig. 3.

Reference numerals:

100-a substrate; 200-conductive bus; 300-conductive leads; 310-a first lead; 320-a second lead; 400-bonding pads; 410-a first bonding pad; 420-a second bonding pad; 500-plating; 510-a first coating; 520-second plating layer.

Detailed Description

Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and intended for the purpose of explaining the present application and are not to be construed as limiting the present application.

A circuit board, also known as a printed circuit board or printed wiring board, is typically provided with a plurality of pads, which are small areas for soldering pins of a part, the plurality of pads being of different sizes, each pad being electrically connected together by conductive leads.

In the related art, nickel-Gold is plated at the position of a bonding pad, and nickel-Gold (Electrolytic Nickel/Gold) plating is a surface treatment process of a circuit board, wherein a layer of nickel is plated on a copper conductor on the surface of the circuit board, and then a layer of Gold is plated, wherein the nickel layer can be used for forming a welding spot, and can also prevent diffusion between the Gold and the copper, and the nickel layer can be protected by the Gold layer to prevent oxidation.

When other hardware conditions are unchanged, such as the anode material, the anode shape and the distance between the anode and the cathode, the influence conditions of the thickness of the gold and the nickel are mainly the concentration of the liquid medicine, the parameters of the plating solution and the current density, and the plating layers of the same circuit board are usually formed in the same plating bath, namely the concentration of the liquid medicine and the parameters of the plating solution are unchanged.

However, the conductive bus and the plurality of bonding pads are connected through the same conductive lead, the current of the plurality of bonding pads on the same conductive bus is basically equal in magnitude, and the thickness of the prepared plating layers is different, so that the performance of the bonding pads is affected, and the problems of poor welding, poor wear resistance of the plating layers and the like are caused.

In view of this, the embodiment of the application provides a circuit board and a manufacturing method of the circuit board, wherein a conductive bus, a conductive lead and a bonding pad of the circuit board are uniformly arranged on a substrate, the bonding pad is connected to the conductive bus through the conductive lead so as to form a plating layer at a bonding pad position, and the current density of the bonding pad is changed by changing the resistance of the conductive lead connected with different bonding pads, so that the thickness of the plating layer formed on the bonding pad is changed, and the purposes of balancing the thickness of the plating layer of the bonding pad and improving the product performance are achieved.

The circuit board assembly and the electronic device provided in the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

Example 1

Fig. 1 is a partial schematic view of a circuit board according to an embodiment of the present application. As shown in fig. 1, the embodiment of the present application provides a circuit board, which includes a substrate 100, a conductive bus 200, a plurality of conductive leads 300, a plurality of pads 400 and a plurality of plating layers 500, wherein the conductive bus 200, the conductive leads 300, the pads 400 and the plurality of plating layers 500 are uniformly arranged on the substrate 100, and the pads 400 are connected to the conductive bus 200 through the conductive leads 300, so that the plating layers 500 are formed at the positions of the pads 400 by electrifying, and the formed plating layers 500 cover the surface of the pads 400.

Wherein the plurality of conductive leads 300 includes a first lead 310 and a second lead 320, the plurality of pads 400 includes a first pad 410 and a second pad 420 that are disposed at intervals, the plurality of plating layers 500 includes a first plating layer 510 and a second plating layer 520, the first plating layer 510 covers the surface of the first pad 410, the second plating layer 520 covers the surface of the second pad 420, one end of the first lead is electrically connected to the conductive bus, the other end of the first lead is electrically connected to the first plating layer 510, one end of the second lead is electrically connected to the conductive bus, and the other end of the second lead is electrically connected to the second plating layer 520; the plated area of the first pad 410 is greater than the plated area of the second pad 420, and the resistance of the first lead 310 is less than the resistance of the second lead 320.

The same voltage provided by the same conductive bus 200 is the same, as known by ohm' S law (i=u/R), the smaller the resistance is, the larger the current is, after the resistance of the first lead 310 is set smaller than the resistance of the second lead 320, the different conductive leads 300 on the same conductive bus 200 can conduct different magnitudes of current, the current conducted by the first lead 310 is greater than the current conducted by the second lead 320, and the difference of current density (j=i/S) at the positions of the first bonding pad 410 and the second bonding pad 420 can be reduced, so that the thickness difference of the formed plating 500 is reduced, namely the thickness difference of the first plating 510 and the second plating 520 is reduced, and the purposes of balancing the thickness of the plating 500 of the bonding pad 400 and improving the product performance are achieved.

The plated area of the pad is the area of the formed plating region, and is smaller than or equal to the area of the pad.

For example, at least one first pad 410 and at least one second pad 420 may be disposed on the circuit board, one plating layer 500 may be disposed on one pad 400, or a plurality of plating layers 500 may be disposed on one pad 400 at intervals, as shown in fig. 1, two first pads 410 and one second pad 420 may be disposed on the circuit board, four second plating layers 520 may be disposed on the second pad 420 at intervals, or a third pad 400 and a fourth pad 400 may be disposed on the circuit board, etc., and plated areas of the first pad 410, the second pad 420, the third pad 400 and the fourth pad 400 may be different from each other, and the embodiment is not limited with respect to the specific number and kind of the pads 400.

Fig. 2 is a schematic diagram of a bonding pad and a conductive lead according to an embodiment of the present application. As shown in fig. 2, a first pad 410 and a second pad 420 are connected to the same conductive bus 200, the first pad 410 is connected to the conductive bus 200 through a first lead 310, and the second pad 420 is connected to the conductive lead 300 through a second lead 320. Wherein the plated area of the first pad 410 is S ₁ Length L ₁ Width is M ₁ The second bonding pad 420 is the area S ₂ Length L ₂ Width is M ₂ The first lead 310 has a length of l ₁ Width of m ₁ The second lead 320 has a length of l ₂ Width of m ₂ 。

Exemplary, plated area S of first pad ₁ And the plated area S of the second bonding pad ₂ The ratio may be a predetermined value, and when the shapes of the pads 400 are different, the plated areas of the pads 400 may be calculated or estimated by different formulas.

Specifically, the first pad 410 and the second pad 420 may be rectangular pads 400, where the plated area S of the pads 400=the length L of the pads 400×the width M of the pads 400, and in practical applications, the length L of the first pad 410 is for ease of manufacturing ₁ May be equal to the length L of the second pad 420 ₂ Width M of first pad 410 ₁ And width M of second pad 420 ₂ The ratio is a preset value, so that the plated area ratio of the bonding pad 400 can be obtained by only measuring the width of the bonding pad 400, the specific plated area is not required to be calculated, the measurement is convenient, and the data acquisition is easy.

The calculation formula of the current density is j=i/S, where J is the current density, I is the current, a is the area, S is the area, and if the current density of the first pad 410 and the current density of the second pad 420 are equal, the current ratio of the current of the first lead 310 and the current of the second lead 320 needs to be a preset value.

As is known from ohm's law (i=u/R), when the voltages are the same and the ratio of the current of the first lead 310 to the current of the second lead 320 is a preset value, the ratio of the resistance of the first lead 310 to the resistance of the second lead 320 needs to be the inverse of the preset value.

The calculation formula of the resistance is r=ρ×l/s, where R is a resistance value, commonly used unit Ω, ρ is a resistivity, commonly used unit Ω·m, s is a cross-sectional area, commonly used unit square meter, l is a length of the wire, commonly used unit m, and it is known that the magnitude of the resistance is related to the cross-sectional area s of the conductive lead 300, the length l of the conductive lead 300, and the material (resistivity ρ) of the conductive lead 300, and each manner of changing the resistance of the conductive lead 300 will be discussed below.

In some examples, the resistance of conductive lead 300 may be varied by varying the cross-sectional area s of conductive lead 300. At this time, the electrical conductivity of the first lead 310 may be equal to that of the second lead 320, i.e., the first lead 310 and the second lead 320 may be made of the same material, the length of the first lead 310 may be equal to that of the second lead 320, and the ratio of the cross-sectional area of the first lead 310 to the cross-sectional area of the second lead 320 is a preset value.

Specifically, the cross-sectional shapes of the first lead 310 and the second lead 320 may be rectangular, the rectangular lead is simple in shape and convenient to manufacture, the thickness of the first lead 310 may be equal to the thickness of the second lead 320, the first lead 310 and the second lead 320 may be manufactured by etching or other processes, and the thicknesses of the first lead 310 and the second lead 320 are the same, and the thicknesses do not need to be additionally adjusted, so that the ratio of the width of the first lead 310 to the width of the second lead 320 is required to be a preset value, and the ratio of the resistance of the first lead 310 to the resistance of the second lead 320 is the inverse of the preset value.

In other examples, the resistance of conductive lead 300 may be varied by varying the length l of conductive lead 300. The cross-sectional area of the first lead 310 may be equal to the cross-sectional area of the second lead 320, and the electrical conductivity of the first lead 310 may be equal to the electrical conductivity of the second lead 320, so that the ratio of the length of the first lead 310 to the length of the second lead 320 is the reciprocal of a predetermined value, such that the ratio of the resistance of the first lead 310 to the resistance of the second lead 320 is the reciprocal of the predetermined value.

Specifically, the pitch of the first pads 410 and the conductive bus 200 and the pitch of the second pads 420 and the conductive bus 200 may be equal, the longer conductive leads 300 may be designed to be curved, or the pitch of the first pads 410 and the conductive bus 200 and the pitch of the second pads 420 and the conductive bus 200 may be unequal, and thus, the conductive leads 300 may be designed to be straight.

Alternatively, the resistance of the conductive lead 300 may be varied by varying the electrical conductivity ρ of the conductive lead 300. The cross-sectional area of the first lead 310 is equal to the cross-sectional area of the second lead 320, and the length of the first lead 310 is equal to the length of the second lead 320, so that the ratio of the electrical conductivity of the first lead 310 to the electrical conductivity of the second lead 320 is the inverse of the preset value, such that the ratio of the electrical resistance of the first lead 310 to the electrical resistance of the second lead 320 is the inverse of the preset value.

It should be noted that, in the actual manufacturing process, the first lead 310 and the second lead 320 may be made of the same material at the same step, so as to simplify the manufacturing process, and the distance between the first pad 410 and the conductive bus 200 and the distance between the second pad 420 and the conductive bus 200 may be equal, so as to improve the cleanliness of the board and facilitate typesetting. Therefore, the resistance of the conductive lead 300 is adjusted by adjusting the cross-sectional area of the conductive lead 300, so that the change is small, the manufacture is convenient, and the feasibility is higher.

Example two

Fig. 3 is a flowchart of a method for manufacturing a circuit board according to an embodiment of the present application. As shown in fig. 3, an embodiment of the present application provides a method for manufacturing a circuit board, where the method for manufacturing a circuit board provided in the first embodiment includes:

and S100, manufacturing a conductive bus, a first bonding pad and a second bonding pad on the substrate, wherein the distance between the first bonding pad and the conductive bus is equal to the distance between the second bonding pad and the conductive bus, so that design layout is facilitated, and the length of the first lead 310 and the length of the second lead 320 are also facilitated to be set to be the same value.

S200, obtaining a plated area S of the first bonding pad ₁ And the plated area S of the second bonding pad ₂ The current densities of the two pads 400 need to be equal so that the ratio of the current of the first pad 410 to the current of the second pad 420 can be determined from the ratio of the areas.

Fig. 4 is a flowchart of S200 in fig. 3.As shown in fig. 4, the first pad 410 and the second pad 420 may be rectangular pads 400, and the plated area S of the first pad 410 is obtained ₁ And the plated area S of the second pad 420 ₂ Comprises:

s210, acquiring the length and the width of the first bonding pad and the length and the width of the second bonding pad;

s220, determining the plated area of the first bonding pad according to the product of the length and the width of the first bonding pad;

s230, determining the plated area of the second bonding pad according to the product of the length and the width of the second bonding pad so as to provide a specific plated area calculation mode. When the lengths of the bonding pads 400 are equal, the ratio of the plated areas of the bonding pads 400 can be obtained by measuring the widths of the bonding pads 400, the specific plated area value is not required to be calculated, the measurement and calculation are convenient, and the data acquisition is easy.

S300, according to the plated area S of the first bonding pad ₁ And the plated area S of the second bonding pad ₂ Is used to determine the cross-sectional area s of the first lead ₁ And the cross-sectional area s of the second lead ₂ The resistance of the conductive leads 300 is changed by changing the cross-sectional areas of the conductive leads 300 connected with different bonding pads 400, and the current density of the bonding pads 400 is changed, so that the thickness of the plating layer 500 formed on the bonding pads 400 is changed, and the purposes of balancing the thickness of the plating layer 500 of the bonding pads 400 and improving the product performance are achieved.

Wherein, according to the plated area S of the first bonding pad 410 ₁ And the plated area S of the second pad 420 ₂ Is used to determine the cross-sectional area s of the first lead 310 ₁ And cross-sectional area s of second lead 320 ₂ Comprises:

s310, according to the formula: i=60×p×s×σv/4000×k×d×η, i=u/R and r=ρ×l/S, determining the plated area S of the first pad 410 ₁ Plated area S of the second pad 420 ₂ Cross-sectional area s of second lead 320 ₂ Cross-sectional area s of first lead 310 ₁ ；

Wherein I is the current of the plating layer 500; the density of the coating 500 is the density of the coating, and the density of Ni is 8.908g/cm < 3 >; the Au density is 19.32g/cm3; sigma is the thickness of the coating 500; s is the plated area of the bonding pad 400; v is the speed at which the substrate 100 moves; k is the electrochemical equivalent of the plating layer 500, and Ni is 1.095g/AH; the electrochemical equivalent weight of Au is 7.349g/AH; d is the length (unit m) of the plating tank; η is the current efficiency of the plating 500. Since the plating bath and other equipment, the speed of movement of the substrate 100, and the gold/nickel thickness requirements are the same, the current I is only related to the plated area S of the pad 400.

S400, manufacturing a first lead and a second lead on the substrate. The cross-sectional shape of the conductive lead 300 may be specifically determined according to actual conditions, and the cross-sectional shape of the conductive lead 300 may be rectangular, and then the thickness of the conductive lead 300 may be determined according to the requirements of wear resistance and the like, thereby determining the width of the conductive lead 300.

S500, respectively manufacturing a first plating layer 510 and a second plating layer 520 on the first bonding pad and the second bonding pad, wherein the plating layer 500 can be used as a welding base to facilitate subsequent welding, and the thickness of the first plating layer 510 and the thickness of the second plating layer 520 can be equal to effectively control the thickness of the plate plating layer 500 and improve the product performance.

In addition, the structure and function of the circuit board are described in detail in the first embodiment, and are not described here again.

In the description of the present application, it should be understood that the terms "thickness," "length," "width," and the like indicate an orientation or a positional relationship based on that shown in the drawings, and are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present application.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless explicitly defined otherwise.

In this application, unless explicitly stated and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrated; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

In the description of the present specification, reference to the term "embodiment" or "example" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

Finally, it should be noted that: the above embodiments are merely for illustrating the technical solution of the present application, and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced with equivalents; such modifications and substitutions do not depart from the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims (10)

1. The circuit board is characterized by comprising a substrate, a conductive bus, a plurality of conductive leads, a plurality of bonding pads and a plurality of plating layers;

the conductive bus, the conductive leads, the bonding pads and the plating layers are uniformly distributed on the substrate, the conductive leads comprise a first lead and a second lead, the bonding pads comprise a first bonding pad and a second bonding pad which are arranged at intervals, the plating layers comprise a first plating layer and a second plating layer, the first plating layer covers the surface of the first bonding pad, the second plating layer covers the surface of the second bonding pad, one end of the first lead is electrically connected with the conductive bus, the other end of the first lead is electrically connected with the first plating layer, one end of the second lead is electrically connected with the conductive bus, and the other end of the second lead is electrically connected with the second plating layer;

the plated area of the first bonding pad is larger than the plated area of the second bonding pad, and the resistance of the first lead is smaller than the resistance of the second lead.

2. The circuit board of claim 1, wherein a plated area ratio of the first pad to the second pad is a preset value.

3. The circuit board of claim 2, wherein the first pad and the second pad are rectangular pads, a length of the first pad is equal to a length of the second pad, and a width ratio of the first pad to the second pad is a preset value.

4. A circuit board according to claim 2 or 3, wherein the ratio of the resistance of the first lead to the resistance of the second lead is the inverse of a predetermined value.

5. The circuit board of claim 4, wherein the electrical conductivity of the first lead is equal to the electrical conductivity of the second lead, the length of the first lead is equal to the length of the second lead, and the ratio of the cross-sectional area of the first lead to the cross-sectional area of the second lead is a preset value.

6. The circuit board of claim 5, wherein the first and second leads each have a rectangular cross-sectional shape, the thickness of the first lead being equal to the thickness of the second lead, the ratio of the width of the first lead to the width of the second lead being a predetermined value.

7. The circuit board of claim 4, wherein a cross-sectional area of the first lead is equal to a cross-sectional area of the second lead, a conductivity of the first lead is equal to a conductivity of the second lead, and a ratio of a length of the first lead to a length of the second lead is an inverse of a preset value.

8. A method for manufacturing a circuit board according to any one of claims 1 to 6, comprising:

manufacturing a conductive bus, a first bonding pad and a second bonding pad on a substrate, wherein the distance between the first bonding pad and the conductive bus is equal to the distance between the second bonding pad and the conductive bus;

acquiring a plated area S of the first bonding pad ₁ And the plated area S of the second bonding pad ₂ Is a ratio of (2);

according to the plated area S of the first bonding pad ₁ And the plated area S of the second bonding pad ₂ Is used to determine the cross-sectional area s of the first lead ₁ And the cross-sectional area s of the second lead ₂ Is a ratio of (2);

forming the first and second leads on a substrate;

and respectively preparing a first plating layer and a second plating layer on the first bonding pad and the second bonding pad.

9. The method for manufacturing a circuit board according to claim 8, wherein a plated area S of the first pad is obtained ₁ And the plated area S of the second bonding pad ₂ Comprises:

acquiring the length and the width of the first bonding pad and acquiring the length and the width of the second bonding pad;

determining the plated area of the first bonding pad according to the product of the length and the width of the first bonding pad;

and determining the plated area of the second bonding pad according to the product of the length and the width of the second bonding pad.

10. The method for manufacturing a circuit board according to claim 8, wherein the plated area S of the first bonding pad is as follows ₁ And the plated area S of the second bonding pad ₂ Is used to determine the cross-sectional area s of the first lead ₁ And the cross-sectional area s of the second lead ₂ Comprises:

according to the formula: i=60×p×s×σv/4000×k×d×η, i=u/R and r=ρ×l/S, determining the plated area S of the first pad ₁ Plated area S of the second bonding pad ₂ Cross-sectional area s of second lead ₂ Cross-sectional area s of first lead ₁ ；

Wherein I is the current of the plating layer; the density of the coating is the P; sigma is the thickness of the coating; s is the plated area of the bonding pad; v is the speed of the substrate movement; k is the electrochemical equivalent of the coating; d is the length of the electroplating bath; η is the current efficiency of the coating.

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