CN116131417B - Equalization circuit, equalization control method and charger - Google Patents

Equalization circuit, equalization control method and charger Download PDF

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Publication number
CN116131417B
CN116131417B CN202310418479.XA CN202310418479A CN116131417B CN 116131417 B CN116131417 B CN 116131417B CN 202310418479 A CN202310418479 A CN 202310418479A CN 116131417 B CN116131417 B CN 116131417B
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Prior art keywords
switch
group
cell
battery
battery pack
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CN116131417A (en
Inventor
姜钊
李鹏
蒋建军
陈岱岱
李海威
张翼
虞益挺
胡晓东
苏静燕
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Ningbo Junsheng New Energy Research Institute Co ltd
Northwestern Polytechnical University
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Ningbo Junsheng New Energy Research Institute Co ltd
Northwestern Polytechnical University
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Priority to CN202310418479.XA priority Critical patent/CN116131417B/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014Circuits for equalisation of charge between batteries
    • H02J7/0016Circuits for equalisation of charge between batteries using shunting, discharge or bypass circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/44Methods for charging or discharging
    • H01M10/441Methods for charging or discharging for several batteries or cells simultaneously or sequentially
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007Regulation of charging or discharging current or voltage
    • H02J7/00712Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/007182Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The invention provides an equalization circuit, an equalization control method and a charger, and relates to the technical field of automobile parts. The equalizing circuit comprises three filter capacitors; three switch arrays in the battery pack, which are arranged in one-to-one correspondence with the three filter capacitors; a first switch; a second switch; a third switch; a fourth switch; the first bidirectional converter comprises a first port and a second port, wherein two ends of the first port of the first bidirectional converter are connected with the third filter capacitor, and two ends of the second port of the first bidirectional converter are connected with the first filter capacitor; the second bidirectional converter comprises a first port and a second port, wherein two ends of the first port of the second bidirectional converter are connected with the third filter capacitor, and two ends of the second port of the second bidirectional converter are connected with the second filter capacitor. By applying the technical scheme provided by the embodiment of the invention, the battery equalization speed can be improved.

Description

Equalization circuit, equalization control method and charger
Technical Field
The invention relates to the technical field of automobile parts, in particular to an equalization circuit, an equalization control method and a charger.
Background
Lithium ion batteries have become the best choice for energy storage systems for electric vehicles and the like due to their excellent performance. Due to differences in manufacturing and use environments, there is an inconsistency between different cells in the same battery pack, and as time passes, the inconsistency between the cells increases, resulting in a loss of capacity of the battery pack, and eventually, a reduction in battery life. Among the battery management techniques, a battery equalization technique is used to reduce the inconsistency between batteries to reduce the battery decay rate. The battery equalization speed is taken as an important index of a battery equalization technology, and is one of key factors influencing the service life of the lithium ion battery.
Conventional equalization techniques generally employ a means of transmitting energy to adjacent cells by one cell, and in order to increase the equalization speed of the battery, an active equalization technique for realizing energy transmission between the battery cell and the battery pack has been proposed, but there are other problems in the technique: along with the development of the fast charge technology, the voltage of the battery pack is higher and higher, the voltage difference between the voltage of a single battery cell and the battery pack is larger, the requirement can be met by having high voltage gain and an isolated balanced topology, the voltage gain can be improved by increasing the turn ratio, the controllable degree of freedom is provided, but higher requirements are put forward on the design of a transformer and the type selection of devices, and the reliability cannot be ensured.
Disclosure of Invention
The embodiment of the invention provides an equalization circuit, an equalization control method and a charger, which can improve the equalization speed of a battery.
In a first aspect, an embodiment of the present invention provides an equalization circuit, including:
the three filter capacitors comprise a first filter capacitor, a second filter capacitor and a third filter capacitor;
the three battery group internal switch arrays are arranged in one-to-one correspondence with the three filter capacitors and comprise a first battery group internal switch array, a second battery group internal switch array and a third battery group internal switch array; each switch array in the battery pack comprises two ends; the two ends of the switch array in the battery pack are respectively connected with the corresponding filter capacitors;
the first path switch comprises a first end and a second end; the first end of the first path switch is connected with the second end of the first filter capacitor; the second end of the first path switch is connected with the first end of the second filter capacitor;
a second switch including a first end and a second end; the first end of the second switch is connected with one end of the switch array in the first battery pack; the second end of the second switch is connected with the switch array in the second battery pack;
A third switch comprising a first end and a second end; the first end of the third switch is connected with the first end of the first switch; the second end of the third switch is connected with the first end of the second switch;
a fourth switch including a first terminal and a second terminal; the first end of the fourth path switch is connected with the second end of the first path switch; the second end of the fourth switch is connected with the second end of the second switch;
the first bidirectional converter comprises a first port and a second port, two ends of the first port of the first bidirectional converter are connected with the third filter capacitor, and two ends of the second port of the first bidirectional converter are connected with the first filter capacitor;
the second bidirectional converter comprises a first port and a second port, two ends of the first port of the second bidirectional converter are connected with the third filter capacitor, and two ends of the second port of the second bidirectional converter are connected with the second filter capacitor.
In one embodiment, the first bidirectional converter comprises a first transformer, a first power switching tube and a second power switching tube; the first transformer comprises a first primary winding and a first secondary winding;
The first end of the first primary winding and the second end of the first secondary winding are the same name ends; the first end of the first primary winding is connected with the first end of the third filter capacitor; the second end of the first primary winding is connected with the drain electrode of the first power switch tube; the source electrode of the first power switch tube is connected with the first negative electrode connecting end; the first end of the first secondary winding is connected with the first end of the first filter capacitor; the second end of the first secondary winding is connected with the drain electrode of the second power switch tube; the source stage of the second power switch tube is connected with the second end of the first filter capacitor; and the second end of the third filter capacitor is connected with the source electrode of the first power switch tube.
In one embodiment, the first primary winding comprises a field inductance; the second bidirectional converter multiplexes the excitation inductance and the first power switching tube; the second bidirectional converter further comprises a first capacitor, a second transformer, a second capacitor, a first inductor, a third power switch tube and a second filter capacitor;
the second transformer comprises a second primary winding and a second secondary winding; the first end of the first capacitor is connected with the drain electrode of the first power switch tube; the second end of the first capacitor is connected with the first end of the second primary winding; the second end of the second primary winding is connected with the source electrode of the first power switch tube; the first end of the second secondary winding is connected with the first end of the second capacitor; the second end of the second capacitor is connected with the first end of the first inductor; the first end of the second primary winding and the first end of the second secondary winding are the same name end, the second end of the first inductor is connected with the second end of the second secondary winding, the source electrode of the third power switch tube is connected with the first end of the first inductor, and the drain electrode of the third power switch tube is connected with the first end of the second filter capacitor; the second end of the second filter capacitor is connected with the second end of the second secondary winding; and the first end of the second filter capacitor is connected with the second end of the first path switch.
In one embodiment, the first switch and the second switch respectively correspond to two switches of a first double-pole single-throw switch; and/or the third switch and the fourth switch respectively correspond to two switches of a second double-pole single-throw switch.
The equalization circuit provided by the embodiment of the invention can realize equalization among three battery packs, so that the equalization speed is improved.
In a second aspect, an embodiment of the present application further provides an equalization control method, which is based on the equalization circuit. The equalization control method comprises the following steps:
judging whether the inter-group pressure difference between each battery group is larger than a first preset value or not;
controlling the equalization circuit to work in an inter-group active equalization mode in response to determining that the inter-group voltage difference between each battery group is greater than the first preset value until the inter-group voltage difference is less than or equal to the first preset value;
for each battery pack, determining the absolute value of the voltage difference between each cell voltage in the battery pack and the average value of the cell voltages in the corresponding battery pack as the voltage difference in the battery pack corresponding to each cell;
judging whether the group internal pressure difference corresponding to each battery cell is larger than a second preset value for each battery group;
In response to determining that the intra-group voltage difference corresponding to each cell is larger than a second preset value, controlling the equalization circuit to work in an intra-group active equalization mode until the intra-group voltage difference corresponding to each cell is smaller than or equal to the second preset value;
judging whether the group internal pressure difference corresponding to each cell is larger than a third preset value or not;
and controlling the equalization circuit to work in a passive equalization mode in the group in response to the fact that the intra-group pressure difference corresponding to each cell is larger than the third preset value, until the average value of the intra-group pressure differences corresponding to each cell is smaller than or equal to the third preset value.
In one embodiment, the controlling the equalization circuit to operate in an inter-group active equalization mode in response to determining that the inter-group voltage difference between the battery packs is greater than the first preset value until the inter-group voltage difference is less than or equal to the first preset value includes:
responding to the judgment that the intra-group pressure difference of each battery pack is larger than a second preset value, and sequencing the voltage values of each battery pack to obtain sequencing results;
controlling the working directions of a first bidirectional converter and a second bidirectional converter of the equalizing circuit according to the sequencing result, and controlling the on-off of a first switch, a second switch, a third switch and a fourth switch of the equalizing circuit;
Judging whether the inter-group pressure difference between each battery group is smaller than or equal to a first preset value;
and controlling the equalization circuit to stop working in an inter-group active equalization mode in response to the fact that the inter-group voltage difference between the battery packs is smaller than or equal to the first preset value.
In one embodiment, the controlling the working directions of the first bidirectional converter and the second bidirectional converter of the equalization circuit according to the sequencing result, and controlling the on-off of the first switch, the second switch, the third switch and the fourth switch of the equalization circuit includes:
when the voltage of the third battery pack is larger than the voltage of the first battery pack and the voltage of the first battery pack is larger than the voltage of the second battery pack, the first path switch and the second path switch are controlled to be opened, the third path switch and the fourth path switch are controlled to be closed, and the working directions of the first bidirectional converter and the second bidirectional converter are controlled to be positive directions;
when the voltage of the third battery pack is larger than the voltage of the first battery pack and the voltage of the first battery pack is equal to the voltage of the second battery pack, the first path switch and the second path switch are controlled to be closed, the third path switch and the fourth path switch are controlled to be opened, and the working directions of the first bidirectional converter and the second bidirectional converter are controlled to be positive;
When the voltage of the third battery pack is smaller than the voltage of the second battery pack and the voltage of the second battery pack is smaller than the voltage of the first battery pack, the first path switch and the second path switch are controlled to be closed, the third path switch and the fourth path switch are controlled to be opened, and the working directions of the first bidirectional converter and the second bidirectional converter are controlled to be reverse.
In one embodiment, each of the intra-battery switch arrays of the equalization circuit includes 2M double N-type MOSFETs; m is the number of cells in the battery pack; the positive electrode and the negative electrode of each battery cell in each battery pack are respectively connected to filter capacitors connected to the two ends of the switch array in the corresponding battery pack through a double-N-type MOSFET;
and controlling the equalization circuit to work in an active equalization mode in the group in response to determining that the intra-group voltage difference corresponding to each cell is greater than a second preset value until the intra-group voltage difference corresponding to each cell is less than or equal to the second preset value, including:
in response to determining that the voltage difference in the group corresponding to each battery cell is larger than a second preset value, determining a battery cell to be supplemented and a battery cell to be discharged according to the voltage difference between the voltage of each battery cell in each battery group and the average value of the voltage of the battery cells; in an active equalization mode in a group, the first switch and the second switch are in an open state, and the third switch and the fourth switch are in a closed state;
Controlling the on-off of two double-N-type MOSFETs connected with the positive electrode and the negative electrode of the corresponding battery cell according to a preset control strategy, so that a discharging loop is formed by the positive electrode and the negative electrode of the battery cell to be discharged and the filter capacitors connected with the two ends of the switch array in the corresponding battery pack in a half period of a switch signal, and a power supplementing loop is formed by the positive electrode and the negative electrode of the battery cell to be supplemented and the filter capacitors connected with the two ends of the switch array in the corresponding battery pack in the other half period of the switch signal;
judging whether the group internal pressure difference corresponding to each cell is smaller than or equal to the second preset value;
and controlling the equalization circuit to stop working in an active equalization mode in the group in response to the fact that the intra-group voltage difference corresponding to each cell is smaller than or equal to the second preset value.
In one embodiment, each of the intra-battery switch arrays of the equalization circuit includes 2M double N-type MOSFETs; m is the number of cells in the battery pack; the positive electrode and the negative electrode of each battery cell in each battery pack are respectively connected to filter capacitors connected to the two ends of the switch array in the corresponding battery pack through a double-N-type MOSFET;
and controlling the equalization circuit to work in the passive equalization mode in the group in response to determining that the intra-group differential pressure corresponding to each cell is greater than the third preset value until the average value of the intra-group differential pressures corresponding to each cell is less than or equal to the third preset value, including:
In response to determining that the intra-group voltage difference corresponding to each cell is greater than the third preset value, respectively controlling driving voltages of the double-N-type MOSFET connected with the positive electrode of the corresponding cell and the double-N-type MOSFET connected with the positive electrode of the adjacent cell according to the voltage value of each cell so as to enable the positive electrode of the corresponding cell, the double-N-type MOSFET connected with the positive electrode of the adjacent cell and the negative electrode of the corresponding cell to form an energy absorption loop;
judging whether the group internal pressure difference corresponding to each cell is smaller than or equal to the third preset value;
and controlling the equalization circuit to stop working in the passive equalization mode in the group in response to the fact that the voltage difference in the group corresponding to each cell is smaller than or equal to the third preset value.
According to the equalization control method provided by the embodiment of the invention, the inter-group equalization can improve the equalization speed, the intra-group active equalization can quickly reduce the pressure difference between the battery cells, and the intra-group passive equalization can further shorten the pressure difference between the battery cells, so that the level heights of the battery cells in the battery pack are consistent, and the service life of the battery is prolonged. The active and passive mixed equalization effect can be realized, when the active equalization enables the battery cell level to be balanced rapidly, the passive equalization intervention is performed after the active equalization can not be triggered due to the small pressure difference, and the battery cell SOC level consistency is improved.
In a third aspect, an embodiment of the present invention further provides a charger, where the charger includes the equalization circuit described in any one of the embodiments. The charger has the same advantages as the equalization circuit compared with the prior art, and is not described in detail herein.
Drawings
Fig. 1 is a schematic diagram of an equalization circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an equalization circuit provided in an embodiment of the present invention when K1 is closed and K2 is open;
FIG. 3 is a schematic diagram of an equalization circuit provided in an embodiment of the present invention when K1 is open and K2 is closed;
FIG. 4 is a schematic diagram of a single capacitor equalization mode according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a passive equalization mode according to an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating connection between a bidirectional conversion unit and a filter capacitor according to an embodiment of the present invention;
FIG. 7 is a schematic diagram illustrating connection between a bidirectional conversion unit and a filter capacitor according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a battery switch structure according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a switching tube working state during discharging a battery cell according to an embodiment of the present invention;
fig. 10 is a schematic diagram of a working state of a switching tube when a battery cell is charged according to an embodiment of the present invention;
Fig. 11 is a schematic flow chart of an equalization control method according to an embodiment of the present invention;
FIG. 12 is a policy block diagram of a multi-modal balancing method according to an embodiment of the present invention;
fig. 13 is a block diagram of an inter-group active equalization control strategy according to an embodiment of the present invention;
fig. 14 is a block diagram of an intra-group active equalization control strategy according to an embodiment of the present invention;
fig. 15 is a block diagram of an intra-group passive equalization control strategy according to an embodiment of the present invention.
Description of the embodiments
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
As shown in fig. 1, the present embodiment provides an equalization circuit, which can perform battery equalization on the first battery set BT1_1 to BT1_n, the second battery set BT2_1 to BT2_n, and the third battery set BT3_1 to BT 3_n.
The equalization circuit comprises a first filter capacitor CE2, a second filter capacitor CE3, a third filter capacitor CE1, a first battery pack internal switch array arranged corresponding to the first filter capacitor CE2, a second battery pack internal switch array arranged corresponding to the second filter capacitor CE3, a third battery pack internal switch array arranged corresponding to the third filter capacitor CE1, a first double-pole single-throw switch K1, a second double-pole single-throw switch K2 and a bidirectional conversion unit.
The first double-pole single-throw switch K1 comprises a first path switch and a second path switch. The second double pole single throw switch K2 includes a third switch and a fourth switch. The first end of the first path switch is connected with the second end of the first filter capacitor CE2, and the second end of the first path switch is connected with the first end of the second filter capacitor CE 3; the first end of the second switch is connected with one end of the switch array in the first battery pack, and the second end of the second switch is connected with the switch array in the second battery pack; the first end of the third switch is connected with the first end of the first switch, and the second end of the third switch is connected with the first end of the second switch; the first end of the fourth switch is connected with the second end of the first switch, and the second end of the fourth switch is connected with the second end of the second switch.
As shown in connection with fig. 6 and 7, the bidirectional conversion unit includes a first bidirectional converter F1 and a second bidirectional converter F2. The first bidirectional converter F1 has a first port connected to the third filter capacitor CE1 and a second port connected to the first filter capacitor CE 2. Both ends of the first port of the second bidirectional converter F2 are connected to the third filter capacitor CE1, and both ends of the second port are connected to the second filter capacitor CE 3.
Specifically, the first bidirectional converter F1 includes a first transformer T1, a first power switching tube S1, and a second power switching tube S2, where the first transformer T1 includes a first primary winding and a first secondary winding, a first end of the first primary winding and a second end of the first secondary winding are identical-name ends, a first end of the first primary winding is connected to a first end of the third filter capacitor CE1, and a second end is connected to a drain electrode of the first power switching tube S1; the source electrode of the first power switch tube S1 is connected with the first negative electrode connecting end; the first end of the first secondary winding is connected with the first end of the first filter capacitor CE 2; the second end of the first secondary winding is connected with the drain of the second power switch tube S2; the source stage of the second power switch tube S2 is connected with the second end of the first filter capacitor CE 2; the second end of the third filter capacitor CE1 is connected to the source of the first power switch tube S1.
Specifically, the first primary winding includes an excitation inductance L1; one end of the excitation inductor L1 is connected with the first end of the first primary winding, and the other end of the excitation inductor L1 is connected with the second end of the first primary winding. The second bidirectional converter F2 multiplexes the excitation inductance L1 and the first power switching tube S1. The second bidirectional converter F2 further includes a first capacitor C1, a second transformer T2, a second capacitor C2, a first inductor L3, a third power switching tube S3, and a second filter capacitor CE3. The second transformer comprises a second primary winding and a second secondary winding, and the second primary winding comprises an excitation inductance L2; the first end of the first capacitor C1 is connected with the drain electrode of the first power switch tube S1; the second end of the first capacitor C1 is connected with the first end of the second primary winding; the second end of the second primary winding is connected with the source electrode of the first power switch tube S1; the first end of the second secondary winding is connected with the first end of the second capacitor C2; the second end of the second capacitor C2 is connected with the first end of the first inductor L3; the first end of the second primary winding and the first end of the second secondary winding are the same-name ends, the second end of the first inductor L3 is connected with the second end of the second secondary winding, the source electrode of the third power switch tube S3 is connected with the first end of the first inductor L3, and the drain electrode of the third power switch tube S3 is connected with the first end of the second filter capacitor CE 3; the second end of the second filter capacitor CE3 is connected with the second end of the second secondary winding; the first end of the second filter capacitor CE3 is connected to the second end of the first switch.
The two ends of the switch array in any battery pack are respectively connected with the corresponding filter capacitors, as shown in fig. 1, one end of the switch array in the first battery pack is connected with the first end of the first filter capacitor CE2, and the other end of the switch array in the first battery pack is connected with the second end of the first filter capacitor CE 2; one end of the switch array in the second battery pack is connected with the first end of the second filter capacitor CE3, and the other end of the switch array in the second battery pack is connected with the second end of the second filter capacitor CE 3; one end of the switch array in the third battery pack is connected with the first end of the third filter capacitor CE1, and the other end of the switch array in the third battery pack is connected with the second end of the third filter capacitor CE 1.
Specifically, the switch array in any battery pack comprises 2M double-N-type MOSFETs, M is the number of corresponding battery cells in the battery pack, and one battery cell is correspondingly arranged with the 2 double-N-type MOSFETs. It should be noted that the number M of the battery cells of different battery packs may be the same or different.
As shown in fig. 8 to 10, when the battery cells or the battery pack are charged or discharged, the number of the battery cells to be charged or discharged or the number of the battery cells of the series battery pack can be selected by controlling the on or off of the double N-channel MOSFET qn_j (N is the number of the series battery cells, j is the switch number 1 or 2). In fig. 8, v+ represents the positive electrode of the battery pack, V "represents the negative electrode of the battery pack, and as shown in fig. 1 to 3, the positive electrode of each battery pack and the negative electrode of the battery pack are connected to the both ends of the third filter capacitor CE1, the second filter capacitor CE3, and the third filter capacitor CE1, so that the battery balance between the battery packs can be achieved by the bidirectional conversion means.
Inside the double N-type MOSFET are two N-type MOSFETs which are reversely connected. The positive electrode and the negative electrode of each battery cell in each battery pack are respectively connected to filter capacitors connected to two ends of the switch array in the corresponding battery pack through a double N-type MOSFET.
The double N-type MOSFET can be externally connected with the double N-type MOSFET through the internal N-type MOSFET drain electrode, and also can be externally connected with the double N-type MOSFET through the partial N-type MOSFET source electrode, so that the battery core needs to correspondingly adjust the control of the internal N-type MOSFET of the double N-type MOSFET according to the discharging or charging requirement.
Illustratively, as shown in fig. 4 and 9, in the switch array in the first battery pack, the drain electrode of m1_1 of the double N-type MOSFET qx_1 is connected to the positive electrode of the cell b1_x of the first battery pack, and the drain electrode of m1_2 is connected to the first end of the first filter capacitor CE2, wherein 1+.ltoreq.x+.ltoreq.n. The source electrode of M2_1 of the double N-type MOSFET Qx_2 is connected with the cathode of the battery cell BT1_x of the first battery pack, and the source electrode of M2_2 is connected with the second end of the first filter capacitor CE2 through a third switch. When the cell B1_x needs to be discharged, M1_1 in the corresponding double-N-type MOSFET Qx_1 is conducted, M1_2 is closed, and a discharge current flows out of a body diode D1_2 of M1_2; m2_1 in the double N-type MOSFET qx_2 is turned on, m2_2 is turned off, and a discharge current flows from the body diode d2_2 of m2_2. Referring to fig. 10, when the cell bt1_y is charged, m1_1 in the corresponding dual N-type MOSFET qy_1 is turned off and m1_2 is turned on, and a charging current flows from the body diode d1_1 of m1_1; m2_1 in the double N-type MOSFET Qy_2 is turned off, M2_2 is turned on, and a charging current flows out of a body diode D2_1 of the M2_1, wherein y is more than or equal to 1 and less than or equal to N.
The equalization mode of the battery cells in the group can be a single-capacitance equalization mode or a passive mode.
In the single capacitance equalization mode, as shown in connection with fig. 4, the switch connects the capacitor alternately to one cell and its neighboring cells, or to the entire battery. The Pulse Width Modulated (PWM) signal of the switch will manage the distribution of battery energy. During half the period of the square wave, the higher voltage battery transfers energy to the capacitor. During the other half of the cycle, the battery receives energy from the capacitor. The capacitive balancing mode may be enabled without the need to use a bi-directional conversion unit or the bi-directional conversion unit failing, etc.
In the passive equalization mode, as shown in fig. 5, the MOSFET gate drive voltage is controlled to operate in the resistive region, with different drive voltages corresponding to different on-resistances, energy is extracted from each cell and converted to heat until all cells are equal to the lowest SOC cell. Because of the packaged form of the MOSFET, it does not require a large thermal management system compared to conventional resistive passive equalization.
Taking the example that the third battery BT3 charges the first battery BT1 and the second battery BT2, as shown in fig. 3, when the first power switch tube S1 is turned on and the K2 is turned off, the third battery BT3, the inductor L1 and the first power switch tube S1 form a loop 1, and the third battery BT3 charges the inductor L1; the primary side of the first capacitor C1, the first power switch tube S1 and the second transformer T2 form a loop 2, the first capacitor C1 discharges, and the secondary side of the second transformer T2, the second capacitor C2 and the inductor L3 form a loop 3 to charge the inductor L3; the first filter capacitor CE2 and the second filter capacitor CE3 charge the first battery BT1 and the second battery BT2, respectively; when the first power switch tube S1 is turned off and the switch K2 is turned on, the third battery pack BT3 charges the inductor L1 and the first capacitor C1, the second capacitor C2 charges, and the inductor L3 starts to discharge to charge the second filter capacitor CE 3; when the first power switch tube S1 is still kept to be cut off and the switch K2 is closed, the inductor L1 releases energy to be transmitted to the secondary side of the first transformer T1, and the first filter capacitor CE2 is charged at the moment; the second power switch tube S2 and the third power switch tube S3 are matched with the first power switch tube S1 to realize bidirectional conversion, namely, forward equalization and reverse equalization switching.
Because the second bidirectional converter F2 multiplexes the excitation inductance L1 of the first bidirectional converter F1 and the first power switching tube S1, the second bidirectional converter F2 and the first bidirectional converter F1 form a three-port bidirectional converter, which is beneficial to realizing the balance among three battery packs and can effectively improve the balance speed. By combining the equalization circuit, a control strategy comprising inter-group active equalization, intra-group active equalization and intra-group passive equalization can be realized, so that the level of the battery cells in the battery pack is consistent, and the service life of the battery is prolonged.
Another embodiment of the present invention provides an equalization control method, which is based on the equalization circuit. As shown in fig. 11, the equalization control method includes:
step S100, judging whether the inter-group pressure difference between each battery group is larger than a first preset value.
Step S102, in response to determining that the inter-group voltage difference between the battery packs is greater than a first preset value, controlling the equalization circuit to work in an inter-group active equalization mode until the inter-group voltage difference is less than or equal to the first preset value.
Step S104, for each battery pack, determining the absolute value of the voltage difference between each cell voltage in the battery pack and the average value of the cell voltages in the corresponding battery pack as the intra-pack voltage difference corresponding to each cell.
And S106, judging whether the group internal pressure difference corresponding to each battery cell is larger than a second preset value for each battery group.
And step S108, in response to determining that the intra-group pressure difference corresponding to each cell is larger than a second preset value, controlling the equalization circuit to work in an intra-group active equalization mode until the intra-group pressure difference corresponding to each cell is smaller than or equal to the second preset value.
Step S110, judging whether the group internal pressure difference corresponding to each cell is larger than a third preset value.
And step S112, in response to determining that the intra-group pressure difference corresponding to each cell is greater than a third preset value, controlling the equalization circuit to work in a passive equalization mode in the group until the average value of the intra-group pressure differences corresponding to each cell is less than or equal to the third preset value.
Specifically, as shown in fig. 12, the BMS system starts to detect the voltage of each cell in the battery pack, then calculates the voltage value of the battery pack according to the number of cells connected in series, compares the difference value (inter-pack voltage difference) between the battery packs with a first preset value (inter-pack error voltage set value v1_ref), enters inter-pack active equalization if the difference between the battery packs is greater than v1_ref, and controls the equalization circuit to operate in inter-pack active equalization mode in response to determining that the inter-pack voltage difference between the battery packs is greater than the first preset value. When detecting that the error between each battery pack is smaller than or equal to V1 ref, the program automatically jumps out of the inter-pack active equalization control system, when detecting that the error between the voltages of the battery cells in each battery pack is larger than V2 ref (second preset value), the program enters into the intra-pack active equalization mode, and controls the equalization circuit to work in the intra-pack active equalization mode in response to judging that the intra-pack differential pressure corresponding to each battery cell is larger than the second preset value. When the voltage of the battery cells in the battery pack is detected to be V3 ref < Vi < V2 ref, the program automatically jumps out of the active equalization in the battery pack, then enters the passive equalization in the battery pack, and controls the equalization circuit to work in the passive equalization mode in the battery pack in response to the fact that the voltage difference in the battery pack corresponding to each battery cell is larger than the third preset value, until the voltage error between the battery cells in the battery pack is smaller than or equal to V3 ref (the third preset value), the passive equalization is stopped, and the equalization is ended.
It should be noted that in other embodiments, the dual N-type MOSFET may be replaced with an N-type MOSFET. In the passive equalization mode in the group, the double-N MOSFET has a larger adjustable range of on-resistance than the single-N MOSFET.
In this embodiment, the second bidirectional converter F2 multiplexes the excitation inductance L1 of the first bidirectional converter F1 and the first power switching tube S1, so that the second bidirectional converter F2 and the first bidirectional converter F1 form a three-port bidirectional converter, which is beneficial to realizing equalization among three battery packs and can effectively improve equalization speed. By combining the equalization circuits, the inter-group equalization can improve the equalization speed, the intra-group active equalization can quickly reduce the pressure difference between the battery cells, and the intra-group passive equalization can further shorten the pressure difference between the battery cells, so that the level heights of the battery cells in the battery pack are consistent, and the service life of the battery is prolonged. The battery pack cell level balancing device can realize the effects of active and passive mixed balancing, and when the active balancing enables the battery pack cell level to be balanced rapidly, the passive balancing is interposed after the active balancing cannot be triggered due to small pressure difference, so that the battery pack cell SOC level consistency is improved, and the service life of the battery is prolonged.
Specifically, the equalization control method further includes:
Step S101, before step S102, in response to determining that the inter-group pressure difference between the respective battery packs is less than or equal to the first preset value, a step S104 is skipped.
Step S107, before step S108, in response to determining that the intra-group voltage difference corresponding to each cell is less than or equal to the second preset value, the process goes to step S110.
Step S111, before step S112, in response to determining that the intra-group voltage difference corresponding to each cell is less than or equal to the third preset value, the equalization circuit is controlled to stop equalization.
Specifically, as shown in conjunction with fig. 13, step S102 includes: sequencing the voltage values of the battery packs to obtain sequencing results in response to the fact that the pressure difference in each battery pack is larger than a second preset value; controlling the working directions of a first bidirectional converter F1 and a second bidirectional converter F2 of the equalizing circuit according to the sequencing result, and controlling the on-off of a first switch, a second switch, a third switch and a fourth switch of the equalizing circuit; judging whether the inter-group pressure difference between each battery group is smaller than or equal to a first preset value; and in response to determining that the inter-group voltage difference between the battery groups is smaller than or equal to a first preset value, controlling the equalization circuit to stop working in an inter-group active equalization mode.
In step S102, when the voltage of the third battery pack is greater than the voltage of the first battery pack and the voltage of the first battery pack is greater than the voltage of the second battery pack, the first switch and the second switch are controlled to be opened, the third switch and the fourth switch are controlled to be closed, and the working directions of the first bidirectional converter F1 and the second bidirectional converter F2 are controlled to be forward; that is, when Vbat3> Vbat1> Vbat2 is detected, forward equalization is performed, and at the same time, as shown in fig. 3, the adjustment switches K1 and K2 are opened and K2 are closed, so that Vbat1 and Vbat2 are charged, respectively.
When the voltage of the third battery pack is larger than the voltage of the first battery pack and the voltage of the first battery pack is equal to the voltage of the second battery pack, the first switch and the second switch are controlled to be closed, the third switch and the fourth switch are controlled to be opened, and the working directions of the first bidirectional converter F1 and the second bidirectional converter F2 are controlled to be forward; that is, when Vbat3> vbat1=vbat2 is detected, forward equalization is performed, and at the same time, as shown in fig. 2, the adjustment switches K1 and K2 are turned on, so that Vbat1 and Vbat2 are connected in series, and Vbat3 is boosted to charge Vbat1 and Vbat2, thereby improving the equalization speed.
When the voltage of the third battery pack is smaller than the voltage of the second battery pack and the voltage of the second battery pack is smaller than the voltage of the first battery pack, the first switch and the second switch are controlled to be closed, the third switch and the fourth switch are controlled to be opened, and the working directions of the first bidirectional converter F1 and the second bidirectional converter F2 are controlled to be reverse; that is, when Vbat1> Vbat2> Vbat3 is detected, reverse equalization needs to be started, and at the same time, as shown in fig. 2, the adjustment switch K1 is closed, and K2 is opened; wherein Vbat1 represents the voltage of the first battery BT1, vbat2 represents the voltage of the second battery BT2, and Vbat3 represents the voltage of the third battery BT 3.
Specifically, step S108 includes: in response to determining that the voltage difference in the group corresponding to each battery cell is larger than a second preset value, determining a battery cell to be supplemented and a battery cell to be discharged according to the voltage difference between the voltage of each battery cell in each battery group and the average value of the voltage of the battery cells; in the active equalization mode in the group, the first switch and the second switch are in an open state, and the third switch and the fourth switch are in a closed state; controlling the on-off of two double-N-type MOSFETs connected with the positive electrode and the negative electrode of the corresponding battery cell according to a preset control strategy, so that a discharging loop is formed by the positive electrode and the negative electrode of the battery cell to be discharged and the filter capacitors connected with the two ends of the switch array in the corresponding battery pack in a half period of a switch signal, and a power supplementing loop is formed by the positive electrode and the negative electrode of the battery cell to be supplemented and the filter capacitors connected with the two ends of the switch array in the corresponding battery pack in the other half period of the switch signal; judging whether the group internal pressure difference corresponding to each cell is smaller than or equal to a second preset value; and in response to the fact that the voltage difference in the group corresponding to each cell is smaller than or equal to a second preset value, controlling the equalization circuit to stop working in the active equalization mode in the group.
Optionally, as shown in fig. 14, first, the difference Vdi between the voltage Vi (i=n, n is the cell number) of each cell in the battery pack and the average value of the series-connected cells in the battery pack is greater than a given value vc_ref, the program numbers the cells to be transferred with energy according to the difference between the voltages of the cells, charges the cells with low voltage with high voltage through a capacitor, and detects whether the voltage levels of the cells are consistent through circulation.
The preset control strategy is used for determining the charging and discharging time sequence of the battery cell. Optionally, the preset control policy may be: sequencing the electric cores of the energy to be transferred according to the energy to be transferred of the electric cores; determining the energy release sequence of the energy release electric core and the energy supplementing sequence of the energy supplementing electric core according to the energy to be transferred of the electric core and the capacitance value of the filter capacitor; and determining the charging and discharging time sequence according to the discharging sequence and the energy supplementing sequence.
In other embodiments, the preset control policy may also be: and determining the charging and discharging time sequence according to the number sequence of the battery cells to be charged and the number sequence of the battery cells to be discharged.
In determining the charging and discharging timing sequence, one charging and discharging, two charging and discharging, one charging and discharging, two discharging or other modes can be considered, and the embodiment is not limited. As shown in fig. 4, the intra-group active equalization mode corresponds to the single-capacitor equalization mode described above, and the switch connects the capacitor alternately to one cell and its neighboring cells, or to the entire battery. The Pulse Width Modulated (PWM) signal of the switch will manage the distribution of battery energy. During half the period of the square wave, the higher voltage battery transfers energy to the capacitor. During the other half of the cycle, the battery receives energy from the capacitor.
As shown in fig. 9 and 10, during the active equalization of the battery BT1, the m1_1 of the dual N-type MOSFET qx_1 corresponding to the to-be-discharged cell b1_x is controlled to be turned on and m1_2 is controlled to be turned off in a half period of one switching signal, and the discharge current flows from the body diode d1_2 of m1_2; and controlling M2_1 in the double N-type MOSFET Qx_2 to be conducted and controlling M2_2 to be turned off, and enabling discharge current to flow in from a body diode D2_2 of the M2_2 through a filter capacitor to form a discharge loop of the cell to be discharged BT 1_x. In the other half period of the switching signal, controlling M1_1 in the double N-type MOSFET Qy_1 corresponding to the battery cell to be supplemented BT1_y to be closed and M1_2 to be conducted, and enabling charging current to flow in from a body diode D1_1 of the M1_1; and controlling the M2_1 in the double N-type MOSFET Qn_2 to be closed and controlling the M2_2 to be conducted, and enabling charging current to flow out of the body diode D2_1 of the M2_1 through the filter capacitor to form a power compensation loop of the cell BT1_y to be compensated.
Specifically, step S112 includes: in response to determining that the intra-group voltage difference corresponding to each cell is greater than a third preset value, respectively controlling driving voltages of the double-N-type MOSFET connected with the positive electrode of the corresponding cell and the double-N-type MOSFET connected with the positive electrode of the adjacent cell according to the voltage value of each cell so as to enable the positive electrode of the corresponding cell, the double-N-type MOSFET connected with the positive electrode of the adjacent cell and the negative electrode of the corresponding cell to form an energy absorption loop; judging whether the group internal pressure difference corresponding to each cell is smaller than or equal to a third preset value; in response to determining that the intra-group voltage difference corresponding to each cell is smaller than or equal to a third preset value, controlling the equalization circuit to stop working in a passive equalization mode in the group; in the passive equalization mode in the group, the switch state of the four-way switch is not required.
Specifically, as shown in fig. 15, since the voltage difference between the cells in the battery pack is small, active equalization is difficult to control, by controlling the MOSFET switching tube, changing the gate driving voltage Vgs of the MOSFET to operate in the resistive region, detecting the current Ieq flowing through the battery and comparing with the given value Iref, changing the step value Vstep of the gate driving voltage Vgs of the MOSFET until the voltage error between the cells in the battery pack is smaller than v3_ref to stop passive equalization, and ending the equalization.
As shown in fig. 5, in the passive equalization mode in the group, the MOSFET gate driving voltage value is controlled to operate in the resistance region, and different driving voltages correspond to different on-resistances, and energy is extracted from each battery and converted into heat until all the batteries are equal to the lowest SOC battery. For example, in fig. 5, for the battery BT1, an energy absorbing circuit is formed between the positive electrode of the cell bt1_1, the q1_1, the q1_3 and the negative electrode of the cell bt1_1, that is, the energy of the cell bt1_1 is absorbed by the MOSFET by controlling the driving voltages of the double N-type MOSFET q1_1 connected to the positive electrode of the cell bt1_1 and the double N-type MOSFET q1_3 connected to the positive electrode of the adjacent cell bt1_2.
The invention also provides a charger, which comprises the equalization circuit.
The invention also provides a charger, which comprises the equalization circuit, a memory and a processor; the memory is used for storing a computer program; the processor is configured to implement the equalization control method according to any of the preceding claims when executing the computer program.
Although the present disclosure is disclosed above, the scope of the present disclosure is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the disclosure, and these changes and modifications will fall within the scope of the disclosure.

Claims (10)

1. An equalization circuit, comprising:
the three filter capacitors comprise a first filter capacitor, a second filter capacitor and a third filter capacitor;
the three battery group internal switch arrays are arranged in one-to-one correspondence with the three filter capacitors and comprise a first battery group internal switch array, a second battery group internal switch array and a third battery group internal switch array; each switch array in the battery pack comprises two ends; the two ends of the switch array in the battery pack are respectively connected with the corresponding filter capacitors;
The first path switch comprises a first end and a second end; the first end of the first path switch is connected with the second end of the first filter capacitor; the second end of the first path switch is connected with the first end of the second filter capacitor;
a second switch including a first end and a second end; the first end of the second switch is connected with one end of the switch array in the first battery pack; the second end of the second switch is connected with the switch array in the second battery pack;
a third switch comprising a first end and a second end; the first end of the third switch is connected with the first end of the first switch; the second end of the third switch is connected with the first end of the second switch;
a fourth switch including a first terminal and a second terminal; the first end of the fourth path switch is connected with the second end of the first path switch; the second end of the fourth switch is connected with the second end of the second switch;
the first bidirectional converter comprises a first port and a second port, two ends of the first port of the first bidirectional converter are connected with the third filter capacitor, and two ends of the second port of the first bidirectional converter are connected with the first filter capacitor;
The second bidirectional converter comprises a first port and a second port, two ends of the first port of the second bidirectional converter are connected with the third filter capacitor, and two ends of the second port of the second bidirectional converter are connected with the second filter capacitor.
2. The equalization circuit of claim 1, wherein the first bi-directional converter comprises a first transformer, a first power switch tube, and a second power switch tube; the first transformer comprises a first primary winding and a first secondary winding;
the first end of the first primary winding and the second end of the first secondary winding are the same name ends; the first end of the first primary winding is connected with the first end of the third filter capacitor; the second end of the first primary winding is connected with the drain electrode of the first power switch tube; the source electrode of the first power switch tube is connected with the first negative electrode connecting end; the first end of the first secondary winding is connected with the first end of the first filter capacitor; the second end of the first secondary winding is connected with the drain electrode of the second power switch tube; the source stage of the second power switch tube is connected with the second end of the first filter capacitor; and the second end of the third filter capacitor is connected with the source electrode of the first power switch tube.
3. The balancing circuit of claim 2, wherein the first primary winding comprises an excitation inductance; the second bidirectional converter multiplexes the excitation inductance and the first power switching tube; the second bidirectional converter further comprises a first capacitor, a second transformer, a second capacitor, a first inductor, a third power switch tube and a second filter capacitor;
the second transformer comprises a second primary winding and a second secondary winding; the first end of the first capacitor is connected with the drain electrode of the first power switch tube; the second end of the first capacitor is connected with the first end of the second primary winding; the second end of the second primary winding is connected with the source electrode of the first power switch tube; the first end of the second secondary winding is connected with the first end of the second capacitor; the second end of the second capacitor is connected with the first end of the first inductor; the first end of the second primary winding and the first end of the second secondary winding are the same name end, the second end of the first inductor is connected with the second end of the second secondary winding, the source electrode of the third power switch tube is connected with the first end of the first inductor, and the drain electrode of the third power switch tube is connected with the first end of the second filter capacitor; the second end of the second filter capacitor is connected with the second end of the second secondary winding; and the first end of the second filter capacitor is connected with the second end of the first path switch.
4. An equalization circuit as recited in any one of claims 1-3, wherein said first and second switches correspond to two-way switches of a first double pole single throw switch, respectively; and/or the third switch and the fourth switch respectively correspond to two switches of a second double-pole single-throw switch.
5. An equalization control method, characterized in that it is based on an equalization circuit according to any of claims 1-4, said method comprising:
judging whether the inter-group pressure difference between each battery group is larger than a first preset value or not;
controlling the equalization circuit to work in an inter-group active equalization mode in response to determining that the inter-group voltage difference between each battery group is greater than the first preset value until the inter-group voltage difference is less than or equal to the first preset value;
for each battery pack, determining the absolute value of the voltage difference between each cell voltage in the battery pack and the average value of the cell voltages in the corresponding battery pack as the voltage difference in the battery pack corresponding to each cell;
judging whether the group internal pressure difference corresponding to each battery cell is larger than a second preset value for each battery group;
in response to determining that the intra-group voltage difference corresponding to each cell is larger than a second preset value, controlling the equalization circuit to work in an intra-group active equalization mode until the intra-group voltage difference corresponding to each cell is smaller than or equal to the second preset value;
Judging whether the group internal pressure difference corresponding to each cell is larger than a third preset value or not;
and controlling the equalization circuit to work in a passive equalization mode in the group in response to the fact that the intra-group pressure difference corresponding to each cell is larger than the third preset value, until the average value of the intra-group pressure differences corresponding to each cell is smaller than or equal to the third preset value.
6. The equalization control method of claim 5, wherein said controlling the equalization circuit to operate in an inter-group active equalization mode in response to determining that an inter-group voltage difference between each of the battery packs is greater than the first preset value until the inter-group voltage difference is less than or equal to the first preset value comprises:
responding to the judgment that the intra-group pressure difference of each battery pack is larger than a second preset value, and sequencing the voltage values of each battery pack to obtain sequencing results;
controlling the working directions of a first bidirectional converter and a second bidirectional converter of the equalizing circuit according to the sequencing result, and controlling the on-off of a first switch, a second switch, a third switch and a fourth switch of the equalizing circuit;
judging whether the inter-group pressure difference between each battery group is smaller than or equal to a first preset value;
And controlling the equalization circuit to stop working in an inter-group active equalization mode in response to the fact that the inter-group voltage difference between the battery packs is smaller than or equal to the first preset value.
7. The equalization control method of claim 6, wherein controlling the operating directions of the first bidirectional converter and the second bidirectional converter of the equalization circuit and controlling the on/off of the first switch, the second switch, the third switch, and the fourth switch of the equalization circuit according to the sequencing result comprises:
when the voltage of the third battery pack is larger than the voltage of the first battery pack and the voltage of the first battery pack is larger than the voltage of the second battery pack, the first path switch and the second path switch are controlled to be opened, the third path switch and the fourth path switch are controlled to be closed, and the working directions of the first bidirectional converter and the second bidirectional converter are controlled to be positive directions;
when the voltage of the third battery pack is larger than the voltage of the first battery pack and the voltage of the first battery pack is equal to the voltage of the second battery pack, the first path switch and the second path switch are controlled to be closed, the third path switch and the fourth path switch are controlled to be opened, and the working directions of the first bidirectional converter and the second bidirectional converter are controlled to be positive;
When the voltage of the third battery pack is smaller than the voltage of the second battery pack and the voltage of the second battery pack is smaller than the voltage of the first battery pack, the first path switch and the second path switch are controlled to be closed, the third path switch and the fourth path switch are controlled to be opened, and the working directions of the first bidirectional converter and the second bidirectional converter are controlled to be reverse.
8. The equalization control method of claim 5, wherein each of said intra-stack switch arrays of said equalization circuit comprises 2M double N-type MOSFETs; m is the number of cells in the battery pack; the positive electrode and the negative electrode of each battery cell in each battery pack are respectively connected to filter capacitors connected to the two ends of the switch array in the corresponding battery pack through a double-N-type MOSFET;
and controlling the equalization circuit to work in an active equalization mode in the group in response to determining that the intra-group voltage difference corresponding to each cell is greater than a second preset value until the intra-group voltage difference corresponding to each cell is less than or equal to the second preset value, including:
in response to determining that the voltage difference in the group corresponding to each battery cell is larger than a second preset value, determining a battery cell to be supplemented and a battery cell to be discharged according to the voltage difference between the voltage of each battery cell in each battery group and the average value of the voltage of the battery cells; in an active equalization mode in a group, the first switch and the second switch are in an open state, and the third switch and the fourth switch are in a closed state;
Controlling the on-off of two double-N-type MOSFETs connected with the positive electrode and the negative electrode of the corresponding battery cell according to a preset control strategy, so that a discharging loop is formed by the positive electrode and the negative electrode of the battery cell to be discharged and the filter capacitors connected with the two ends of the switch array in the corresponding battery pack in a half period of a switch signal, and a power supplementing loop is formed by the positive electrode and the negative electrode of the battery cell to be supplemented and the filter capacitors connected with the two ends of the switch array in the corresponding battery pack in the other half period of the switch signal;
judging whether the group internal pressure difference corresponding to each cell is smaller than or equal to the second preset value;
and controlling the equalization circuit to stop working in an active equalization mode in the group in response to the fact that the intra-group voltage difference corresponding to each cell is smaller than or equal to the second preset value.
9. The equalization control method of claim 5, wherein each of said intra-stack switch arrays of said equalization circuit comprises 2M double N-type MOSFETs; m is the number of cells in the battery pack; the positive electrode and the negative electrode of each battery cell in each battery pack are respectively connected to filter capacitors connected to the two ends of the switch array in the corresponding battery pack through a double-N-type MOSFET;
and controlling the equalization circuit to work in the passive equalization mode in the group in response to determining that the intra-group differential pressure corresponding to each cell is greater than the third preset value until the average value of the intra-group differential pressures corresponding to each cell is less than or equal to the third preset value, including:
In response to determining that the intra-group voltage difference corresponding to each cell is greater than the third preset value, respectively controlling driving voltages of the double-N-type MOSFET connected with the positive electrode of the corresponding cell and the double-N-type MOSFET connected with the positive electrode of the adjacent cell according to the voltage value of each cell so as to enable the positive electrode of the corresponding cell, the double-N-type MOSFET connected with the positive electrode of the adjacent cell and the negative electrode of the corresponding cell to form an energy absorption loop;
judging whether the group internal pressure difference corresponding to each cell is smaller than or equal to the third preset value;
and controlling the equalization circuit to stop working in the passive equalization mode in the group in response to the fact that the voltage difference in the group corresponding to each cell is smaller than or equal to the third preset value.
10. A charger comprising an equalization circuit as claimed in any one of claims 1-4.
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