CN116107489A - Power supply device and data transmission method thereof - Google Patents

Abstract

The invention relates to a power supply device and a data transmission method thereof. The receiving circuit receives a data and checks whether a body information in the data is identical to a body information. When the identity information is different from the local identity information, the receiving circuit stores the data into the receiving buffer memory and stores the data into the transferring buffer memory as data to be transferred. When the identity information is identical to the local identity information, the receiving circuit discards the data. Because the identity information in the data represents which power supply equipment sends the data, when the identity information is the same as the identity information of the host, the representing data is sent by the host, so that the data can be directly discarded without being processed, and the purpose of sharing the data with low delay and high synchronization is achieved.

Description

Power supply device and data transmission method thereof

technical field

The present invention relates to a power supply device and a data transmission method, especially a power supply capable of transmitting and sharing digital data, automatically configuring device identity information (Device ID), and performing low-latency synchronous control when operating in parallel Devices and their data transfer methods.

Background technique

Existing power supply equipment often achieves the purpose of capacity expansion through parallel combination. In addition to the need for feedback control at the power end, it is also necessary to convert analog signals into digital data through measurement technology, and then through micro-processing or computing circuits. After comparing and judging, quickly fine-tune and control each power supply equipment connected in parallel to achieve intelligent control.

In addition, the existing power supply equipment usually chooses the serial transmission connector circuit that has been used for many years to receive and transmit digital data, but its transmission rate is generally low. When the number of parallel connection of the existing power supply equipment increases, its control efficiency will decrease. Rapid decline, which makes the control synchronization of the existing power supply equipment unable to meet the demand.

Therefore, the existing power supply equipment and its data transmission method still need to be further improved.

Contents of the invention

In view of the above problems, the present invention provides a power supply device and a data transmission method thereof, which provide low-latency data transmission between multiple power supply devices and improve the synchronization of the power supply devices.

The power supply device of the present invention includes a receiving circuit, a receiving buffer memory and a forwarding buffer memory. The receiving circuit is electrically connected to the receiving buffer memory and the forwarding buffer memory. The receiving circuit receives a data, and checks whether an identity information in the data is the same as the local identity information. When the identity information in the data is different from the local identity information, the receiving circuit stores the data into the receiving buffer memory, and stores the data as data to be forwarded into the forwarding buffer memory. When the identity information in the data is the same as the local identity information, the receiving circuit discards the data.

Further, the data transmission method of the power supply device is executed by the power supply device, and includes the following steps:

receiving a data by a receiving circuit;

Check whether the identity information in the data is the same as the identity information of the machine;

When the identity information in the data is different from the local identity information, the receiving circuit stores the data into a receiving buffer, and stores the data as a data to be forwarded into a forwarding buffer;

When the identity information in the data is the same as the local identity information, the receiving circuit discards the data.

Since the identity information in the data represents which power supply device sent the data, when the identity information in the data is the same as the identity information of the machine, it means that the data is sent by the machine, so don’t worry about it The data can be directly discarded without processing, thereby reducing the time for processing data, so as to transmit data with low delay and improve the synchronization of power supply equipment.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. Those skilled in the art can also obtain other drawings based on these drawings without creative work. In the attached picture:

FIG. 1A and FIG. 1B are schematic structural diagrams of a power system applying the power device of the present invention.

FIG. 2 is a schematic block diagram of the power supply device of the present invention.

FIG. 3A is a schematic flowchart of the steps executed by the receiving circuit in the data transmission method of the power supply device of the present invention.

FIG. 3B is a schematic flowchart of the steps executed by the memory controller and allocator of the data transmission method of the power supply device of the present invention.

FIG. 3C is a schematic flowchart of the steps executed by the sending circuit in the data transmission method of the power supply device of the present invention.

Detailed ways

The technical means adopted by the present invention to achieve the intended invention purpose are further described below in conjunction with the drawings and preferred embodiments of the present invention.

Please refer to FIG. 1A and FIG. 1B , multiple power supply devices 10 of the present invention can be connected in series or in parallel to form a power supply system to supply power to a load 20 , thereby expanding the capacity of the power supply. One of the power supply devices 10 can be set as the master 10a, while the other power supply devices 10 are slaves 10b. Control commands are generated by the master 10a and sent to each slave 10b. In addition, the signal connectors A/B of the master 10a and the slave 10b are connected to each other through the connection line 100 to transmit data, and the power output terminals +/− of the master 10a and the slave 10b are electrically connected to the load 20 to provide power. For example, the signal connector B of the master 10a is connected to the signal connector A of the slave 10b through the connecting wire 100 , and the signal connector B of the slave 10b is connected to the signal connector A of the next slave 10b through another connecting wire 100 .

Please refer to shown in Fig. 2, power equipment 10 of the present invention comprises a receiving circuit 11, a receiving buffer memory 12, a transfer buffer memory 13, a memory control and distributor 14, a system memory 15, a sending buffer memory 16 and A sending circuit 17 .

The receiving circuit 11 is electrically connected to the receiving buffer memory 12 and the forwarding buffer memory 13 . The memory control and distributor 14 is electrically connected to the receiving buffer memory 12 . The system memory 15 is electrically connected to the memory control and allocator 14 . The sending buffer memory 16 is electrically connected to the memory control and allocator 14 . The transmission circuit 17 is electrically connected to the transfer buffer memory 13 and the transmission buffer memory 16 .

The receiving circuit 11 receives a data, and checks whether an identity information in the data is the same as the local identity information. When the identity information in the data is the same as the local identity information, the receiving circuit 11 stores the data into the receiving buffer memory 12 and stores the data into the forwarding buffer memory 13 as data to be forwarded. And when the receiving circuit 11 stores the data into the receiving buffer memory 12 and stores the data as the data to be forwarded into the forwarding buffer memory 13, the receiving circuit 11 receives the data again. And when the identity information in the data is different from the local identity information, the receiving circuit 11 discards the data. And when the receiving circuit 11 discards the data, the receiving circuit 11 receives the data again.

In this embodiment, the data is a digital data.

In addition, please refer to FIG. 3A, the data transmission method of the power supply device of the present invention is executed by the power supply device 10, and includes the following steps:

Receive the data by the receiving circuit 11 (S301);

Check by the receiving circuit 11 whether the identity information in the data is identical to the local identity information (S302);

Wherein when the identity information in the data is identical with the local identity information, the data is stored in the receiving buffer memory 12 by the receiving circuit 11, and the data is stored in the transfer buffer memory 13 as the data to be transferred ( After S303), the data is re-received by the receiving circuit 11 (S301);

Wherein when the identity information in the data is different from the identity information of the machine, the receiving circuit 11 discards the data (S304), and then receives the data again (S301).

Since the identity information in the data represents which power supply device 10 sent the data, when the identity information in the data is the same as the identity information of the machine, it means that the data is sent by the machine, so you don’t need to pay attention to it. The data can be directly discarded without processing, thereby reducing the time for processing data, so as to transmit data with low delay and improve the synchronization of power supply equipment.

In this preferred embodiment, the data includes the identity information and a parameter information, and the parameter information includes various parameters or control instructions of each power supply device.

For example, please refer to Fig. 1A and shown in Fig. 2, when master 10a generates a data, and when sending this data, this data will be transmitted between this master 10a and each slave 10b, when slave 10b receives During this data, since the data produced by the master 10a will contain the identity information of the master 10a that generated the data, and it is different from the identity information of each slave 10b, so when each slave 10b receives the data, each slave 10b The receiving circuit 11 will check that the identity information in the data is different from its own identity information, and then store the data in the receiving buffer memory 12, and store the data in the transfer buffer memory 13 as the data to be transferred. When the host 10a receives the data again, the receiving circuit 11 of the host 10a will check that the identity information in the data is the same as its own identity information, which means that the data is generated and sent by the host 10a, so the host 10a does not The data must be ignored, and the data can be discarded directly to avoid repeated data processing and improve processing efficiency.

Furthermore, after the memory control and allocator 14 checks whether there is the data in the receiving buffer memory 12 , the memory control and allocator 14 further checks whether there is the data to be sent in the system memory 15 .

For example, when there is the data in the receiving buffer memory 12, the memory control and allocator 14 stores the data into the system memory 15 according to the identity information in the data, and checks whether there is the data to be sent in the system memory 15. data. Since the storage space has been allocated in advance according to each identity information in the system memory 15, when the memory control and allocator 14 stores the data into the system memory 15, it stores the data into the system memory 15 according to the identity information in the data. The system storage 15 corresponds to the storage space of the identity information.

And when there is no such data in the receiving buffer memory 12 , the memory control and allocator 14 directly checks whether there is the data to be sent in the system memory 15 .

And when there is the data to be sent in the system memory 15, the memory control and allocator 14 stores the data to be sent into the sending buffer memory 16 after merging the data to be sent with the local identity information, and the memory control and allocator 14 Check whether there is the data in the receiving buffer memory 12 again.

But when there is no data to be sent in the system memory 15 , the memory control and allocator 14 rechecks whether there is the data in the receiving buffer memory 12 .

That is to say, the memory control and allocator 14 checks in turn whether there is the data or the data to be sent in the receiving buffer memory 12 and the system memory 15 . Furthermore, the data stored in the system memory 15 is for the power device 10 to use later. For example, since the data also includes the parameter information, and the parameter information includes various parameters or control instructions of each power supply device, after the data is stored in the system memory 15, a system center of the power supply device The processor can set the parameters of the power supply device 10 according to the parameter information in the system memory 15 , such as adjusting the output voltage and current, or setting the start-up time.

Please refer to FIG. 3B, the data transmission method of the power supply device also includes the following steps:

Check whether there is the data in the receiving buffer memory 12 by the memory control and allocator 14 (S401);

When there is the data in the receiving buffer memory 12, the data is stored in the system memory 15 by the memory control and distributor 14 according to the identity information in the data (S402), and checks whether there is the data in the system memory 15 Data to be sent (S403);

When there is no such data in the receiving buffer memory 12, the memory control and allocator 14 directly checks whether there is the data to be sent in the system memory 15 (S403);

When there is the data to be sent in the system memory 15, after the data to be sent is merged with the local identity information by the memory control and allocator 14, it is stored in the sending buffer memory 16 (S404), and re-started after completion Check whether there is the data in the receiving buffer memory 12 (S401);

When there is no data to be sent in the system memory 15, the memory control and allocator 14 rechecks whether there is the data in the receiving buffer memory 12 (S401).

By alternately checking whether there is the data in the receiving buffer memory 12 that needs to be stored in the system memory 15, and whether there is the data to be sent in the system memory 15 that needs to be stored in the sending buffer memory 16, so that the power supply device 10 can send other The data transmitted by the power supply device is stored in the system memory 15 for subsequent use, and the data to be sent in the system memory is sent to other power supply devices 10, so as to receive and send data stably.

Furthermore, the sending circuit 17 checks whether there is the data to be transferred in the transfer buffer memory 13 . When there is the data to be transferred in the transfer buffer memory 13 , the sending circuit 17 sends the data to be transferred in the transfer buffer memory 13 . When there is no data to be transmitted in the transmission buffer memory 13 , the sending circuit 17 further checks whether there is any data to be transmitted in the transmission buffer memory 16 . When there is the data to be sent in the sending buffer memory 16 , after the sending circuit 17 sends the data to be sent in the sending buffer memory 16 , the sending circuit 17 rechecks whether there is the data to be sent in the sending buffer memory 16 . And when there is no data to be transmitted in the transmission buffer memory 16, the transmission circuit 17 checks again whether there is the data to be transmitted in the transmission buffer memory 13.

Further, as shown in FIG. 3C , the data transmission method of the power supply device also includes the following steps:

Check whether there is the data to be transferred in the transfer buffer memory 13 by the sending circuit 17 (S501);

When there is the data to be transferred in the transfer buffer memory 13, the sending circuit 17 sends the data to be transferred in the transfer buffer memory 13 (S502);

When there is no data to be transferred in the transfer buffer memory 13, the sending circuit 17 checks whether there is the data to be sent in the sending buffer memory 16 (S503);

When there is the data to be sent in the sending buffer memory 16, the sending circuit 17 sends the data to be sent in the sending buffer memory 16 (S504), and the sending circuit 17 rechecks whether there is the data in the forwarding buffer memory 13 Data to be transferred (S501);

When there is no data to be transmitted in the transmission buffer memory 16, the transmission circuit 17 checks again whether there is data to be transmitted in the transmission buffer memory 13 (S501).

By alternately checking whether there is the data to be transferred in the transfer buffer memory 13 and whether there is the data to be sent in the sending buffer memory 16, the power supply device 10 can transfer the data transmitted by other power supply devices, and can generate its own The data is sent to other power supply devices 10, thereby stably transferring and sending the data.

In this preferred embodiment, the receiving buffer memory 12, the forwarding buffer memory 13, and the sending buffer memory 16 are each a first-in-first-out (First Input First Output; FIFO) register.

In addition, please refer to FIG. 1A , the power supply device 10 also includes an identity information setting program during system initial setting. When multiple power supply devices 10 are connected in series or in parallel to form the power supply system, and the master 10a and slave 10b in the multiple power supply devices 10 of the power supply system are connected to each other through the signal connector A/B, the identity can be executed first. The information setting program is used to set the identity information of the master 10a and the slaves 10b. For example, when the system is initially set, the identity information of the master 10a is preset to a minimum value, such as 0x00, and the identity information of the other slaves 10b is preset to a maximum value, such as 0xFF. When executing the identity information setting program, the master 10a first sends an identity information setting signal to the first slave 10b, and the identity information setting signal includes the identity information and parameter information of the master 10a, For example, the identity information of the host 10a is 0x00, and the parameter information is 0x00.

When the first slave 10b receives the identity information setting signal, the first slave 10b first checks whether the identity information in the identity information setting signal is the same as its own identity information. When the identity information in the received identity information setting signal is the same as the identity information of the local machine, the first slave 10b will directly discard the identity information setting signal.

But when the identity information in the identity information setting signal received is not the same as the identity information of this machine, the first slave 10b then adds 1 to the parameter information in the identity information setting signal and sets it as its native identity information.

For example, the initial setting of the identity information of the first slave 10b is 0xFF, and the identity information in the received identity information setting signal is the identity information of the master 10a, namely 0x00. Since the identity information "0x00" received by the first slave 10b is not the same as the identity information "0xFF" of the first slave 10b itself, after the first slave 10b adds 1 to the parameter information 0x00, set Set its identity information as 0x01, and additionally generate and transmit a new identity information setting signal to the next slave 10b.

The identity information setting signal generated by the first slave 10b includes the identity information of the master 10a and the parameter information of the first slave 10b, for example, in the identity information setting signal transmitted by the first slave 10b The identity information is 0x00, and the parameter information is 0x01. By analogy, thereby setting the identity information of all slaves 10b.

And when the master 10a receives the identity information setting signal sent by the last slave 10b, the master 10a will check whether the identity information in the received identity information setting signal is the same as its own identity information, and when the received When the identity information in the identity information setting signal is the same as the identity information of the host 10a, the local machine 10a will directly discard the identity information setting signal and end the identity information setting procedure at the same time.

For example, the identity information in the identity information setting signal transmitted by the last slave 10b is 0x00, and the local identity information of the master 10a is 0x00, so the master 10a can judge the identity information in the identity information setting signal and its own identity. The information is the same.

In addition, the master 10a further adds 1 to the parameter information in the identity information setting signal sent by the last slave 10b, and sets it as a device quantity information for subsequent confirmation whether any slave 10b is offline.

As mentioned above, the power supply device of the present invention adopts the serial/deserialization (Ser/Des) which is faster and commonly found in the programmable logic array (Field Programming Gate Array, FPGA) as the transmission connector, and cooperates with the state machine ( Finite State Machine, FSM) process, or protocol circuit, is used to process received and sent data. The power supply device 10 includes the receiving circuit (Rx_Logic) 11, the sending circuit (Tx_Logic) 17 and three First In First Out (FirstIn First Out FIFO) buffer memories, which are respectively the receiving buffer memory (Rx_FIFO) 12 and the sending buffer memory (Tx_FIFO) 16 and the forwarding buffer (Forward_FIFO) 13 . The sending circuit 17 checks in turn whether the sending buffer memory 16 and the transfer buffer memory 13 have data to send, because the data will contain a device identity code, that is, the identity information, which represents which power supply device 10 the data is from. sent, this device identity code is stored in the sending buffer memory 16, and its meaning is to share the data changed by the power supply device 10 so that other power supply devices 10 connected in parallel can know, which means that each power supply device 10 can All the information of other power supply equipment 10 is collected in real time for utilization. The receiving circuit 11 will receive the data with the device identity code sent by all the power supply devices 10 connected in parallel, and the receiving circuit 11 will check the identity code field of each received data, if the identity code field If the bit is sent by itself, the entire data will be directly discarded. This mechanism is to take back the data sent by itself to avoid endless transmission of data. 11 pushes the entire data into the receiving buffer memory 12 and the transfer buffer memory 13 at the same time, so the power supply device 10 of this machine can obtain the information of all power supply devices 10 from the receiving buffer memory 12 . A high-efficiency parallel control system can be achieved through such a simplified communication protocol.

The above descriptions are only preferred embodiments of the present invention, and do not limit the present invention in any form. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone familiar with this professional technology Personnel, without departing from the scope of the technical solution of the present invention, when the technical content disclosed above can be used to make some changes or modifications to equivalent embodiments with equivalent changes, but all the content that does not depart from the technical solution of the present invention, according to the present invention Any simple modifications, equivalent changes and modifications made to the above embodiments by the technical essence still belong to the scope of the technical solutions of the present invention.

Claims (10)

1. A power supply apparatus, comprising:

a receiving circuit;

a receiving buffer memory electrically connected with the receiving circuit;

a transfer buffer memory electrically connected to the receiving circuit;

the receiving circuit receives data and checks whether identity information in the data is identical with local body information;

when the identity information in the data is different from the local identity information, the receiving circuit stores the data into the receiving buffer memory and stores the data into the transferring buffer memory as data to be transferred;

wherein the receiving circuit discards the data when the identity information in the data is the same as the native body information.

2. The power supply apparatus according to claim 1, further comprising:

a transmitting circuit electrically connected to the transfer buffer memory;

a transmitting buffer memory electrically connected to the transmitting circuit;

wherein the transmitting circuit checks whether the data to be transferred exists in the transfer buffer memory;

when the data to be transferred exist in the transfer buffer memory, the sending circuit sends the data to be transferred in the transfer buffer memory and checks whether the data to be sent exist in the sending buffer memory;

wherein when the data to be transferred is not in the transfer buffer memory, the transmitting circuit checks whether the data to be transmitted is in the transmission buffer memory;

and when the data to be transmitted exists in the transmission buffer memory, the transmission circuit transmits the data to be transmitted in the transmission buffer memory.

3. The power supply apparatus according to claim 2, further comprising:

a memory control and distribution unit electrically connected to the receiving buffer memory and the transmitting buffer memory;

a system memory electrically connected to the memory control and allocator;

wherein the memory control and allocator checks whether the data is in the receive buffer memory;

when the data are stored in the receiving buffer memory, the memory control and distributor stores the data into the system memory according to the identity information in the data, and checks whether the data to be transmitted exist in the system memory;

when the data is not in the receiving buffer memory, the memory control and distribution device checks whether the data to be transmitted is in the system memory;

when the data to be transmitted exists in the system memory, the memory control and distributor combines the data to be transmitted with the local body information and stores the combined data into the transmission buffer memory.

4. The power supply apparatus of claim 1, wherein the receive buffer and the transfer buffer are each a first-in-first-out register.

5. The power supply apparatus according to claim 1, wherein said receiving circuit re-receives said data after said receiving circuit discards said data;

and after the receiving circuit stores the data into the receiving buffer memory and stores the data into the transferring buffer memory as the data to be transferred, the receiving circuit re-receives the data.

6. The power supply apparatus according to claim 2, wherein when there is no data to be transmitted in the transmission buffer memory, the transmission circuit rechecks whether there is the data to be transferred in the transfer buffer memory;

and after the sending circuit sends the data to be sent in the sending buffer memory, the sending circuit rechecks whether the data to be sent exist in the sending buffer memory.

7. A power supply apparatus according to claim 3, wherein when there is no data to be transmitted in said system memory, said memory control and allocator rechecks whether there is said data in said reception buffer memory;

wherein after the memory control and allocator stores the data to be transmitted in the transmission buffer memory, the memory control and allocator rechecks whether the data exists in the reception buffer memory.

8. A data transmission method of a power supply device, which is executed by a power supply device and comprises the steps of:

receiving a data by a receiving circuit;

checking by the receiving circuit whether a piece of identity information in the data is identical to a piece of own identity information;

when the identity information in the data is different from the local identity information, the receiving circuit stores the data into a receiving buffer memory, and stores the data into a transferring buffer memory as data to be transferred;

discarding the data by the receiving circuit when the identity information in the data is the same as the local identity information.

9. The data transmission method of a power supply device according to claim 8, further comprising the steps of:

checking whether the data to be transferred exists in the transfer buffer memory by a sending circuit;

when the data to be transferred exist in the transfer buffer memory, the sending circuit sends the data to be transferred in the transfer buffer memory and checks whether the data to be sent exists in a sending buffer memory;

when the data to be transferred is not in the transfer buffer memory, checking whether the data to be transferred is in the transmission buffer memory or not by the transmitting circuit;

and when the data to be transmitted exists in the transmission buffer memory, the transmission circuit transmits the data to be transmitted in the transmission buffer memory.

10. The data transmission method of a power supply apparatus according to claim 9, further comprising:

checking, by a memory control and allocator, whether the data is in the receive buffer memory;

when the data is stored in the receiving buffer memory, the memory control and distributor stores the data into a system memory according to the identity information in the data, and checks whether the data to be sent exist in the system memory;

checking, by the memory control and allocator, whether the system memory has the data to be transmitted when the data is not in the receive buffer memory;

when the data to be transmitted exists in the system memory, the memory control and distributor combines the data to be transmitted with the local body information and stores the combined data into the transmission buffer memory.

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