CN116107489A - Power supply device and data transmission method thereof - Google Patents

Abstract

The invention relates to a power supply device and a data transmission method thereof. The receiving circuit receives a data and checks whether a body information in the data is identical to a body information. When the identity information is different from the local identity information, the receiving circuit stores the data into the receiving buffer memory and stores the data into the transferring buffer memory as data to be transferred. When the identity information is identical to the local identity information, the receiving circuit discards the data. Because the identity information in the data represents which power supply equipment sends the data, when the identity information is the same as the identity information of the host, the representing data is sent by the host, so that the data can be directly discarded without being processed, and the purpose of sharing the data with low delay and high synchronization is achieved.

Description

Power supply device and data transmission method thereof

Technical Field

The present invention relates to a power supply Device and a data transmission method, and more particularly, to a power supply Device and a data transmission method thereof capable of transmitting and sharing digital data, automatically configuring Device identity information (Device ID), and performing low-delay synchronization control when operating in parallel.

Background

The existing power supply equipment usually achieves the purpose of capacity expansion through parallel combination, besides the feedback control of the power end, analog signals are converted into digital data through a measurement technology, and after comparison and discrimination of a micro-processing operation or an operation circuit, each power supply equipment connected in parallel is quickly finely tuned and controlled, so that intelligent control is achieved.

In addition, the existing power supply apparatus generally selects a connector circuit for receiving and transmitting digital data using serial transmission for many years, but the transmission rate is generally low, and when the number of parallel connection of the existing power supply apparatus increases, the control efficiency of the existing power supply apparatus decreases rapidly, so that the control synchronism of the existing power supply apparatus cannot meet the requirement.

Therefore, there is still a need for further improvement in the existing power supply apparatus and the data transmission method thereof.

Disclosure of Invention

In view of the foregoing, the present invention provides a power supply apparatus and a data transmission method thereof, which provide data transmission between a plurality of power supply apparatuses with low delay and improve the synchronization of the power supply apparatuses.

The power supply device of the invention comprises a receiving circuit, a receiving buffer memory and a transferring buffer memory. The receiving circuit is electrically connected with the receiving buffer memory and the transferring buffer memory. The receiving circuit receives a data and checks whether a body information in the data is identical to a body information. When the identity information in the data is different from the local identity information, the receiving circuit stores the data into the receiving buffer memory, and stores the data into the transferring buffer memory as data to be transferred. When the identity information in the data is the same as the local identity information, the receiving circuit discards the data.

Further, the data transmission method of the power supply device is executed by the power supply device, and includes the following steps:

receiving a data by a receiving circuit;

checking whether a body information in the data is identical to a body information;

when the identity information in the data is different from the local identity information, the receiving circuit stores the data into a receiving buffer memory and stores the data into a transferring buffer memory as data to be transferred;

when the identity information in the data is the same as the local identity information, the data is discarded by the receiving circuit.

Because the identity information in the data represents which power supply device sends the data, when the identity information in the data is the same as the identity information of the host, the data is sent by the host, so that the pen data can be directly discarded without being considered, the processing time is reduced, the data is transmitted with low delay, and the synchronism of the power supply devices is improved.

Drawings

In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. In the drawings:

fig. 1A and 1B are schematic diagrams of a power supply system to which the power supply device of the present invention is applied.

Fig. 2 is a block schematic diagram of the power supply device of the present invention.

Fig. 3A is a flowchart illustrating steps performed by a receiving circuit in the data transmission method of the power supply device of the present invention.

Fig. 3B is a flowchart illustrating steps performed by the memory control and distribution unit in the data transmission method of the power supply device according to the present invention.

Fig. 3C is a flowchart illustrating steps performed by the transmitting circuit in the data transmission method of the power supply device of the present invention.

Detailed Description

The technical means adopted by the invention to achieve the preset aim are further described below by matching with the drawings and the preferred embodiments of the invention.

Referring to fig. 1A and 1B, the power supply apparatus 10 of the present invention can be used to form a power supply system with multiple series or parallel connection to supply power to a load 20, so as to expand the power capacity. One of the power supply devices 10 may be set as a master 10a, and the other power supply device 10 as a slave 10b, and control commands are generated by the master 10a and sent to the respective slaves 10b. In addition, the signal terminals a/B of the master 10a and the slave 10B are connected to each other through the connection line 100 to transmit data, and the power output terminals +/-of the master 10a and the slave 10B are electrically connected to the load 20 to supply power. For example, the signal connector B of the master 10a is connected to the signal connector a of the slave 10B through the connection line 100, and the signal connector B of the slave 10B is connected to the signal connector a of the next slave 10B through another connection line 100.

Referring to fig. 2, the power supply apparatus 10 of the present invention includes a receiving circuit 11, a receiving buffer 12, a forwarding buffer 13, a memory control and distribution unit 14, a system memory 15, a sending buffer 16 and a sending circuit 17.

The receiving circuit 11 is electrically connected to the receiving buffer 12 and the transfer buffer 13. The memory control and allocator 14 is electrically connected to the receive buffer memory 12. The system memory 15 is electrically connected to the memory control and allocator 14. The transmit buffer memory 16 is electrically connected to the memory control and allocator 14. The transmission circuit 17 is electrically connected to the transfer buffer memory 13 and the transmission buffer memory 16.

The receiving circuit 11 receives a data and checks whether a body information in the data is identical to a body information. When the identity information in the data is identical to the local identity information, the receiving circuit 11 stores the data in the receiving buffer 12 and stores the data as a data to be transferred in the transferring buffer 13. And when the receiving circuit 11 stores the data into the receiving buffer 12 and stores the data into the transferring buffer 13 as the data to be transferred, the receiving circuit 11 re-receives the data. And when the identity information in the data is different from the local identity information, the receiving circuit 11 discards the data. And when the receiving circuit 11 discards the data, the receiving circuit 11 re-receives the data.

In this embodiment, the data is a digital data.

In addition, referring to fig. 3A, the data transmission method of the power supply device of the present invention is performed by the power supply device 10, and includes the following steps:

receiving the data by the receiving circuit 11 (S301);

checking by the receiving circuit 11 whether the identity information in the data is identical to the own body information (S302);

wherein when the identity information in the data is the same as the local identity information, the receiving circuit 11 stores the data into the receiving buffer 12, and stores the data as the data to be transferred into the transferring buffer 13 (S303), and the receiving circuit 11 re-receives the data (S301);

when the identity information in the data is different from the local identity information, the receiving circuit 11 discards the data (S304), and then re-receives the data (S301).

Since the identity information in the data represents which power supply device 10 sends the data, when the identity information in the data is the same as the identity information of the host, the data is sent by the host, so that the data can be directly discarded without being processed, the time for processing the data is reduced, the data is transmitted with low delay, and the synchronism of the power supply device is improved.

In the preferred embodiment, the data includes the identity information and a parameter information, and the parameter information includes various parameters or control instructions of each power supply device.

For example, referring to fig. 1A and 2, when the host 10a generates a data and sends the data, the data is transferred between the host 10a and each slave 10b, and when the slave 10b receives the data, the receiving circuit 11 of each slave 10b checks that the identity information in the data is different from the identity information of the slave when each slave 10b receives the data because the data generated by the host 10a includes the identity information of the host 10a generating the data and is different from the identity information of each slave 10b, and stores the data in the receiving buffer 12 and the data as the data to be transferred in the transferring buffer 13. When the host 10a receives the data again, the receiving circuit 11 of the host 10a checks that the identity information in the data is the same as the host identity information, which means that the data is generated and transmitted by the host 10a, so the host 10a does not need to discard the data, and can discard the data directly, thereby avoiding repeated processing of the data and improving the processing efficiency.

Further, after the memory control and allocator 14 checks whether the data is in the receiving buffer memory 12, the memory control and allocator 14 further checks whether the data to be transmitted is in the system memory 15.

For example, when the data is stored in the receiving buffer 12, the memory control and distribution unit 14 stores the data into the system memory 15 according to the identity information in the data, and checks whether the data to be transmitted is stored in the system memory 15. Since the storage space is allocated in the system memory 15 in advance according to each identity information, when the memory control and allocator 14 stores the data into the system memory 15, the data is stored into the storage space corresponding to the identity information in the system memory 15 according to the identity information in the data.

When the data is not in the receiving buffer memory 12, the memory control and allocator 14 directly checks whether the data to be transmitted is in the system memory 15.

When the data to be transmitted is present in the system memory 15, the memory control and distribution unit 14 merges the data to be transmitted with the local body information and stores the merged body information into the transmission buffer memory 16, and the memory control and distribution unit 14 rechecks whether the data is present in the reception buffer memory 12.

But when the data to be transmitted is not present in the system memory 15, the memory control and allocator 14 rechecks whether the data is present in the receive buffer memory 12.

That is, the memory control and allocator 14 alternately checks whether the data or the data to be transmitted exists in the receiving buffer memory 12 and the system memory 15. Further, the data stored in the system memory 15 is provided for subsequent use by the power supply device 10. For example, since the data further includes the parameter information, and the parameter information includes various parameters or control instructions of each power supply device, after the data is stored in the system memory 15, a system central processing unit of the power supply device can perform parameter setting on the power supply device 10 according to the parameter information in the system memory 15, such as adjusting output voltage, current, or setting start time.

Referring to fig. 3B, the data transmission method of the power supply device further includes the following steps:

checking by the memory control and allocator 14 whether the data is in the receive buffer memory 12 (S401);

when the data is stored in the receiving buffer memory 12, the memory control and distributor 14 stores the data into the system memory 15 according to the identity information in the data (S402), and checks whether the data to be transmitted is stored in the system memory 15 (S403);

when the data is not in the receiving buffer memory 12, directly checking by the memory control and allocator 14 whether the data to be transmitted is in the system memory 15 (S403);

when the data to be transmitted is present in the system memory 15, the memory control and distributor 14 merges the local body information with the data to be transmitted, stores the merged body information into the transmission buffer memory 16 (S404), and rechecks whether the data is present in the reception buffer memory 12 after the completion (S401);

when the data to be transmitted is not present in the system memory 15, the memory control and allocator 14 rechecks whether the data is present in the reception buffer memory 12 (S401).

By alternately checking whether the data in the receiving buffer memory 12 needs to be stored in the system memory 15 and whether the data to be transmitted in the system memory 15 needs to be stored in the transmitting buffer memory 16, the power supply device 10 can store the data transmitted by other power supply devices into the system memory 15 for subsequent use, and transmit the data to be transmitted in the system memory to other power supply devices 10, so as to stably receive and transmit the data.

Furthermore, the transmitting circuit 17 checks whether the data to be transferred is present in the transfer buffer 13. When the data to be transferred is present in the transfer buffer memory 13, the transmitting circuit 17 transmits the data to be transferred in the transfer buffer memory 13. When the transfer buffer memory 13 has no data to be transferred, the transmitting circuit 17 further checks whether there is data to be transmitted in the transmitting buffer memory 16. When the transmission buffer 16 has the data to be transmitted, the transmission circuit 17 rechecks whether the transmission buffer 16 has the data to be transmitted after the transmission circuit 17 transmits the data to be transmitted in the transmission buffer 16. When the transmission buffer 16 does not have the data to be transmitted, the transmission circuit 17 rechecks whether the data to be transmitted is in the transfer buffer 13.

Further, referring to fig. 3C, the data transmission method of the power supply device further includes the following steps:

checking by the transmitting circuit 17 whether the data to be transferred is present in the transfer buffer memory 13 (S501);

when the data to be transferred is present in the transfer buffer memory 13, the data to be transferred in the transfer buffer memory 13 is transmitted by the transmitting circuit 17 (S502);

when the transfer buffer memory 13 does not have the data to be transferred, checking by the transmitting circuit 17 whether the data to be transmitted is present in the transmitting buffer memory 16 (S503);

when the data to be transmitted is present in the transmission buffer 16, the data to be transmitted of the transmission buffer 16 is transmitted by the transmission circuit 17 (S504), and the transmission circuit 17 rechecks whether the data to be transferred is present in the transfer buffer 13 (S501);

when there is no data to be transmitted in the transmission buffer memory 16, the transmission circuit 17 rechecks whether there is the data to be transferred in the transfer buffer memory 13 (S501).

By alternately checking whether the data to be transferred exists in the transfer buffer memory 13 and whether the data to be transmitted exists in the transmission buffer memory 16, the power supply device 10 can transfer the data transmitted from other power supply devices and can generate self-generated data for transmission to other power supply devices 10, thereby stably transferring and transmitting the data.

In the preferred embodiment, the receive buffer 12, the forward buffer 13, and the transmit buffer 16 are each a first-in-first-out (First Input First Output; FIFO) register.

In addition, referring to fig. 1A, the power device 10 further includes an identity information setting procedure during the initial system setting. When the power supply system is formed by connecting the plurality of power supply devices 10 in series or in parallel, and the master 10a and the slaves 10B in the plurality of power supply devices 10 of the power supply system are connected with each other through the signal connector a/B, the identity information setting program can be executed first to set the identity information of the master 10a and the slaves 10B. For example, at the initial system setting, the identity information of the master 10a is preset to a minimum value, e.g., 0x00, while the identity information of the other slaves 10b is preset to a maximum value, e.g., 0xFF. When the identity information setting program is executed, the host 10a sends an identity information setting signal to the first slave 10b, and the identity information setting signal includes the identity information of the host 10a and parameter information, for example, the identity information of the host 10a is 0x00, and the parameter information is 0x00.

When the first slave 10b receives the identity information setting signal, the first slave 10b first checks whether the identity information in the identity information setting signal is identical to its own identity information. When the identity information in the received identity information setting signal is identical to the own identity information, the first slave 10b directly discards the identity information setting signal.

However, when the identity information in the received identity information setting signal is different from the own-body information, the first slave 10b adds 1 to the parameter information in the identity information setting signal, and sets the parameter information as own-body information.

For example, the initial setting of the identity information of the first slave 10b is 0xFF, and the identity information in the received identity information setting signal is the identity information of the master 10a, i.e. 0x00. Since the identity information "0x00" received by the first slave 10b is not identical to the identity information "0xFF" of the first slave 10b itself, the first slave 10b sets the identity information of the parameter information 0x00 to 0x01 after adding 1, and additionally generates and transmits a new identity information setting signal to the next slave 10b.

The identity information setting signal generated by the first slave 10b includes the identity information of the master 10a and the parameter information of the first slave 10b, for example, the identity information in the identity information setting signal transmitted by the first slave 10b is 0x00, and the parameter information is 0x01. Similarly, the identity information of all the slaves 10b is set.

When the host 10a receives the identity information setting signal sent by the last slave 10b, the host 10a checks whether the identity information in the received identity information setting signal is the same as the identity information of the host, and when the identity information in the received identity information setting signal is the same as the identity information of the host 10a, the host 10a directly discards the identity information setting signal and ends the identity information setting procedure.

For example, the identity information in the last identity information setting signal transmitted from the slave 10b is 0x00, and the host 10a has the host identity information of 0x00, so that the host 10a can determine that the identity information in the identity information setting signal is identical to the host identity information.

In addition, the host 10a further adds 1 to the parameter information in the identity information setting signal sent by the last slave 10b, and then sets the parameter information as a device number information for later confirming whether the slave 10b is disconnected.

As described above, the power supply device of the present invention uses a serial/deserializer (Ser/Des) as a transmission connector, which is more rapid and is commonly used in a programmable logic array (Field Programming Gate Array, FPGA), and is used to handle the received and transmitted data in conjunction with a state machine (Finite State Machine, FSM) process or protocol circuit. The power device 10 includes the receiving circuit (rx_logic) 11, the transmitting circuit (tx_logic) 17, and three first-in first-out (First In First Out FIFO) buffers, which are the receiving buffer (rx_fifo) 12, the transmitting buffer (tx_fifo) 16, and the forwarding buffer (forward_fifo) 13, respectively. The transmitting circuit 17 checks in turn whether the transmitting buffer 16 and the forwarding buffer 13 have data to be transmitted, and since the data contains an equipment identity code, i.e. the identity information, representing which power supply device 10 the data is transmitted from, the equipment identity code is stored in the transmitting buffer 16, which means that sharing the data changed by the power supply devices 10 allows the other power supply devices 10 connected in parallel to know, which means that each power supply device 10 can collect all the information of the other power supply devices 10 in real time for use. The receiving circuit 11 receives all the data with the device id sent by the power devices 10 connected in parallel, and the receiving circuit 11 checks the id field of each received data, if the id field is sent by itself, the whole data is directly discarded, this mechanism is to retrieve the data sent by itself, avoiding endless transmission of the data, if the receiving circuit 11 confirms that the data is sent by other power devices 10 according to the id field, the receiving circuit 11 pushes the whole data into the receiving buffer memory 12 and the transferring buffer memory 13 at the same time, so that the local power device 10 can obtain the information of all the power devices 10 from the receiving buffer memory 12. A highly efficient parallel control system is achieved via such a reduced protocol.

The present invention is not limited to the above-mentioned embodiments, but is not limited to the above-mentioned embodiments, and any simple modification, equivalent changes and modification made to the above-mentioned embodiments according to the technical matters of the present invention can be made by those skilled in the art without departing from the scope of the present invention.

Claims (10)

1. A power supply apparatus, comprising:

a receiving circuit;

a receiving buffer memory electrically connected with the receiving circuit;

a transfer buffer memory electrically connected to the receiving circuit;

the receiving circuit receives data and checks whether identity information in the data is identical with local body information;

when the identity information in the data is different from the local identity information, the receiving circuit stores the data into the receiving buffer memory and stores the data into the transferring buffer memory as data to be transferred;

wherein the receiving circuit discards the data when the identity information in the data is the same as the native body information.

2. The power supply apparatus according to claim 1, further comprising:

a transmitting circuit electrically connected to the transfer buffer memory;

a transmitting buffer memory electrically connected to the transmitting circuit;

wherein the transmitting circuit checks whether the data to be transferred exists in the transfer buffer memory;

when the data to be transferred exist in the transfer buffer memory, the sending circuit sends the data to be transferred in the transfer buffer memory and checks whether the data to be sent exist in the sending buffer memory;

wherein when the data to be transferred is not in the transfer buffer memory, the transmitting circuit checks whether the data to be transmitted is in the transmission buffer memory;

and when the data to be transmitted exists in the transmission buffer memory, the transmission circuit transmits the data to be transmitted in the transmission buffer memory.

3. The power supply apparatus according to claim 2, further comprising:

a memory control and distribution unit electrically connected to the receiving buffer memory and the transmitting buffer memory;

a system memory electrically connected to the memory control and allocator;

wherein the memory control and allocator checks whether the data is in the receive buffer memory;

when the data are stored in the receiving buffer memory, the memory control and distributor stores the data into the system memory according to the identity information in the data, and checks whether the data to be transmitted exist in the system memory;

when the data is not in the receiving buffer memory, the memory control and distribution device checks whether the data to be transmitted is in the system memory;

when the data to be transmitted exists in the system memory, the memory control and distributor combines the data to be transmitted with the local body information and stores the combined data into the transmission buffer memory.

4. The power supply apparatus of claim 1, wherein the receive buffer and the transfer buffer are each a first-in-first-out register.

5. The power supply apparatus according to claim 1, wherein said receiving circuit re-receives said data after said receiving circuit discards said data;

and after the receiving circuit stores the data into the receiving buffer memory and stores the data into the transferring buffer memory as the data to be transferred, the receiving circuit re-receives the data.

6. The power supply apparatus according to claim 2, wherein when there is no data to be transmitted in the transmission buffer memory, the transmission circuit rechecks whether there is the data to be transferred in the transfer buffer memory;

and after the sending circuit sends the data to be sent in the sending buffer memory, the sending circuit rechecks whether the data to be sent exist in the sending buffer memory.

7. A power supply apparatus according to claim 3, wherein when there is no data to be transmitted in said system memory, said memory control and allocator rechecks whether there is said data in said reception buffer memory;

wherein after the memory control and allocator stores the data to be transmitted in the transmission buffer memory, the memory control and allocator rechecks whether the data exists in the reception buffer memory.

8. A data transmission method of a power supply device, which is executed by a power supply device and comprises the steps of:

receiving a data by a receiving circuit;

checking by the receiving circuit whether a piece of identity information in the data is identical to a piece of own identity information;

when the identity information in the data is different from the local identity information, the receiving circuit stores the data into a receiving buffer memory, and stores the data into a transferring buffer memory as data to be transferred;

discarding the data by the receiving circuit when the identity information in the data is the same as the local identity information.

9. The data transmission method of a power supply device according to claim 8, further comprising the steps of:

checking whether the data to be transferred exists in the transfer buffer memory by a sending circuit;

when the data to be transferred exist in the transfer buffer memory, the sending circuit sends the data to be transferred in the transfer buffer memory and checks whether the data to be sent exists in a sending buffer memory;

when the data to be transferred is not in the transfer buffer memory, checking whether the data to be transferred is in the transmission buffer memory or not by the transmitting circuit;

and when the data to be transmitted exists in the transmission buffer memory, the transmission circuit transmits the data to be transmitted in the transmission buffer memory.

10. The data transmission method of a power supply apparatus according to claim 9, further comprising:

checking, by a memory control and allocator, whether the data is in the receive buffer memory;

when the data is stored in the receiving buffer memory, the memory control and distributor stores the data into a system memory according to the identity information in the data, and checks whether the data to be sent exist in the system memory;

checking, by the memory control and allocator, whether the system memory has the data to be transmitted when the data is not in the receive buffer memory;

when the data to be transmitted exists in the system memory, the memory control and distributor combines the data to be transmitted with the local body information and stores the combined data into the transmission buffer memory.

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