CN116093084A - Switching plate structure and forming method thereof - Google Patents

Switching plate structure and forming method thereof Download PDF

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Publication number
CN116093084A
CN116093084A CN202310083152.1A CN202310083152A CN116093084A CN 116093084 A CN116093084 A CN 116093084A CN 202310083152 A CN202310083152 A CN 202310083152A CN 116093084 A CN116093084 A CN 116093084A
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capacitor
substrate
trench
inductor
forming
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殷翔
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National Center for Advanced Packaging Co Ltd
Shanghai Xianfang Semiconductor Co Ltd
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National Center for Advanced Packaging Co Ltd
Shanghai Xianfang Semiconductor Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/707Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/645Inductive arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The invention relates to an adapter plate structure, which comprises two bonded first adapter plates, wherein the first adapter plates comprise: a substrate; a plurality of interconnected trench capacitor structures located on a front side of the substrate, wherein the trench capacitor structures comprise: a plurality of trenches located on the front side of the substrate; a capacitor lower electrode covering an inner wall of the trench; the capacitor medium is positioned on one side surface of the capacitor lower electrode, which is away from the inner wall of the groove; the capacitor upper electrode is positioned on one side surface of the capacitor medium, which is away from the capacitor lower electrode; and the inductor is positioned on the back surface of the substrate and is electrically connected with the groove capacitor structure. The capacitor is integrated in the adapter plate, the inductor is integrated on the surface of the adapter plate, the occupied space of two devices is greatly reduced, the distance between the inductor and the groove capacitor structure is far, the isolation degree is high, the interference between the inductor and the groove capacitor structure is reduced, the dielectric loss is reduced, and the Q value of the inductor is improved; and the trench capacitor structure is used, so that the capacitor density is improved, and the capacitance value can be effectively improved.

Description

一种转接板结构及其形成方法An adapter plate structure and its forming method

技术领域technical field

本发明涉及半导体封装技术领域,尤其涉及一种转接板结构及其形成方法。The invention relates to the technical field of semiconductor packaging, in particular to an adapter plate structure and a forming method thereof.

背景技术Background technique

近年来,随着无线通信市场的飞速发展,低造价、高性能的片上射频器件的需求也在不断地增加,为了满足低损耗、高集成度的要求,片上集成电感已成为压控振荡器、低噪声放大器、混频器以及滤波器等许多通信模块中的重要元件。电容是微波射频电路中不可缺少的元件,有直流隔离、滤波、耦合、调谐、整流等作用。由于集成电路的工作频率越来越高,速率越来越快,电子系统中的电路供电网络的噪声问题也越来越严重,对于电容的退耦作用的需求也迅速提高。In recent years, with the rapid development of the wireless communication market, the demand for low-cost, high-performance on-chip radio frequency devices is also increasing. In order to meet the requirements of low loss and high integration, on-chip integrated inductors have become voltage-controlled oscillators, Important components in many communication modules such as low noise amplifiers, mixers, and filters. Capacitors are indispensable components in microwave radio frequency circuits, and have the functions of DC isolation, filtering, coupling, tuning, and rectification. As the operating frequency of integrated circuits is getting higher and higher, the speed is getting faster and faster, and the noise problem of the circuit power supply network in the electronic system is becoming more and more serious, and the demand for the decoupling effect of the capacitor is also rapidly increasing.

常规I PD电容主要以M I M形式,通过两层平面金属电极实现,但由于平面空间有限,这种电容结构通常无法获得较大的电容值。现有技术中转接板包含电感和M I M形式的电容,电容和电感通常集成在一起,二者间的距离较近,相互之间有较大的干扰,电感会有介质损耗,限制了电感的性能。Conventional IPD capacitors are mainly in the form of MIM, realized by two layers of planar metal electrodes, but due to the limited planar space, this capacitor structure usually cannot obtain a large capacitance value. In the prior art, the adapter board contains inductors and capacitors in the form of M I M . Capacitors and inductors are usually integrated together. The distance between the two is relatively close, and there is greater interference between them. The inductor has a dielectric loss, which limits the Inductive performance.

发明内容Contents of the invention

为解决现有技术中的上述问题中的至少一部分问题,本发明提供了一种转接板结构,包括两个键合的第一转接板,其中所述第一转接板包括:In order to solve at least some of the above-mentioned problems in the prior art, the present invention provides an adapter plate structure, including two bonded first adapter plates, wherein the first adapter plate includes:

衬底;Substrate;

多个互连的沟槽电容结构,其位于所述衬底的正面,其中所述沟槽电容结构包括:位于所述衬底的正面的多个沟槽;电容下电极,其覆盖所述沟槽的内壁;电容介质,其位于所述电容下电极背离沟槽内壁的一侧表面;电容上电极,其位于所述电容介质背离电容下电极的一侧表面;A plurality of interconnected trench capacitor structures located on the front side of the substrate, wherein the trench capacitor structures include: a plurality of trenches located on the front side of the substrate; a capacitor bottom electrode covering the trenches The inner wall of the groove; the capacitance medium, which is located on the side surface of the lower electrode of the capacitance away from the inner wall of the groove; the upper electrode of the capacitance, which is located on the surface of the side of the capacitance medium away from the lower electrode of the capacitance;

电感,其位于所述衬底的背面,并与沟槽电容结构电连接。An inductor is located on the backside of the substrate and is electrically connected to the trench capacitor structure.

进一步地,还包括:Further, it also includes:

导电件,其位于所述沟槽电容结构的侧面且与沟槽电容结构间隔;a conductive member positioned on a side of the trench capacitor structure and spaced from the trench capacitor structure;

第一重布线层,其电连接所述导电件与所述沟槽电容结构;a first redistribution layer, which is electrically connected to the conductive member and the trench capacitance structure;

第二重布线层,其电连接所述导电件与所述电感。The second redistribution layer is electrically connected to the conductive element and the inductor.

进一步地,所述衬底具有通孔,所述导电件位于所述通孔中。Further, the substrate has a through hole, and the conductive member is located in the through hole.

进一步地,还包括:Further, it also includes:

第一绝缘层,其位于电容下电极与沟槽内壁之间;The first insulating layer is located between the lower electrode of the capacitor and the inner wall of the trench;

第二绝缘层,其位于电容上电极背离电容介质的一侧表面;The second insulating layer is located on the surface of the capacitor upper electrode away from the capacitor medium;

第三绝缘层,其位于通孔内壁与导电件之间;The third insulating layer is located between the inner wall of the through hole and the conductive member;

第四绝缘层,其位于衬底的背面。A fourth insulating layer is located on the backside of the substrate.

进一步地,所述电容下电极延伸至第一绝缘层背离所述衬底的上表面;多个所述沟槽电容结构的电容下电极之间电连接;Further, the capacitor lower electrode extends to the upper surface of the first insulating layer away from the substrate; the capacitor lower electrodes of the multiple trench capacitor structures are electrically connected;

第一重布线层电连接所述电容下电极。The first redistribution layer is electrically connected to the lower electrode of the capacitor.

进一步地,两个所述第一转接板的第一重布线层键合,使得两个所述第一转接板键合形成转接板结构。Further, the first redistribution layers of the two first riser boards are bonded, so that the two first riser boards are bonded to form a riser board structure.

本发明还提供了一种转接板结构的形成方法,包括:先形成第一转接板,然后将两个第一转接板键合形成转接板结构,其中形成第一转接板包括:The present invention also provides a method for forming an adapter plate structure, comprising: first forming a first adapter plate, and then bonding two first adapter plates to form an adapter plate structure, wherein forming the first adapter plate includes :

在衬底的正面形成沟槽;forming trenches on the front side of the substrate;

在沟槽的内壁形成电容下电极;Forming a capacitor lower electrode on the inner wall of the trench;

在电容下电极背离沟槽的内壁的一侧表面形成电容介质;A capacitor medium is formed on the side surface of the capacitor lower electrode away from the inner wall of the trench;

在电容介质背离电容下电极的一侧表面形成电容上电极;Form the upper electrode of the capacitor on the surface of the capacitor medium away from the lower electrode of the capacitor;

在衬底的正面形成通孔;forming via holes on the front side of the substrate;

在通孔中形成导电件;forming conductive elements in the via holes;

在衬底的正面形成连接导电件与电容下电极的第一重布线层;forming a first redistribution layer connecting the conductive member and the lower electrode of the capacitor on the front surface of the substrate;

将衬底的背面减薄,露出导电件;Thinning the back of the substrate to expose the conductive parts;

在衬底的背面布置电感和第二重布线层,最终得到第一转接板。The inductor and the second redistribution layer are arranged on the backside of the substrate to finally obtain the first interposer board.

进一步地,还包括:Further, it also includes:

在沟槽的内壁形成电容下电极之前,在衬底的正面和沟槽的内壁形成第一绝缘层;Before forming the capacitor bottom electrode on the inner wall of the trench, a first insulating layer is formed on the front surface of the substrate and the inner wall of the trench;

在衬底的正面形成通孔之前,在电容上电极背离电容介质的一侧表面形成第二绝缘层;Before forming a through hole on the front side of the substrate, a second insulating layer is formed on the surface of the capacitor upper electrode away from the capacitor medium;

在通孔中形成导电件之前,在通孔的内壁形成第三绝缘层。Before forming the conductive member in the through hole, a third insulating layer is formed on the inner wall of the through hole.

进一步地,通过将两个第一转接板的第一重布线层键合,得到转接板结构。Further, an interposer structure is obtained by bonding the first redistribution layers of the two first interposers.

进一步地,首先在衬底的背面形成第四绝缘层,并刻蚀第四绝缘层形成电感图形和重布线图形,然后在电感图形和重布线图形中填充金属形成电感和第二重布线层,其中所述电感和所述第二重布线层一体成型。Further, firstly, a fourth insulating layer is formed on the back side of the substrate, and the fourth insulating layer is etched to form an inductor pattern and a rewiring pattern, and then metal is filled in the inductor pattern and the rewiring pattern to form an inductor and a second rewiring layer, Wherein the inductor and the second redistribution layer are integrally formed.

本发明至少具有下列有益效果:本发明公开的一种转接板结构及其形成方法,在该转接板结构中将电容集成在转接板的内部,将电感集成在转接板的表面,大大减小了两种器件所占空间,且电感和沟槽电容结构之间距离较远,隔离度高,降低了二者之间的干扰,降低了介质损耗,提升了电感Q值;相比于一般平面M I M电容,使用沟槽电容结构,提高了电容密度,可以有效提升电容值。The present invention has at least the following beneficial effects: an adapter plate structure disclosed by the present invention and its forming method, in which the capacitor is integrated inside the adapter plate, and the inductance is integrated on the surface of the adapter plate, The space occupied by the two devices is greatly reduced, and the distance between the inductor and the trench capacitor structure is relatively long, the isolation is high, the interference between the two is reduced, the dielectric loss is reduced, and the Q value of the inductor is improved; compared with Compared with general planar MIM capacitors, the trench capacitor structure is used to increase the capacitance density and effectively increase the capacitance value.

附图说明Description of drawings

为了进一步阐明本发明的各实施例的以上和其它优点和特征,将参考附图来呈现本发明的各实施例的更具体的描述。可以理解,这些附图只描绘本发明的典型实施例,因此将不被认为是对其范围的限制。在附图中,为了清楚明了,相同或相应的部件将用相同或类似的标记表示。In order to further clarify the above and other advantages and features of various embodiments of the present invention, a more particular description of various embodiments of the present invention will be presented with reference to the accompanying drawings. It is understood that the drawings depict only typical embodiments of the invention and therefore are not to be considered limiting of its scope. In the drawings, the same or corresponding parts will be denoted by the same or similar symbols for clarity.

图1示出了本发明一个实施例的一种转接板结构的剖面示意图;以及FIG. 1 shows a schematic cross-sectional view of an adapter plate structure according to an embodiment of the present invention; and

图2A至2N示出了本发明一个实施例的形成转接板结构的过程剖面示意图。2A to 2N are schematic cross-sectional views showing the process of forming the interposer structure according to an embodiment of the present invention.

具体实施方式Detailed ways

应当指出,各附图中的各组件可能为了图解说明而被夸大地示出,而不一定是比例正确的。It should be noted that components in the various figures may be shown exaggerated for the purpose of illustration and are not necessarily true to scale.

在本发明中,各实施例仅仅旨在说明本发明的方案,而不应被理解为限制性的。In the present invention, each embodiment is only intended to illustrate the solutions of the present invention, and should not be construed as limiting.

在本发明中,除非特别指出,量词“一个”、“一”并未排除多个元素的场景。In the present invention, unless otherwise specified, the quantifiers "a" and "an" do not exclude the scene of multiple elements.

在此还应当指出,在本发明的实施例中,为清楚、简单起见,可能示出了仅仅一部分部件或组件,但是本领域的普通技术人员能够理解,在本发明的教导下,可根据具体场景需要添加所需的部件或组件。It should also be pointed out here that in the embodiments of the present invention, for the sake of clarity and simplicity, only a part of parts or components may be shown, but those skilled in the art can understand that under the teaching of the present invention, specific The scene needs to add the required parts or components.

在此还应当指出,在本发明的范围内,“相同”、“相等”、“等于”等措辞并不意味着二者数值绝对相等,而是允许一定的合理误差,也就是说,所述措辞也涵盖了“基本上相同”、“基本上相等”、“基本上等于”。It should also be pointed out that within the scope of the present invention, expressions such as "same", "equal", and "equal to" do not mean that the two values are absolutely equal, but allow a certain reasonable error, that is, the Wording also covers "substantially the same", "substantially equal", "substantially equal to".

在此还应当指出,在本发明的描述中,术语“中心”、“纵向”、“横向”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是明示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为明示或暗示相对重要性。It should also be noted that in the description of the present invention, the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", The orientations or positional relationships indicated by "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplified descriptions, rather than explicitly or implying that the devices or elements referred to must have a specific orientation, be constructed and operate in a specific orientation, and thus should not be construed as limiting the invention. In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be interpreted as expressing or implying relative importance.

另外,本发明的实施例以特定顺序对工艺步骤进行描述,然而这只是为了方便区分各步骤,而并不是限定各步骤的先后顺序,在本发明的不同实施例中,可根据工艺的调节来调整各步骤的先后顺序。In addition, the embodiments of the present invention describe the process steps in a specific order, but this is only for the convenience of distinguishing the steps, and does not limit the order of the steps. In different embodiments of the present invention, it can be adjusted according to the process Adjust the sequence of steps.

目前电容、电感结构的集成主要有以下方式:At present, the integration of capacitor and inductor structures mainly has the following methods:

1.使用片上电容元件实现集成,该方式使用的电容多为M I M形式的平面电容,通过水平方向的两层金属电极板夹上电容介质层形成M I M电容结构。1. Use on-chip capacitive elements to achieve integration. The capacitors used in this method are mostly planar capacitors in the form of M I M. The M I M capacitor structure is formed by sandwiching the capacitor dielectric layer between two layers of metal electrode plates in the horizontal direction.

2.使用片上电感元件实现集成,该方式使用的电感多为的平面螺旋电感结构,利用10um以下厚度的重布线层作为电感金属线圈,且在现有技术的转接板中将电容、电感集成在一起,二者间的距离较近,相互之间有较大的干扰,电感会有介质损耗,限制了电感的性能。2. Use on-chip inductance elements to achieve integration. Most of the inductance used in this method is a planar spiral inductance structure. The redistribution layer with a thickness of less than 10um is used as the inductance metal coil, and the capacitor and inductance are integrated in the existing technology adapter board Together, the distance between the two is relatively short, and there is greater interference between them, and the inductance will have a dielectric loss, which limits the performance of the inductance.

上述电容、电感结构的集成方式中电容受面积开销限制,容值有限,电容密度低,且电容、电感集成使用时会占用较大的平面面积开销。In the integration method of the above-mentioned capacitor and inductor structure, the capacitor is limited by the area cost, the capacitance is limited, the capacitor density is low, and the integrated use of the capacitor and inductor will occupy a large plane area cost.

本发明提供一种转接板结构及其形成方法,在衬底内形成沟槽电容结构阵列,由槽侧壁的导体-高K值介质-中间导体壁成电容,在转接板背面形成电感,利用上方若干层重布线层引出电容下电极和电感,构造串/并联电容、电感结构。将电容集成在转接板的内部,将电感集成在转接板的表面,大大减小了两种器件所占空间,且电感和沟槽电容结构之间距离较远,隔离度高,降低了二者之间的干扰,降低了介质损耗,提升了电感Q值;相比于一般平面M I M电容,使用沟槽电容结构,提高了电容密度,可以有效提升电容值。The present invention provides an adapter board structure and its forming method. A trench capacitance structure array is formed in the substrate, and the capacitor is formed by the conductor on the side wall of the groove-high K value medium-intermediate conductor wall, and the inductance is formed on the back of the adapter board. , using several layers of rewiring layers above to lead out the lower electrode of the capacitor and the inductor to construct a series/parallel capacitor and inductor structure. The capacitor is integrated inside the adapter board, and the inductor is integrated on the surface of the adapter board, which greatly reduces the space occupied by the two devices, and the distance between the inductor and the trench capacitor structure is relatively long, and the isolation is high, reducing the The interference between the two reduces the dielectric loss and improves the Q value of the inductor; compared with the general planar MIM capacitor, the use of the trench capacitor structure increases the capacitance density and can effectively increase the capacitance value.

下面结合具体实施例来介绍所述转接板结构。The structure of the adapter board will be described below in combination with specific embodiments.

图1A示出了本发明一个实施例的一种转接板结构的剖面示意图。图1B示出了本发明一个实施例的一种转接板结构的俯视示意图。FIG. 1A shows a schematic cross-sectional view of an adapter plate structure according to an embodiment of the present invention. FIG. 1B shows a schematic top view of an adapter plate structure according to an embodiment of the present invention.

如图1A和1B所示,一种转接板结构包括两个键合的第一转接板,其中第一转接板包括衬底101、沟槽电容结构、电感105、导电件106、第一重布线层107和第二重布线层108。As shown in FIGS. 1A and 1B , an interposer structure includes two bonded first interposer plates, wherein the first interposer plate includes a substrate 101, a trench capacitor structure, an inductor 105, a conductive member 106, and a first interposer plate. A redistribution layer 107 and a second redistribution layer 108 .

多个互连的沟槽电容结构,其位于衬底101的正面。沟槽电容结构包括位于衬底101正面的多个沟槽;电容下电极102,其覆盖沟槽的内壁;电容介质103,其位于电容下电极102背离沟槽内壁的一侧表面;电容上电极104,其位于电容介质103背离电容下电极102的一侧表面。多个沟槽电容结构的电容下电极102之间电连接,使得多个沟槽电容结构之间串联。多个互连的沟槽电容结构构成电容阵列。A plurality of interconnected trench capacitor structures are located on the front side of the substrate 101 . The trench capacitor structure comprises a plurality of grooves located on the front of the substrate 101; the capacitor lower electrode 102, which covers the inner wall of the groove; the capacitor medium 103, which is located on the side surface of the capacitor lower electrode 102 away from the inner wall of the groove; the capacitor upper electrode 104, which is located on the surface of the capacitor medium 103 facing away from the capacitor lower electrode 102. The capacitor bottom electrodes 102 of the plurality of trench capacitor structures are electrically connected, so that the plurality of trench capacitor structures are connected in series. A plurality of interconnected trench capacitor structures form a capacitor array.

电感105,其位于衬底101的背面。电感105与沟槽电容结构电连接。The inductor 105 is located on the backside of the substrate 101 . The inductor 105 is electrically connected to the trench capacitor structure.

导电件106,其位于沟槽电容结构的侧面且与沟槽电容结构间隔。导电件106贯穿衬底101。所述衬底101具有通孔,所述导电件106位于通孔中。通孔贯穿衬底101,位于沟槽电容结构的侧面且与沟槽电容结构间隔。The conductive member 106 is located on the side of the trench capacitor structure and spaced from the trench capacitor structure. The conductive member 106 runs through the substrate 101 . The substrate 101 has a through hole, and the conductive element 106 is located in the through hole. The via hole penetrates through the substrate 101 , is located on a side of the trench capacitor structure and is spaced from the trench capacitor structure.

第一重布线层107,其电连接导电件106与沟槽电容结构。第一重布线层107电连接沟槽电容结构的电容下电极102。第一重布线层107位于衬底101的正面。The first redistribution layer 107 is electrically connected to the conductive element 106 and the trench capacitor structure. The first redistribution layer 107 is electrically connected to the capacitor bottom electrode 102 of the trench capacitor structure. The first redistribution layer 107 is located on the front side of the substrate 101 .

第二重布线层108,其电连接导电件106与电感105。第二重布线层108位于衬底101的背面。第二重布线层108与电感105一体成型。The second redistribution layer 108 is electrically connected to the conductive element 106 and the inductor 105 . The second redistribution layer 108 is located on the backside of the substrate 101 . The second redistribution layer 108 is integrally formed with the inductor 105 .

上述转接板结构还包括:位于电容下电极102与沟槽内壁之间的第一绝缘层109;位于电容上电极104背离电容介质103的一侧表面的第二绝缘层110;位于通孔内壁与导电件106之间的第三绝缘层111;位于衬底101背面的第四绝缘层112。第四绝缘层112包围第二重布线层108。The above adapter plate structure also includes: a first insulating layer 109 located between the capacitor lower electrode 102 and the inner wall of the groove; a second insulating layer 110 located on the side surface of the capacitor upper electrode 104 away from the capacitor medium 103; located on the inner wall of the through hole The third insulating layer 111 between the conductive member 106 ; the fourth insulating layer 112 located on the back of the substrate 101 . The fourth insulating layer 112 surrounds the second redistribution layer 108 .

第一绝缘层109覆盖衬底101的正面和沟槽的内壁。The first insulating layer 109 covers the front surface of the substrate 101 and the inner wall of the trench.

电容下电极102延伸至第一绝缘层背离衬底101的上表面。The capacitor lower electrode 102 extends to the upper surface of the first insulating layer away from the substrate 101 .

两个第一转接板的第一重布线层107键合,使得两个第一转接板键合形成转接板结构。两个第一转接板之间是面对面键合。The first redistribution layers 107 of the two first interposer boards are bonded, so that the two first interposer boards are bonded to form an interposer board structure. There is face-to-face bonding between the two first adapter plates.

上述转接板结构中上下两个电感并联构成三维电感,上下两个电容阵列之间并联。上述转接板结构中将电容结构集成在转接板的内部,将电感集成在转接板的表面,大大减小了两种器件所占空间,且电感和沟槽电容结构之间距离较远,隔离度高,降低了二者之间的干扰,降低了介质损耗,提升了Q值。相比于一般平面M I M电容,使用沟槽电容结构,提高了电容密度,可以有效提升电容值,可以自由放置于所需电路附近,可以有效优化电源质量。上述转接板结构在使用时,可以灵活地将芯片集成的转接板结构上。In the adapter plate structure, the upper and lower inductors are connected in parallel to form a three-dimensional inductor, and the upper and lower capacitor arrays are connected in parallel. In the above adapter board structure, the capacitor structure is integrated inside the adapter board, and the inductor is integrated on the surface of the adapter board, which greatly reduces the space occupied by the two devices, and the distance between the inductor and the trench capacitor structure is relatively long , high isolation, reducing the interference between the two, reducing the dielectric loss, and improving the Q value. Compared with general planar M I M capacitors, the trench capacitor structure is used to increase the capacitance density, which can effectively increase the capacitance value, and can be freely placed near the required circuit, which can effectively optimize the power quality. When the above adapter board structure is in use, chips can be flexibly integrated on the adapter board structure.

图2A至2N示出了本发明一个实施例的形成转接板结构的过程剖面示意图。2A to 2N are schematic cross-sectional views showing the process of forming the interposer structure according to an embodiment of the present invention.

先形成第一转接板,然后将两个第一转接板键合形成转接板结构。The first riser board is formed first, and then the two first riser boards are bonded to form the riser board structure.

形成第一转接板的过程如下:The process of forming the first adapter plate is as follows:

步骤1.1,如图2A所示,在衬底201的正面通过刻蚀形成沟槽202。Step 1.1, as shown in FIG. 2A , a trench 202 is formed on the front surface of the substrate 201 by etching.

步骤1.2,如图2B所示,在衬底201的正面和沟槽202的内壁形成第一绝缘层203。例如通过沉积的方式形成第一绝缘层203。Step 1.2, as shown in FIG. 2B , a first insulating layer 203 is formed on the front surface of the substrate 201 and the inner wall of the trench 202 . For example, the first insulating layer 203 is formed by deposition.

步骤1.3,如图2C所示,在沟槽202的内壁形成电容下电极204。例如通过在沟槽202的内壁电镀金属层形成电容下电极。所述电容下电极204还延伸至衬底201正面的第一绝缘层背离衬底201的上表面。In step 1.3, as shown in FIG. 2C , a capacitor bottom electrode 204 is formed on the inner wall of the trench 202 . For example, the bottom electrode of the capacitor is formed by electroplating a metal layer on the inner wall of the trench 202 . The capacitor lower electrode 204 also extends to the upper surface of the first insulating layer on the front of the substrate 201 away from the substrate 201 .

步骤1.4,如图2D所示,在电容下电极204背离沟槽202的内壁的一侧表面形成电容介质205。例如通过沉积的方式形成电容介质205。Step 1.4, as shown in FIG. 2D , a capacitor medium 205 is formed on the surface of the capacitor bottom electrode 204 facing away from the inner wall of the trench 202 . For example, the capacitive medium 205 is formed by deposition.

步骤1.5,如图2E所示,在电容介质205背离电容下电极204的一侧表面形成电容上电极206。例如通过在电容介质205背离电容下电极204的一侧表面电镀金属层形成电容下电极206。每个沟槽202内的电容下电极204、电容介质205和电容下电极206组成沟槽电容结构,每个沟槽电容结构之间的电容下电极电连接,使得多个沟槽电容结构之间串联。In step 1.5, as shown in FIG. 2E , a capacitor upper electrode 206 is formed on the surface of the capacitor medium 205 facing away from the capacitor lower electrode 204 . For example, the capacitor bottom electrode 206 is formed by electroplating a metal layer on the surface of the capacitor medium 205 facing away from the capacitor bottom electrode 204 . The capacitor lower electrode 204, the capacitor medium 205 and the capacitor lower electrode 206 in each trench 202 form a trench capacitor structure, and the capacitor lower electrodes between each trench capacitor structure are electrically connected, so that between multiple trench capacitor structures in series.

步骤1.6,如图2F所示,在电容上电极206背离电容介质205的一侧表面形成第二绝缘层207。例如通过沉积的方式形成第二绝缘层207。Step 1.6, as shown in FIG. 2F , a second insulating layer 207 is formed on the surface of the capacitor upper electrode 206 facing away from the capacitor medium 205 . For example, the second insulating layer 207 is formed by deposition.

步骤1.7,如图2G所示,在衬底201的正面形成通孔208。通孔208位于沟槽202的侧面且与沟槽202间隔。通孔208的深度大于沟槽202的深度。In step 1.7, as shown in FIG. 2G , a through hole 208 is formed on the front surface of the substrate 201 . The vias 208 are located on the side of the trench 202 and spaced apart from the trench 202 . The depth of the via 208 is greater than the depth of the trench 202 .

步骤1.8,如图2H所示,在通孔208的内壁形成第三绝缘层209。In step 1.8, as shown in FIG. 2H , a third insulating layer 209 is formed on the inner wall of the via hole 208 .

步骤1.9,如图2I所示,在通孔208中形成导电件210。In step 1.9, as shown in FIG. 2I , a conductive element 210 is formed in the through hole 208 .

步骤1.10,如图2J所示,在衬底201的正面形成连接导电件210与电容下电极204的第一重布线层211。In step 1.10, as shown in FIG. 2J , a first redistribution layer 211 connecting the conductive element 210 and the capacitor bottom electrode 204 is formed on the front surface of the substrate 201 .

步骤1.11,如图2K所示,将衬底201的背面减薄,露出导电件210。Step 1.11, as shown in FIG. 2K , thinning the back surface of the substrate 201 to expose the conductive member 210 .

步骤1.12,如图2L和2M所示,在衬底201的背面布置电感212和第二重布线层213,最终得到第一转接板。其中电感212和第二重布线层213一体成型。第二重布线层213电连接电感212与导电件210。首先在衬底201的背面形成第四绝缘层214,并刻蚀第四绝缘层214形成电感图形和重布线图形,然后在电感图形和线路图形中填充金属形成电感212和第二重布线层213。Step 1.12, as shown in FIGS. 2L and 2M , arrange the inductor 212 and the second redistribution layer 213 on the back of the substrate 201 , and finally obtain the first interposer board. Wherein the inductor 212 and the second redistribution layer 213 are integrally formed. The second redistribution layer 213 is electrically connected to the inductor 212 and the conductive element 210 . Firstly, the fourth insulating layer 214 is formed on the back side of the substrate 201, and the fourth insulating layer 214 is etched to form the inductor pattern and the rewiring pattern, and then metal is filled in the inductor pattern and the circuit pattern to form the inductor 212 and the second rewiring layer 213 .

步骤2,如图2N所示,通过将两个第一转接板的正面键合,得到转接板结构。其中两个第一转接板的第一重布线层211键合,使得两个第一转接板键合形成转接板结构。将两个第一转接板键合进一步提升电容值和电感Q值。Step 2, as shown in FIG. 2N , is to obtain an adapter plate structure by bonding the front surfaces of two first adapter plates. The first redistribution layers 211 of the two first interposer boards are bonded, so that the two first interposer boards are bonded to form an interposer board structure. The capacitance value and the inductance Q value are further improved by bonding the two first interposer boards.

虽然本发明的一些实施方式已经在本申请文件中予以了描述,但是本领域技术人员能够理解,这些实施方式仅仅是作为示例示出的。本领域技术人员在本发明的教导下可以想到众多的变型方案、替代方案和改进方案而不超出本发明的范围。所附权利要求书旨在限定本发明的范围,并借此涵盖这些权利要求本身及其等同变换的范围内的方法和结构。While certain embodiments of the present invention have been described in this specification, those skilled in the art will appreciate that these embodiments have been presented by way of example only. Those skilled in the art can think of numerous modification schemes, substitution schemes and improvement schemes under the teaching of the present invention without departing from the scope of the present invention. It is intended that the scope of the invention be defined by the appended claims and that methods and structures within the scope of such claims themselves and their equivalents be covered thereby.

Claims (10)

1.一种转接板结构,其特征在于,包括两个键合的第一转接板,其中所述第一转接板包括:1. An adapter plate structure, characterized in that it comprises two bonded first adapter plates, wherein the first adapter plate comprises: 衬底;Substrate; 多个互连的沟槽电容结构,其位于所述衬底的正面,其中所述沟槽电容结构包括:位于所述衬底的正面的多个沟槽;电容下电极,其覆盖所述沟槽的内壁;电容介质,其位于所述电容下电极背离沟槽内壁的一侧表面;电容上电极,其位于所述电容介质背离电容下电极的一侧表面;A plurality of interconnected trench capacitor structures located on the front side of the substrate, wherein the trench capacitor structures include: a plurality of trenches located on the front side of the substrate; a capacitor bottom electrode covering the trenches The inner wall of the groove; the capacitance medium, which is located on the side surface of the lower electrode of the capacitance away from the inner wall of the groove; the upper electrode of the capacitance, which is located on the surface of the side of the capacitance medium away from the lower electrode of the capacitance; 电感,其位于所述衬底的背面,并与沟槽电容结构电连接。An inductor is located on the backside of the substrate and is electrically connected to the trench capacitor structure. 2.根据权利要求1所述的转接板结构,其特征在于,还包括:2. The adapter plate structure according to claim 1, further comprising: 导电件,其位于所述沟槽电容结构的侧面且与沟槽电容结构间隔;a conductive member positioned on a side of the trench capacitor structure and spaced from the trench capacitor structure; 第一重布线层,其电连接所述导电件与所述沟槽电容结构;a first redistribution layer, which is electrically connected to the conductive member and the trench capacitance structure; 第二重布线层,其电连接所述导电件与所述电感。The second redistribution layer is electrically connected to the conductive element and the inductor. 3.根据权利要求2所述的转接板结构,其特征在于,所述衬底具有通孔,所述导电件位于所述通孔中。3. The interposer structure according to claim 2, wherein the substrate has a through hole, and the conductive member is located in the through hole. 4.根据权利要求3所述的转接板结构,其特征在于,还包括:4. The adapter plate structure according to claim 3, further comprising: 第一绝缘层,其位于电容下电极与沟槽内壁之间;The first insulating layer is located between the lower electrode of the capacitor and the inner wall of the trench; 第二绝缘层,其位于电容上电极背离电容介质的一侧表面;The second insulating layer is located on the surface of the capacitor upper electrode away from the capacitor medium; 第三绝缘层,其位于通孔内壁与导电件之间;The third insulating layer is located between the inner wall of the through hole and the conductive member; 第四绝缘层,其位于衬底的背面。A fourth insulating layer is located on the backside of the substrate. 5.根据权利要求2所述的转接板结构,其特征在于,所述电容下电极延伸至第一绝缘层背离所述衬底的上表面;多个所述沟槽电容结构的电容下电极之间电连接;5. The interposer structure according to claim 2, wherein the capacitor lower electrode extends to the upper surface of the first insulating layer away from the substrate; the capacitor lower electrodes of a plurality of the trench capacitor structures electrical connection between 第一重布线层电连接所述电容下电极。The first redistribution layer is electrically connected to the lower electrode of the capacitor. 6.根据权利要求5所述的转接板结构,其特征在于,两个所述第一转接板的第一重布线层键合,使得两个所述第一转接板键合形成转接板结构。6. The interposer structure according to claim 5, wherein the first redistribution layers of the two first interposers are bonded so that the two first interposers are bonded to form an interposer. Board structure. 7.一种转接板结构的形成方法,其特征在于,包括:先形成第一转接板,然后将两个第一转接板键合形成转接板结构,其中形成第一转接板包括:7. A method for forming an adapter plate structure, comprising: first forming a first adapter plate, and then bonding two first adapter plates to form an adapter plate structure, wherein the first adapter plate is formed include: 在衬底的正面形成沟槽;forming trenches on the front side of the substrate; 在沟槽的内壁形成电容下电极;Forming a capacitor lower electrode on the inner wall of the trench; 在电容下电极背离沟槽的内壁的一侧表面形成电容介质;A capacitor medium is formed on the side surface of the capacitor lower electrode away from the inner wall of the trench; 在电容介质背离电容下电极的一侧表面形成电容上电极;Form the upper electrode of the capacitor on the surface of the capacitor medium away from the lower electrode of the capacitor; 在衬底的正面形成通孔;forming via holes on the front side of the substrate; 在通孔中形成导电件;forming conductive elements in the via holes; 在衬底的正面形成连接导电件与电容下电极的第一重布线层;forming a first redistribution layer connecting the conductive member and the lower electrode of the capacitor on the front surface of the substrate; 将衬底的背面减薄,露出导电件;Thinning the back of the substrate to expose the conductive parts; 在衬底的背面布置电感和第二重布线层,最终得到第一转接板。The inductor and the second redistribution layer are arranged on the backside of the substrate to finally obtain the first interposer board. 8.根据权利要求7所述的转接板结构的形成方法,其特征在于,还包括:8. The method for forming the adapter plate structure according to claim 7, further comprising: 在沟槽的内壁形成电容下电极之前,在衬底的正面和沟槽的内壁形成第一绝缘层;Before forming the capacitor bottom electrode on the inner wall of the trench, a first insulating layer is formed on the front surface of the substrate and the inner wall of the trench; 在衬底的正面形成通孔之前,在电容上电极背离电容介质的一侧表面形成第二绝缘层;Before forming a through hole on the front side of the substrate, a second insulating layer is formed on the surface of the capacitor upper electrode away from the capacitor medium; 在通孔中形成导电件之前,在通孔的内壁形成第三绝缘层。Before forming the conductive member in the through hole, a third insulating layer is formed on the inner wall of the through hole. 9.根据权利要求7所述的转接板结构的形成方法,其特征在于,通过将两个第一转接板的第一重布线层键合,得到转接板结构。9 . The method for forming the interposer structure according to claim 7 , wherein the interposer structure is obtained by bonding the first redistribution layers of the two first interposers. 10.根据权利要求7所述的转接板结构的形成方法,其特征在于,首先在衬底的背面形成第四绝缘层,并刻蚀第四绝缘层形成电感图形和重布线图形,然后在电感图形和重布线图形中填充金属形成电感和第二重布线层,其中所述电感和所述第二重布线层一体成型。10. The forming method of the interposer structure according to claim 7, characterized in that, at first, a fourth insulating layer is formed on the back side of the substrate, and the fourth insulating layer is etched to form inductance patterns and rewiring patterns, and then Filling metal in the inductor pattern and the redistribution pattern forms the inductor and the second redistribution layer, wherein the inductor and the second redistribution layer are integrally formed.
CN202310083152.1A 2023-02-08 2023-02-08 Switching plate structure and forming method thereof Pending CN116093084A (en)

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