CN116075147A - Electrical measurement type medium layer thickness monitoring scheme - Google Patents
Electrical measurement type medium layer thickness monitoring scheme Download PDFInfo
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- CN116075147A CN116075147A CN202310107650.5A CN202310107650A CN116075147A CN 116075147 A CN116075147 A CN 116075147A CN 202310107650 A CN202310107650 A CN 202310107650A CN 116075147 A CN116075147 A CN 116075147A
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- Prior art keywords
- dielectric layer
- thickness
- electrical measurement
- pcb
- characteristic impedance
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/08—Monitoring manufacture of assemblages
- H05K13/083—Quality monitoring using results from monitoring devices, e.g. feedback loops
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
- G01B7/02—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness
- G01B7/06—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness for measuring thickness
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/30—Computing systems specially adapted for manufacturing
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Operations Research (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
The invention discloses an electrical measurement type dielectric layer thickness monitoring scheme, which comprises five steps of PCB manufacturing, primary dielectric layer electrical measurement monitoring, PCB processing, secondary dielectric layer electrical measurement monitoring and finished product packaging, wherein the electrical measurement monitoring steps are as follows: inputting the line width, copper thickness, solder resist ink thickness and dielectric constant of the test sample number into the test software; placing a board to be tested on a special jig, and starting a press machine to test; the impedance test results are displayed in the host computer and transferred into the database. The characteristic impedance is tested by using the special jig, and the thickness of the corresponding dielectric layer is calculated by using the characteristic impedance law, so that the purpose of monitoring the thickness of the dielectric layer is achieved.
Description
Technical Field
The invention belongs to the technical field of PCB production, and particularly relates to an electrical measurement type dielectric layer thickness monitoring scheme.
Background
The name of PCB is printed circuit board, also called printed circuit board, which is an important electronic component, is a support for electronic components, and is a carrier for electrical connection of electronic components. Because it adopts electron printing to make, so be called "printed" circuit board, the PCB board need measure the dielectric layer of PCB board after finishing production, guarantees the quality of PCB board.
The existing dielectric layer measurement mode is slice type detection, the PCB needs to be sheared, and then the dielectric layer on the shearing surface needs to be measured, so that the PCB needs to be damaged, the measurement speed is low, only the measurement can be performed in a sampling way, and the 100% measurement cannot be performed.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide an electrical measurement type dielectric layer thickness monitoring scheme, which solves the problems that the existing dielectric layer measurement mode is slicing, a PCB is required to be damaged, the measurement speed is low, only the measurement can be performed by pulling, and the 100% measurement cannot be performed.
In order to achieve the above purpose, the present invention provides the following technical solutions: an electrical measurement type dielectric layer thickness monitoring scheme comprises the following steps:
s1: and (3) manufacturing a PCB: firstly, laminating the signal layer, the gold layer and the Comp layer together through laminating equipment to form an inner layer plate of the PCB, then adopting drilling equipment to drill the inner layer plate, electroplating the inner layer plate after the drilling is finished to form an inner layer substrate, and then placing the inner layer substrate and the outer layer plate in the laminating equipment to perform secondary lamination to form the PCB.
S2: primary dielectric layer electrical measurement monitoring: and performing electrical measurement monitoring on the formed PCB, designing a characteristic impedance test COUPON on the broken edge, calculating the thickness of the dielectric layer by measuring the COUPON impedance, testing the characteristic impedance by using a special jig, enabling characteristic impedance test data to enter a host computer through a database, converting the impedance data into the thickness of the dielectric layer by the computer according to a characteristic impedance formula, and managing according to a work unit specification.
S3: PCB processing: firstly, performing anti-welding treatment on a PCB, and performing gold treatment after the treatment is finished, so as to obtain a finished PCB.
S4: and (3) secondary dielectric layer electrical measurement monitoring: and performing electrical measurement monitoring on the formed PCB, designing a characteristic impedance test COUPON on the broken edge, calculating the thickness of the dielectric layer by measuring the COUPON impedance, testing the characteristic impedance by using a special jig, enabling characteristic impedance test data to enter a host computer through a database, converting the impedance data into the thickness of the dielectric layer by the computer according to a characteristic impedance formula, and managing according to a work unit specification.
S5: and (3) packaging a finished product: and packaging the finished product of the PCB monitored by the secondary dielectric layer electrical measurement.
Preferably, the step of electrical measurement monitoring in the step of S2 primary dielectric layer electrical measurement monitoring and the step of electrical measurement monitoring in the step of S4 secondary dielectric layer electrical measurement monitoring is as follows:
a1: the test software is inputted with the line width, copper thickness, solder resist ink thickness and dielectric constant of the test sample number.
A2: and placing the board to be tested on a special jig, and starting a press machine to test.
A3: the impedance test results are displayed in the host computer and transferred into the database.
Preferably, in the step of S2 and the step of S4 monitoring the dielectric layer electrically, the characteristic impedance value=87ln [ 5.98h/(0.6w+t)/SQRT (c+1.41), where H is PP thickness, W is line width, T is copper thickness, and C is Dk.
Compared with the prior art, the invention has the beneficial effects that:
the characteristic impedance is tested by using the special jig, and the thickness of the corresponding dielectric layer is calculated by using the characteristic impedance law, so that the purpose of monitoring the thickness of the dielectric layer is achieved.
Drawings
FIG. 1 is a block diagram illustrating the structure of the flow chart of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by one of ordinary skill in the art without undue burden on the person of ordinary skill in the art based on the embodiments of the present invention, are within the scope of the present invention.
As shown in fig. 1, an electrical measurement type dielectric layer thickness monitoring scheme includes the following steps:
s1: and (3) manufacturing a PCB: firstly, laminating the signal layer, the gold layer and the Comp layer together through laminating equipment to form an inner layer plate of the PCB, then adopting drilling equipment to drill the inner layer plate, electroplating the inner layer plate after the drilling is finished to form an inner layer substrate, and then placing the inner layer substrate and the outer layer plate in the laminating equipment to perform secondary lamination to form the PCB.
S2: primary dielectric layer electrical measurement monitoring: performing electrical measurement monitoring on the formed PCB, designing a characteristic impedance test COUPON on the broken edge, calculating the thickness of the dielectric layer by measuring the COUPON impedance, testing the characteristic impedance by using a special jig, enabling characteristic impedance test data to enter a host computer through a database, converting the impedance data into the thickness of the dielectric layer by the computer according to a characteristic impedance formula, managing according to a work unit specification, and performing electrical measurement monitoring, wherein the electrical measurement monitoring comprises the following steps: a1: inputting the line width, copper thickness, solder resist ink thickness and dielectric constant of the test sample number into the test software; a2: placing a board to be tested on a special jig, and starting a press machine to test; a3: the impedance test result is displayed in the host computer and is transmitted into the database; characteristic impedance value=87ln [ 5.98h/(0.6w+t)/SQRT (c+1.41), where H is PP thickness, W is line width, T is copper thickness, and C is Dk.
S3: PCB processing: firstly, performing anti-welding treatment on a PCB, and performing gold treatment after the treatment is finished, so as to obtain a finished PCB.
S4: and (3) secondary dielectric layer electrical measurement monitoring: performing electrical measurement monitoring on the formed PCB, designing a characteristic impedance test COUPON on the broken edge, calculating the thickness of the dielectric layer by measuring the COUPON impedance, testing the characteristic impedance by using a special jig, enabling characteristic impedance test data to enter a host computer through a database, converting the impedance data into the thickness of the dielectric layer by the computer according to a characteristic impedance formula, managing according to a work unit specification, and performing electrical measurement monitoring, wherein the electrical measurement monitoring comprises the following steps: a1: inputting the line width, copper thickness, solder resist ink thickness and dielectric constant of the test sample number into the test software; a2: placing a board to be tested on a special jig, and starting a press machine to test; a3: the impedance test result is displayed in the host computer and is transmitted into the database; characteristic impedance value=87ln [ 5.98h/(0.6w+t)/SQRT (c+1.41), where H is PP thickness, W is line width, T is copper thickness, and C is Dk.
S5: and (3) packaging a finished product: and packaging the finished product of the PCB monitored by the secondary dielectric layer electrical measurement.
The working principle of the technical scheme is as follows:
the characteristic impedance is tested by using the special jig, and the thickness of the corresponding dielectric layer is calculated by using the characteristic impedance law, so that the purpose of monitoring the thickness of the dielectric layer is achieved.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (3)
1. An electrical measurement type medium layer thickness monitoring scheme is characterized in that: the method comprises the following steps:
s1: and (3) manufacturing a PCB: firstly, laminating a signal layer, a gold layer and a Comp layer together through laminating equipment to form an inner layer plate of a PCB, then drilling the inner layer plate by adopting drilling equipment, electroplating the inner layer plate after drilling to form an inner layer substrate, and then placing the inner layer substrate and the outer layer plate in the laminating equipment to perform secondary laminating to form the PCB;
s2: primary dielectric layer electrical measurement monitoring: performing electrical measurement monitoring on the formed PCB, designing a characteristic impedance test COUPON on the broken edge, calculating the thickness of the dielectric layer by measuring the COUPON impedance, testing the characteristic impedance by using a special jig, enabling characteristic impedance test data to enter a host computer through a database, converting the impedance data into the thickness of the dielectric layer by the computer according to a characteristic impedance formula, and managing according to a work unit specification;
s3: PCB processing: firstly, performing anti-welding treatment on a PCB, and performing gold-removing treatment after the treatment is finished, so as to obtain a finished PCB;
s4: and (3) secondary dielectric layer electrical measurement monitoring: performing electrical measurement monitoring on the formed PCB, designing a characteristic impedance test COUPON on the broken edge, calculating the thickness of the dielectric layer by measuring the COUPON impedance, testing the characteristic impedance by using a special jig, enabling characteristic impedance test data to enter a host computer through a database, converting the impedance data into the thickness of the dielectric layer by the computer according to a characteristic impedance formula, and managing according to a work unit specification;
s5: and (3) packaging a finished product: and packaging the finished product of the PCB monitored by the secondary dielectric layer electrical measurement.
2. An electrical measurement type dielectric layer thickness monitoring scheme according to claim 1, characterized in that: the step of electric measurement monitoring in the step of S2 primary dielectric layer electric measurement monitoring and the step of S4 secondary dielectric layer electric measurement monitoring is as follows:
a1: inputting the line width, copper thickness, solder resist ink thickness and dielectric constant of the test sample number into the test software;
a2: placing a board to be tested on a special jig, and starting a press machine to test;
a3: the impedance test results are displayed in the host computer and transferred into the database.
3. An electrical measurement type dielectric layer thickness monitoring scheme according to claim 1, characterized in that: and in the S2 primary dielectric layer electrical measurement monitoring step and the S4 secondary dielectric layer electrical measurement monitoring step, the characteristic impedance value=87Ln [ 5.98H/(0.6W+T)/SQRT (C+1.41), wherein H is PP thickness, W is line width, T is copper thickness, and C is Dk.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310107650.5A CN116075147A (en) | 2023-02-14 | 2023-02-14 | Electrical measurement type medium layer thickness monitoring scheme |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310107650.5A CN116075147A (en) | 2023-02-14 | 2023-02-14 | Electrical measurement type medium layer thickness monitoring scheme |
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| Publication Number | Publication Date |
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| CN116075147A true CN116075147A (en) | 2023-05-05 |
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| CN202310107650.5A Pending CN116075147A (en) | 2023-02-14 | 2023-02-14 | Electrical measurement type medium layer thickness monitoring scheme |
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2023
- 2023-02-14 CN CN202310107650.5A patent/CN116075147A/en active Pending
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