CN116072541B - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor device Download PDFInfo
- Publication number
- CN116072541B CN116072541B CN202310201760.8A CN202310201760A CN116072541B CN 116072541 B CN116072541 B CN 116072541B CN 202310201760 A CN202310201760 A CN 202310201760A CN 116072541 B CN116072541 B CN 116072541B
- Authority
- CN
- China
- Prior art keywords
- functional layer
- wafer
- semiconductor material
- laser
- microcrack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 106
- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 26
- 239000000463 material Substances 0.000 claims abstract description 77
- 239000002346 layers by function Substances 0.000 claims abstract description 58
- 238000009210 therapy by ultrasound Methods 0.000 claims abstract description 17
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 26
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 25
- 239000010410 layer Substances 0.000 claims description 23
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 238000000059 patterning Methods 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 11
- 229910002601 GaN Inorganic materials 0.000 claims description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 3
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims description 3
- 229910001195 gallium oxide Inorganic materials 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 abstract description 10
- 238000000926 separation method Methods 0.000 abstract description 6
- 238000002360 preparation method Methods 0.000 abstract description 3
- 238000011282 treatment Methods 0.000 description 11
- 239000013078 crystal Substances 0.000 description 4
- 238000000227 grinding Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 229910000831 Steel Inorganic materials 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0475—Changing the shape of the semiconductor body, e.g. forming recesses
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/50—Working by transmitting the laser beam through or within the workpiece
- B23K26/53—Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Oil, Petroleum & Natural Gas (AREA)
- Crystallography & Structural Chemistry (AREA)
- Plasma & Fusion (AREA)
- Mechanical Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The present invention provides a method of manufacturing a semiconductor device, the method comprising: forming a first functional layer on one surface of a semiconductor material; generating a microcrack enrichment area in a preset area to be cut in the semiconductor material by utilizing laser scanning, and performing ultrasonic treatment on the microcrack enrichment area to separate the semiconductor material and obtain a first wafer and a second wafer, wherein the first wafer is provided with a first functional layer; and thinning the surface of the first wafer far away from the first functional layer to remove the microcrack enrichment area, and then forming a second functional layer on the thinned surface of the first wafer to obtain the semiconductor device. Therefore, the invention can realize the cutting and separation of the semiconductor material in a shorter time by combining the laser scanning and the ultrasonic treatment, has the advantages of small loss of the semiconductor material, high production efficiency, simple operation and the like, and improves the problems of high material loss and low production efficiency of the traditional preparation method of the semiconductor device.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a method for preparing a semiconductor device.
Background
With the promotion of national dual carbon targets, semiconductor devices are rapidly developed and increasingly applied, but the existing preparation methods of semiconductor devices have the problem of high production cost. For example, silicon carbide (SiC) power devices have been widely used in the fields of inverters for new energy automobiles, on-board chargers (OBCs), fast charging piles, photovoltaic inverters, server power lamps, etc., but silicon carbide power devices have the defect of high production cost, and limit their wider popularization.
Accordingly, there is a need for improvements in methods of fabricating semiconductor devices.
Disclosure of Invention
The present invention has been made based on the findings and knowledge of the inventors regarding the following facts and problems:
the existing preparation method of the semiconductor device has the problem of high production cost. Taking silicon carbide power devices as an example, the manufacture of silicon carbide crystals is very difficult, the Physical Vapor Transport (PVT) method adopted in the industry at present has the growth temperature of 2300 ℃, the growth speed is very slow (hundreds of micrometers/hour), and the method is the largest cost source of the silicon carbide power devices, and in the manufacturing method of the silicon carbide power devices at present, the processing loss of silicon carbide materials is as high as 70 percent, and the optimization space is very large. Specifically, in the current manufacturing method of silicon carbide power devices, silicon carbide crystals need to be cut, and grinding and polishing treatments are also needed for the cut surfaces. Specifically, the cutting of silicon carbide crystals is currently carried out by a multi-wire cutting method in industry, and the silicon carbide is very hard by carrying diamond powder by using a steel wire, so that the required steel wire is thicker, the cutting edge loss of the silicon carbide material caused by cutting is generally about 200 microns, the cutting edge loss is very large, and meanwhile, the method has the problems of long cutting time and low production efficiency. In addition, the surface roughness of the cut silicon carbide surface cut by the method is larger, the damaged layer of the cut surface is deeper after cutting, the deeper damaged layer of the silicon carbide needs to be removed by grinding and polishing, the loss of the silicon carbide material is further increased, and the manufacturing cost is increased.
The present invention aims to improve at least to some extent at least one of the above technical problems.
The present invention provides a method of manufacturing a semiconductor device, comprising: forming a first functional layer on one surface of a semiconductor material; generating a microcrack enrichment area in a preset area to be cut in the semiconductor material by utilizing laser scanning, and performing ultrasonic treatment on the microcrack enrichment area to separate the semiconductor material and obtain a first wafer and a second wafer, wherein the first wafer is provided with the first functional layer; and thinning the surface of the first wafer far away from the first functional layer to remove the microcrack enrichment region, and then forming a second functional layer on the thinned surface of the first wafer to obtain the semiconductor device. Therefore, the invention can realize the cutting and separation of the semiconductor material in a shorter time by combining the laser scanning and the ultrasonic treatment, has the advantages of small loss of the semiconductor material, high production efficiency, simple operation and the like, and solves the problems of high loss of the material and low production efficiency of the traditional method for preparing the semiconductor device.
According to an embodiment of the present invention, the semiconductor material comprises one or more of silicon carbide, gallium nitride, gallium oxide, aluminum nitride.
According to an embodiment of the present invention, forming the first functional layer includes: a metal layer is formed on one side of the semiconductor material.
According to an embodiment of the invention, the method further comprises: and patterning the metal layer.
According to an embodiment of the present invention, the patterning process is performed after the laser scanning. Because the metal layer can introduce stress into the semiconductor material (such as silicon carbide crystal), the crack is introduced during laser scanning, and the patterning treatment can eliminate most of stress induced by the metal layer, so that the stress is prevented from greatly influencing the subsequent process of the wafer.
According to an embodiment of the invention, the laser is applied at a side of the semiconductor material remote from the first functional layer. Therefore, the energy of the laser can be completely used for generating a microcrack enrichment region in the semiconductor material, and the laser energy loss caused by the absorption of the laser energy by the first functional layer is effectively avoided.
According to an embodiment of the invention, the length of the microcrack enrichment region in a direction perpendicular to the first functional layer is not more than 100 micrometers. The length of the microcrack enrichment area in the thickness direction of the semiconductor material is smaller, so that the subsequent thinning amount can be reduced, the loss of the semiconductor material is reduced, and the production cost is reduced.
According to an embodiment of the present invention, the laser has a wavelength of more than 355nm and an energy density of 4-9J/cm when scanned with the laser 2 . Thus, the laser can penetrate into the region to be cut, creating enough microcracks within the semiconductor material to form a microcrack-rich region.
According to the embodiment of the invention, when the laser scanning is utilized, the same area to be cut is scanned by the laser for no less than two times. Thus, the density of microcracks can be increased, which is advantageous for peeling.
According to an embodiment of the invention, the removal thickness of the thinning process is no more than 50 microns. Therefore, the loss of the semiconductor material is small, and the production cost can be reduced.
According to an embodiment of the present invention, further comprising: thinning the cut surface of the second wafer; and forming the first functional layer and the second functional layer on two sides of the thinned second wafer respectively so as to obtain the semiconductor device. Thus, the second wafer may also be used to fabricate semiconductor devices in accordance with the methods described above.
According to an embodiment of the invention, the second functional layer comprises a back electrode.
According to an embodiment of the invention, the semiconductor device is one of MOSFET, IGBT, SBD.
Drawings
FIG. 1 is a flow chart of a method of fabricating a semiconductor device in accordance with one embodiment of the present invention;
fig. 2 is a flow chart of a method of fabricating a semiconductor device in accordance with another embodiment of the present invention;
FIG. 3 is a flow chart of a patterning process for a metal layer in one embodiment of the invention;
fig. 4 is a schematic view of a structure of a semiconductor device in one embodiment of the present invention;
description of the reference numerals
100. 100a, 100a1, 100B-semiconductor material, 200-first functional layer, a-first wafer, B-second wafer, 300-second functional layer, 1000-semiconductor device.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
The present invention provides a method of manufacturing a semiconductor device, referring to fig. 1, the method comprising:
s100, forming a first functional layer on one surface of a semiconductor material;
referring to fig. 2, a first functional layer 200 is formed on one surface of the semiconductor material 100.
According to an embodiment of the present invention, the semiconductor material 100 includes one or more of silicon carbide, gallium nitride, gallium oxide, aluminum nitride.
According to an embodiment of the present invention, forming the first functional layer 200 includes: a metal layer is formed on one side of the semiconductor material 100.
According to some embodiments of the invention, before forming the metal layer, forming the first functional layer 200 further includes: an epitaxial layer is formed on one side of semiconductor material 100. A metal layer is then formed on the side of the epitaxial layer remote from the semiconductor material 100. It should be noted that the semiconductor device does not need to be manufactured with an epitaxial layer, and a skilled person may choose to manufacture an epitaxial layer or not according to the requirements.
Different types of semiconductor devices, the first functional layers have different structures. According to an embodiment of the present invention, the first functional layer may be manufactured by using a common semiconductor device manufacturing process, such as ion implantation, photolithography, etching, physical vapor deposition, chemical vapor deposition, high temperature annealing, and the like, which will not be described herein. In some embodiments of the present invention, the semiconductor material is silicon carbide and the first functional layer includes a channel region, a source region, a gate dielectric, and a gate electrode region of a SiC MOSFET (metal-oxide-semiconductor field effect transistor) device. According to further embodiments of the present invention, the first functional layer comprises an emitter region, a channel region, a gate dielectric and a gate electrode region of an IGBT (insulated gate bipolar transistor) device. According to further embodiments of the present invention, the first functional layer comprises an anode region of an SBD (schottky barrier diode) device.
S200, utilizing laser scanning to generate a microcrack enrichment area in a preset area to be cut in the semiconductor material, and performing ultrasonic treatment on the microcrack enrichment area to separate the semiconductor material and obtain a first wafer and a second wafer, wherein the first wafer is provided with the first functional layer;
referring to fig. 2, laser light is focused to a predetermined region to be cut inside a semiconductor material 100 by laser scanning and ultrasonic treatment, high temperature is locally formed, a large number of micro cracks are induced, and a micro crack enrichment region is formed, and when the micro cracks are expanded and connected during ultrasonic treatment, the semiconductor material 100 is split to obtain a first wafer a and a second wafer B, the first wafer a has a first functional layer 200 and a semiconductor material 100a, and the second wafer B has a semiconductor material 100B, wherein the sum of the thickness of the semiconductor material 100a and the thickness of the semiconductor material 100B is equal to the thickness of the semiconductor material 100.
According to an embodiment of the invention, referring to fig. 3, the method further comprises: and patterning the metal layer.
According to an embodiment of the present invention, the patterning process is performed after the laser scanning. Since the metal layer may introduce stress in the semiconductor material layer, it is advantageous to introduce cracks at the time of laser scanning. If the metal layer is subjected to patterning treatment and then laser scanning is performed, most of stress of the metal layer can be eliminated due to the fact that the metal layer is subjected to patterning treatment, cracks are not easy to introduce during laser scanning, and the effect is poor.
According to some embodiments of the invention, the patterning process is performed after the ultrasonic process. That is, after the semiconductor material 100 is separated to obtain the first wafer a and the second wafer B, the first wafer a having the first functional layer 200 is subjected to patterning.
According to an embodiment of the invention, the laser is applied at a side of the semiconductor material 100 remote from the first functional layer 200. Since the side of the semiconductor material 100 remote from the first functional layer 200 is directly exposed to the outside, not covered by other layers, from where the laser is applied, the energy of the laser can be used entirely to create a microcrack-rich region inside the semiconductor material 100. If the laser is applied from one side of the first functional layer 200, since the first functional layer 200 has a metal, a highly doped region, or an insulating medium, etc. that exhibits a patterned distribution, some of these materials can absorb laser energy, which may cause loss of laser energy, and at the same time, the difference in refractive index of these materials to the laser may cause inconsistent penetration depth of the laser into the semiconductor material 100, and serious non-uniformity of the laser energy distribution in the region to be cut, which affects formation of the microcrack enrichment region.
According to an embodiment of the present invention, the microcrack-enriched area has a plurality of cracks therein, and each of the cracks may have the same direction or different length. For example, some of the cracks extend in a direction parallel to the interface of the semiconductor material 100 and the first functional layer 200, i.e. some of the cracks extend in a direction along the release surface, and some of the cracks extend at an angle to the direction of the release surface.
According to the embodiment of the present invention, the length of the microcrack enrichment region in the direction perpendicular to the first functional layer 200 is not more than 100 micrometers, for example not more than 50 micrometers, and the length of the microcrack enrichment region in the direction perpendicular to the first functional layer 200 is preferably 20-30 micrometers, and the length of the microcrack enrichment region in the thickness direction of the semiconductor material 100 is smaller, so that the subsequent thinning processing amount can be effectively reduced, the loss amount of the semiconductor material is reduced, and the cost is reduced.
According to an embodiment of the present invention, when scanning with a laser, the wavelength of the laser is greater than 355nm, if the wavelength is too short, the area to be cut is not penetrated. For example, the laser light has a wavelength of 1064nm. In some embodiments of the invention, the semiconductor material is silicon carbide, and the absorption of laser light by the silicon carbide surface layer is severe if the laser wavelength is 355nm or less; if the laser wavelength is 1064nm, the laser can penetrate into silicon carbide with a few millimeters or even centimeters, focus on a region to be cut, generate high temperature in the region to be cut, and induce a large number of microcracks.
According to an embodiment of the present invention, when scanning with laser light, the energy density of laser light reaching the semiconductor material is 4J/cm or more 2 And less than or equal to 9J/cm 2 . Thus, a sufficient number of microcracks may be generated within the semiconductor material 100 to form a microcrack-rich region. If the energy density is too low, the laser is within the semiconductor materialThe temperature generated in the region to be cut is not high enough to generate microcracks. If the energy density is too high, the crack is too long, and further the crack length in the thickness direction is too large, which increases the processing amount of thinning treatment, and also increases the loss amount of the semiconductor material, which results in insignificant effect of reducing the cost. Preferably, the energy density of the laser is 6J/cm 2 To 7J/cm 2 In between, the length of microcracks generated by the energy density is less than 25 micrometers, so that a thinner microcrack enrichment region can be obtained, and further, the processing amount of subsequent thinning treatment and the loss of semiconductor materials are reduced.
According to the embodiment of the invention, when the laser scanning is utilized, the same area to be cut is scanned by the laser for no less than two times. Thus, the density of microcracks can be increased by multiple laser scans, which is beneficial to stripping.
Further, multiple laser scans can be realized by overlapping laser spots, specifically, the laser spots overlap when scanning, and the higher the overlapping rate of the laser spots, the more the scanning times. The number of laser scans can be controlled by adjusting the overlap ratio of the laser spots.
The microcrack enrichment region was observed by a scanning electron microscope over an area of a unit cross section (25 mu m x, 25 mu m), the number of cracks was more than 2, and the length of the cracks along the separation plane was more than 5 μm.
According to some embodiments of the invention, the ultrasonic treatment is performed after the laser scanning. By ultrasonic treatment, microcracks formed by laser scanning can be expanded, thereby separating the first wafer a and the second wafer B. The ultrasonic treatment may be performed by placing the wafer in a liquid tank with an ultrasonic wave generating means, for example, by placing the wafer in water with a frequency of 13-400kHz as a transmission medium of ultrasonic waves, and by the ultrasonic waves, micro cracks are expanded and the first wafer a and the second wafer B are separated. Preferably, the ultrasonic wave frequency is 13-200kHz during ultrasonic treatment, when the ultrasonic wave frequency is too high, cracks are not easy to expand, and if the ultrasonic wave frequency is too low, cracks are too fast to expand, and cracks vertical to the separation surface are also fast to expand, so that the thickness of a microcrack enrichment area is increased, the processing amount of the later thinning treatment is increased, and the processing loss of materials is not reduced.
According to some embodiments of the present invention, the laser scanning and the ultrasonic treatment may be performed simultaneously, i.e. the micro-crack enrichment zone is subjected to ultrasonic treatment while the micro-crack enrichment zone is formed by the laser scanning, to separate the semiconductor material 100 and obtain the first wafer a and the second wafer B. That is, laser scanning and ultrasonic processing are performed simultaneously, and separation of the semiconductor material 100 can also be achieved. Further, since the ultrasonic treatment vibrates the semiconductor material 100, resulting in inaccurate focusing of laser light, and the crack formed first is extended long after the ultrasonic treatment for a long time, the method of laser scanning first and then ultrasonic treatment is preferable, and the separation effect is better.
And S300, thinning the surface of the first wafer far away from the first functional layer to remove the microcrack enrichment region, and then forming a second functional layer on the thinned surface of the first wafer to obtain the semiconductor device.
Referring to fig. 2, a surface of the first wafer a remote from the first functional layer 200 is subjected to thinning treatment, i.e., the surface of the semiconductor material 100a remote from the first functional layer 200 is subjected to thinning treatment to remove the microcrack enrichment region, the semiconductor material 100a1 is obtained after thinning, the thickness of the semiconductor material 100a1 is smaller than that of the semiconductor material 100a, and then the second functional layer 300 is formed on the thinned surface of the semiconductor material 100a1, so that the semiconductor device 1000 is obtained. The thinning treatment can adopt common semiconductor material processing technology, such as grinding and polishing of a diamond grinding wheel and the like. The structure of the semiconductor device 1000 may also be as shown in fig. 4, according to some embodiments of the invention.
According to an embodiment of the invention, the removal thickness of the thinning process is no more than 50 microns. Therefore, the removal thickness of the thinning treatment is smaller, and the loss of the semiconductor material can be effectively reduced, so that the cost is reduced.
According to an embodiment of the invention, the second functional layer 300 comprises a back electrode.
Different types of semiconductor devices, the second functional layer having a different structure. According to the embodiment of the present invention, the second functional layer may be manufactured by using a common semiconductor device manufacturing process, such as physical vapor deposition, electron beam evaporation of a metal film, laser annealing, and the like, which will not be described herein. In some embodiments of the invention, the semiconductor material is silicon carbide and the second functional layer includes a drain of a SiC MOSFET device. According to further embodiments of the present invention, the second functional layer includes a drain implant region and a collector of the IGBT device. According to further embodiments of the present invention, the second functional layer comprises a cathode of the SBD device.
According to an embodiment of the invention, the method further comprises: thinning the cutting surface of the second wafer B; the first functional layer 200 and the second functional layer 300 are formed on both sides of the second wafer B subjected to the thinning process, respectively, so as to obtain the semiconductor device. That is, the second wafer B may be reused, and in particular, the second wafer B may be used for manufacturing a semiconductor device after being subjected to surface treatment according to the method described above.
According to an embodiment of the invention, the semiconductor device is one of MOSFET, IGBT, SBD.
It should be noted that, in this specification, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. In the description of the present invention, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.
In the description of the present specification, the descriptions of the terms "one embodiment," "another embodiment," "some embodiments," "example," "specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (7)
1. A method of manufacturing a semiconductor device, comprising:
forming a first functional layer on one surface of a semiconductor material;
generating a microcrack enrichment area in a preset area to be cut in the semiconductor material by utilizing laser scanning, and performing ultrasonic treatment on the microcrack enrichment area to separate the semiconductor material and obtain a first wafer and a second wafer, wherein the first wafer is provided with the first functional layer; and
thinning the surface of the first wafer far away from the first functional layer to remove the microcrack enrichment area, and then forming a second functional layer on the thinned surface of the first wafer to obtain the semiconductor device;
wherein, when scanning by laser, the wavelength of the laser is more than 355nm, and the energy density is 4-9J/cm 2 The number of times that the same area to be cut is scanned by the laser is not less than two times; length of the microcrack-enriched region in a direction perpendicular to the first functional layerNo more than 100 microns;
forming the first functional layer includes: forming a metal layer on one side of the semiconductor material;
the method further comprises: patterning the metal layer;
the patterning process is performed after the laser scanning.
2. The method of claim 1, wherein the semiconductor material comprises one or more of silicon carbide, gallium nitride, gallium oxide, aluminum nitride.
3. The method of claim 1, wherein the laser is applied on a side of the semiconductor material remote from the first functional layer.
4. The method of claim 1, wherein the thinning process has a removal thickness of no more than 50 microns.
5. The method as recited in claim 1, further comprising:
thinning the cut surface of the second wafer;
and forming the first functional layer and the second functional layer on two sides of the thinned second wafer respectively so as to obtain the semiconductor device.
6. The method of claim 1, wherein the second functional layer comprises a back electrode.
7. The method of claim 1, wherein the semiconductor device is one of MOSFET, IGBT, SBD.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310201760.8A CN116072541B (en) | 2023-03-06 | 2023-03-06 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310201760.8A CN116072541B (en) | 2023-03-06 | 2023-03-06 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116072541A CN116072541A (en) | 2023-05-05 |
| CN116072541B true CN116072541B (en) | 2023-08-22 |
Family
ID=86178608
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310201760.8A Active CN116072541B (en) | 2023-03-06 | 2023-03-06 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116072541B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110576521A (en) * | 2018-05-22 | 2019-12-17 | 半导体元件工业有限责任公司 | semiconductor substrate cutting system and related method |
| CN111203652A (en) * | 2018-11-21 | 2020-05-29 | 株式会社迪思科 | Wafer generation method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102019132158A1 (en) * | 2019-11-27 | 2021-05-27 | Infineon Technologies Ag | METHOD OF EDITING A SEMICONDUCTOR SUBSTRATE |
-
2023
- 2023-03-06 CN CN202310201760.8A patent/CN116072541B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110576521A (en) * | 2018-05-22 | 2019-12-17 | 半导体元件工业有限责任公司 | semiconductor substrate cutting system and related method |
| CN111203652A (en) * | 2018-11-21 | 2020-05-29 | 株式会社迪思科 | Wafer generation method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN116072541A (en) | 2023-05-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7977210B2 (en) | Semiconductor substrate and semiconductor device | |
| JP6298926B2 (en) | Manufacturing method of semiconductor substrate | |
| JP5272299B2 (en) | Semiconductor device and manufacturing method thereof | |
| CN109461701A (en) | A kind of compound dicing method and semiconductor devices of power chip | |
| US20180323261A1 (en) | Silicon carbide semiconductor device and method for producing same | |
| US8513090B2 (en) | Method for manufacturing semiconductor substrate, and semiconductor device | |
| WO2012124190A1 (en) | Semiconductor-device manufacturing method and semiconductor device | |
| CN111916348A (en) | Method of manufacturing silicon carbide devices and wafer composite including laser modification zone in handle substrate | |
| JP5735077B2 (en) | Manufacturing method of semiconductor device | |
| US8501549B2 (en) | Method of manufacturing a reverse blocking insulated gate bipolar transistor | |
| CN114787985A (en) | Method for dividing a semiconductor wafer | |
| CN109427563B (en) | Silicon carbide device and method for manufacturing silicon carbide device | |
| CN116072541B (en) | Method for manufacturing semiconductor device | |
| JP2014229843A (en) | Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device | |
| CN104979161A (en) | Manufacturing method of semiconductor device and manufacturing method of triple mode integrate-insulated gate bipolar transistor (TI-IGBT) | |
| CN114220740B (en) | Stripping method for gallium nitride substrate | |
| CN115084271A (en) | Silicon carbide power device and processing and manufacturing method thereof | |
| CN115101591A (en) | Manufacturing method of silicon carbide power device | |
| US8993372B2 (en) | Method for producing a semiconductor component | |
| US11881406B2 (en) | Method of manufacturing a semiconductor device and semiconductor wafer | |
| DE102023108751B3 (en) | METHOD FOR SEPARATING DIE FROM A SEMICONDUCTOR SUBSTRATE | |
| JP5857575B2 (en) | Manufacturing method of semiconductor device | |
| JP2009054718A (en) | Production method of semiconductor device | |
| CN117410172A (en) | Method for preparing thick-edge sheet hexagonal silicon carbide wafer | |
| JP2024011500A (en) | Method of manufacturing semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |