CN1160615C - Digital display device and method according to pixel clock frequency to identify resolution degree - Google Patents
Digital display device and method according to pixel clock frequency to identify resolution degree Download PDFInfo
- Publication number
- CN1160615C CN1160615C CNB001043455A CN00104345A CN1160615C CN 1160615 C CN1160615 C CN 1160615C CN B001043455 A CNB001043455 A CN B001043455A CN 00104345 A CN00104345 A CN 00104345A CN 1160615 C CN1160615 C CN 1160615C
- Authority
- CN
- China
- Prior art keywords
- digital
- signal
- resolution
- frequency
- horizontal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims description 10
- 125000004122 cyclic group Chemical class 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 12
- 238000003672 processing method Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Images
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Transforming Electric Information Into Light Information (AREA)
- Controls And Circuits For Display Device (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The present invention relates to a digital image displaying device capable of utilizing pixel clock frequencies to identify resolution degrees, which is used for displaying a digital picture signal transmitted by a computer to a plurality of image pictures. The digital image displaying device comprises a display screen, a control circuit and a first frequency counting circuit for counting the quantity of digital pixel clock signals in the preset counting time. The control circuit can identify the vertical resolution degrees and the horizontal resolution degrees of the image pictures according to digital horizontal synchronizing signals, digital vertical synchronizing signals and a counting result transmitted by the first frequency counting circuit, and the image pictures are displayed on the display screen according to the vertical resolution degrees and the horizontal resolution degrees.
Description
Technical field
The present invention provides a kind of digital video display device, refers to a kind of digital video display device that can differentiate the image frame resolution according to pixel clock frequency especially.
Background technology
Display device is a computer peripheral equipment commonly used, is used for the picture signal that a computing machine is transmitted is converted into the image frame of a plurality of continuous demonstrations, for the user read and use a computer in signal.Along with the progress of science and technology, the display screen of display device is gradually by analog cathode-ray tube, and is progressive to digital cathode-ray tube or display panels (liquid crystal display panel).No matter be any display screen, display device is all necessary can be according to the picture signal that computing machine transmitted, correct determine level and the vertical resolution that this computing machine is desired the show image picture, and image frame is shown on the display screen with suitable size according to this resolution.If method of discrimination is perfect inadequately, display device just can't be correct determine the resolution that this computing machine is desired the show image picture, this moment, image frame just may produce problems such as instability (Jitter) or magnification ratio mistake, adjust the size of image frame on the display device and must be dependent on the user in visual mode, very inconvenience in the use.Therefore, how the next picture signal of computing machine transmission is done suitable processing,, become and researched and developed important problem of display device now with the level and the vertical resolution of correct decision image frame.
Known display device is to receive the picture signal that is transmitted by computing machine via a cable of being made up of several signal wires.Include signal of video signal (Video Signal), vertical synchronizing signal (Vertical Synchronous Signal in this picture signal; Vs) and horizontal-drive signal (HorizontalSynchronous Signal; Hs) etc.Display device just can demonstrate corresponding image frame on its display screen after receiving these signals and being handled.
See also Fig. 1.Fig. 1 is the synoptic diagram of the shown image frame of known display device 12.Known display device can be shown as the picture signal that computing machine transmitted a plurality of image frames 12, and these image frames 12 can be shown in regular turn on the display device and watch for the user to form a dynamic menu.Each image frame 12 includes many image scan lines 14 (being the line shown in Fig. 1), and each image scan line 14 includes a plurality of image pixels 16 (being the grid shown in Fig. 1).Image frame 12 can be different resolutions, for example if resolution is 800 * 600, represents that then this image frame 12 has 600 image scan lines 14 in the horizontal direction, and has 800 image pixels 16 on every image scan line 14.
The vertical synchronizing signal that is transmitted in the picture signal by computing machine is the picture display frequency that is used for controlling image frame 12, and horizontal-drive signal is the display frequency that is used for controlling image scan line 14 in each image frame 12.That is to say that whenever display device receives a vertical synchronizing signal, it can restart to show a new image frame 12; And whenever display device receives a horizontal-drive signal, it can begin to show a new image scan line 14 from next line.Therefore, if the vertical resolution that computing machine is desired the show image picture is 400, and the vertical synchronizing signal frequency is 85Hz, and then the horizontal-drive signal frequency that is sent to display device from computing machine should be about 37.9kHz.
See also Fig. 2.Fig. 2 is the synoptic diagram of known display device in order to the resolution table of comparisons 20 of judgement image frame resolution.Known display device is judged the method for image frame resolution, be to set up the combination of a level and vertical synchronizing signal frequency and make up the resolution table of comparisons 20 of corresponding image frame resolution, to differentiate the image frame resolution that computing machine passes the picture signal institute desire demonstration of coming with this.When display device received picture signal, display device can be calculated the horizontal-drive signal that this picture signal comprises and the frequency of vertical synchronizing signal, tables look-up to learn the image frame resolution according to result of calculation then.For example, can learn that then the resolution of image frame should be 640 * 400 via tabling look-up if the vertical synchronizing signal that receives and the frequency of horizontal-drive signal are respectively 85Hz and 37.9kHz.Same, if the vertical synchronizing signal that receives and the frequency of horizontal-drive signal are respectively 60Hz and 48.4kHz, then can should be 1024 * 768 via the resolution that can learn image frame of tabling look-up.
Yet known digital video display device also can't determine the image frame resolution that computing machine institute desire shows fully.For example, if the image frame resolution that computing machine institute desire shows is 640 * 400, the vertical synchronizing signal frequency is 85Hz, and the horizontal-drive signal frequency that is sent to display device from computing machine is 37.9Hz.But if the image frame resolution that computing machine institute desire shows is 720 * 400, the vertical synchronizing signal frequency that is sent to display device from computing machine is 85Hz, and the horizontal-drive signal frequency is 37.9kHz too.Thus, the display device image frame resolution that just can't show only according to the frequency of level and the vertical synchronizing signal contrast resolution table of comparisons 20 correct resolution computing machine institute desires is 720 * 400 or 640 * 400.When running into this kind situation, known display device normally solves in the mode of " conjecture ", easily produces problems such as image frame instability or magnification ratio mistake so naturally.
Summary of the invention
Fundamental purpose of the present invention be to provide a kind of can be according to pixel clock frequency to differentiate the digital video display device of image frame resolution, it can correctly differentiate the image frame resolution that computing machine institute desire shows, in the hope of allowing image frame be shown on the display screen, remove the trouble that the user needs manual adjustment from suitable size.
A kind of digital video display device provided by the invention, be used for the digital picture signal that a computing machine is transmitted is shown as a plurality of image frames, each image frame includes many image scan lines, each image scan line includes a plurality of image pixels, this digital picture signal packet contains a plurality of digital image signals, a plurality of digital vertical synchronizing signals are used for controlling the picture display frequency of these a plurality of image frames, a plurality of digital horizontal-drive signals are used for controlling the display frequency of many image scan lines in each image frame, and a plurality of digital pixel clock signals are used for controlling the pixel display frequency of each image scan line, this digital video display device includes: a display screen is used for showing this image frame; One first frequency circuit, be used for calculating the quantity of this digital pixel clock signal in the computing time of being scheduled to, and result of calculation is sent to this control circuit, this first frequency circuit comprises a pulse generator, be used for producing one-period property pulse signal to determine the length of this predetermined computation time, and a counter, be used for according to the control of this cyclic pulse signal in this predetermined computing time, calculating the quantity of this pixel clock signal, and obtain this result of calculation; One second frequency circuit is used for calculating this numeral horizontal-drive signal and frequency that should the numeral vertical synchronizing signal; One control circuit, be used for according to this numeral horizontal-drive signal of second frequency circuit calculating, the frequency of this numeral vertical synchronizing signal, and first the result of calculation that sent of frequency circuit contrast the resolution table of comparisons, to differentiate corresponding vertical resolution of image frame and horizontal resolution; And a ratio adjuster, be used for vertical resolution and horizontal resolution according to this image frame that this control circuit is differentiated, be shown in size on this display screen to adjust this image frame.
Other purpose of the present invention, feature and advantage will be described hereinbelow in detail with reference to the accompanying drawings in conjunction with the embodiments.
Description of drawings:
Fig. 1 is the synoptic diagram of the shown image frame of known display device;
Fig. 2 is that known display device is in order to judge the resolution table of comparisons synoptic diagram of image frame resolution;
Fig. 3 receives the synoptic diagram of digital picture signal for digital video display device of the present invention;
Fig. 4 is the functional-block diagram of digital video display device shown in Figure 3;
Fig. 5 is the functional-block diagram of first frequency circuit shown in Figure 4;
Fig. 6 is a resolution table of comparisons synoptic diagram shown in Figure 4;
Fig. 7 is the procedure chart of digital picture signal processing method of the present invention.
Embodiment
See also Fig. 3.Fig. 3 receives the synoptic diagram of digital picture signal 52 for digital video display device 50 of the present invention.Digital video display device 50 of the present invention is to be electrically connected to a computing machine 40 via a cable (not shown), is used for showing the digital picture signal 52 that computing machine 40 is transmitted.Digital picture signal 52 includes a plurality of digital image signals 54, a plurality of digital vertical synchronizing signals 56, a plurality of digital horizontal-drive signals 58, and a plurality of digital pixel clock signal (Pixel Clock Signal) 60, it reaches digital video display device 50 by different signal wires respectively.A plurality of digital pixel clock signals 60 are to be used for controlling image pixel 16 display frequencies, that is display device 12 is received a digital pixel clock signal 60 each time, and display device 12 promptly can be shown in an image pixel 16 on the image scan line 14 according to digital image signal 54.
See also Fig. 4.Fig. 4 is the functional-block diagram of digital video display device 50 shown in Figure 3.Digital video display device 50 of the present invention includes a display screen 68 and is used for show image picture 12, one control circuit 70 is used for digital picture signal 52 that receiving computer 40 transmitted and according to the operation of digital picture signal 52 with control figure formula image display 50, one first frequency circuit 72 is used for calculating the quantity of digital pixel clock signal 60 in the computing time of being scheduled to and result of calculation is sent to control circuit 70, and one second frequency circuit 76 be used for calculating the frequency of digital horizontal-drive signal 58 and digital vertical synchronizing signal 56, and result of calculation is sent to control circuit 70.Display screen 68 can be a display panels or a digital cathode-ray tube.
As shown in Figure 4, control circuit 70 includes a storer 78 and is used for storing a resolution table of comparisons 80.There is the combination of various predetermined vertical synchronizing signal 56, horizontal-drive signal 58 and pixel clock signal 60 frequencies in the table of comparisons 80, and makes up corresponding vertical resolution and horizontal resolution with this.And control circuit 70 promptly is to calculate the digital vertical synchronizing signal 56 learnt and the frequency of digital horizontal-drive signal 58 according to second frequency circuit 76, and first the result of calculation that sent of frequency circuit 72 contrast the resolution table of comparisons 80, to differentiate image frame 12 corresponding vertical resolution and horizontal resolutions.Digital video display device 50 includes a ratio adjuster 74 in addition, it can be according to the vertical resolution and the horizontal resolution of image frame 12 that control circuit 70 is differentiated, to adjust the size of image frame 12, it is shown on the display screen 68 with suitable size.
See also Fig. 5.Fig. 5 is the functional-block diagram of first frequency circuit 72 shown in Figure 4.First frequency circuit 72 is the quantity that is used for calculating digital pixel clock signal 60 in this predetermined computing time, it includes a pulse generator 82 and is used for producing one-period property pulse signal to determine the length of this predetermined computation time, one counter 86 is used for calculating the quantity of digital pixel clock signal 60 in this predetermined computation time, and a register 88 is used for temporarily depositing the result of calculation that counter 86 is sent.This cyclic pulse signal is to be used for being used as one of register 88 to be written into signal, when register 88 receives this when being written into signal, this result of calculation can be written in it temporary.This result of calculation in the register 88 can be transferred into control circuit 70, makes to differentiate the usefulness of image frame 12 resolutions for control circuit 70.First frequency circuit 72 includes a delayer 94 in addition and is used for this is written into signal delay one scheduled time slot to produce a clear signal.When counter 86 receives this clear signal, can remove its present count status and recomputate the quantity of digital pixel clock signal 60.Because this clear signal is to be written into signal delay one scheduled time slot by this to be produced, and can just can be eliminated after register 88 is written into it so can guarantee the quantity of the digital pixel clock signal 60 that counter 86 is calculated.
See also Fig. 6.Fig. 6 is the resolution table of comparisons 80 synoptic diagram shown in Figure 4.The resolution table of comparisons 80 has the combination of vertical synchronizing signal 56, horizontal-drive signal 58 and pixel clock signal 60 frequencies, and these combinations and corresponding image frame resolution.Because digital horizontal-drive signal 58 is the display frequencies that are used for controlling image scan line 64 in each image frame 62, and digital pixel clock signal 60 is the pixel display frequencies that are used for controlling each image scan line 64, therefore can differentiate different horizontal resolutions by the frequency of digital horizontal-drive signal 58 and digital pixel clock signal 60.For example, if the image frame resolution that 40 desires of computing machine show is 640 * 400, with vertical synchronizing signal frequency 85Hz is example, and then the horizontal-drive signal frequency that is sent to display device from computing machine 40 is about 37.9kHz, and the frequency of digital pixel clock signal 60 then is about 31.5MHz.But if the image frame resolution that computing machine institute desire shows is 720 * 400, the frequency of the horizontal-drive signal that then sends is similarly 37.9kHz approximately, but the frequency of digital pixel clock signal 60 just should be about 35.5MHz.Thus, digital video display device 50 of the present invention just can be according to the frequency of digital pixel clock signal 60, the contrast resolution table of comparisons 80 correct image frame resolutions of telling 40 desires demonstrations of computing machine are 640 * 400 or 720 * 400, and also natural energy is shown in image frame 12 on the display screen 68 with suitable size.
See also Fig. 7.Fig. 7 is the procedure chart of digital picture signal processing method 100 of the present invention.Digital picture signal processing method 100 of the present invention is to use and is used for the digital picture signal 52 that process computer 40 transmitted in digital video display device 50, in the hope of correctly differentiating the resolution of show image picture 12 that computing machine 40 is desired.Digital picture signal processing method 100 includes the following step:
Step 102: set up the resolution table of comparisons 80, there is the combination of various predetermined digital vertical synchronizing signal 56, digital horizontal-drive signal 58 and digital pixel clock signal 60 frequencies in it, and makes up corresponding vertical resolution and horizontal resolution with this;
Step 104: the digital picture signal 52 that receiving computer 40 is transmitted;
Step 106: in a computing time of being scheduled to, calculate the quantity of digital pixel clock signal 60 wherein, to produce a result of calculation; And calculate digital vertical synchronizing signal 56, and the frequency of digital horizontal-drive signal 58;
Step 108: according to digital vertical synchronizing signal 56, the frequency of numeral horizontal-drive signal 58, and digital pixel clock signal 60 quantity Calculation results, contrast the resolution table of comparisons 80, to differentiate image frame 12 corresponding vertical resolution and horizontal resolutions.
Step 110:, be shown in image frame 12 on the digital video display device 50 and adjust image frame 12 size thereon according to vertical resolution and the horizontal resolution differentiated.
Compared to known display device, display device 50 of the present invention is except the frequency according to digital vertical synchronizing signal 56 and digital horizontal-drive signal 58, also in addition according to digital pixel clock signal 60 differentiate the image frame resolution that 40 desires of computing machine show, therefore can correctly distinguish different horizontal resolutions.So, just can avoid judging the problem that causes image frame 12 to produce instability or magnification ratio mistake, make display device can correctly show the image frame 12 that 40 desires of computing machine show because of the mistake of resolution.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to claim scope of the present invention change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (8)
1. digital video display device, be used for the digital picture signal that a computing machine is transmitted is shown as a plurality of image frames, each image frame includes many image scan lines, each image scan line includes a plurality of image pixels, this digital picture signal packet contains a plurality of digital image signals, a plurality of digital vertical synchronizing signals are used for controlling the picture display frequency of these a plurality of image frames, a plurality of digital horizontal-drive signals are used for controlling the display frequency of many image scan lines in each image frame, and a plurality of digital pixel clock signals are used for controlling the pixel display frequency of each image scan line, it is characterized in that this digital video display device includes:
One display screen is used for showing this image frame;
One first frequency circuit, be used for calculating the quantity of this digital pixel clock signal in the computing time of being scheduled to, and result of calculation is sent to this control circuit, this first frequency circuit comprises a pulse generator, be used for producing one-period property pulse signal to determine the length of this predetermined computation time, and a counter, be used for according to the control of this cyclic pulse signal in this predetermined computing time, calculating the quantity of this pixel clock signal, and obtain this result of calculation;
One second frequency circuit is used for calculating this numeral horizontal-drive signal and frequency that should the numeral vertical synchronizing signal;
One control circuit, be used for according to this numeral horizontal-drive signal of second frequency circuit calculating, the frequency of this numeral vertical synchronizing signal, and first the result of calculation that sent of frequency circuit contrast the resolution table of comparisons, to differentiate corresponding vertical resolution of image frame and horizontal resolution; And
One ratio adjuster is used for vertical resolution and horizontal resolution according to this image frame that this control circuit is differentiated, is shown in size on this display screen to adjust this image frame.
2. digital video display device as claimed in claim 1, it is characterized in that this first frequency circuit includes the result of calculation that a register is used for temporarily depositing this counter and is sent in addition, this cyclic pulse signal also comprises one and is written into a signal and a clear signal, when this register receives this when being written into signal, can be written into this result of calculation from this counter, when this counter receives this clear signal, can remove the present count status of this counter and recomputate the quantity of this pixel clock signal.
3. digital video display device as claimed in claim 2 is characterized in that this first frequency circuit comprises a delayer in addition, is used for this is written into signal delay one scheduled time slot to produce this clear signal.
4. digital video display device as claimed in claim 3, it is characterized in that this control circuit includes a storer and is used for storing a resolution table of comparisons, there are various predetermined vertical synchronizing signals in it, the combination of horizontal-drive signal and pixel clock signal frequency and make up corresponding vertical resolution and horizontal resolution with this, and this control circuit promptly according to this numeral vertical synchronizing signal _, the result of calculation that the frequency of this numeral horizontal-drive signal and this first frequency circuit are sent contrasts this resolution table of comparisons, to differentiate corresponding vertical resolution of this image frame and horizontal resolution.
5. digital video display device as claimed in claim 1 is characterized in that this display screen is a display panels.
6. digital video display device as claimed in claim 1 is characterized in that this display screen is a digital cathode-ray tube.
7. method that in a digital video display device, is used for handling the digital picture signal that a computing machine transmitted, this digital video display device is to be used for this digital picture signal is shown as a plurality of image frames, each image frame includes many image scan lines, each image scan line includes a plurality of image pixels, this digital picture signal packet contains a plurality of digital image signals, a plurality of digital vertical synchronizing signals are used for controlling the picture display frequency of these a plurality of image frames, a plurality of digital horizontal-drive signals are used for controlling the sweep trace display frequency of many image scan lines in each image frame, and a plurality of digital pixel clock signal is used for controlling the pixel display frequency of each image scan line;
It is characterized in that this method includes the following step:
Set up a resolution table of comparisons, have the combination of various predetermined vertical synchronizing signal, horizontal-drive signal and pixel clock signal frequencies in it, and make up corresponding vertical resolution and horizontal resolution with this;
Receive the digital picture signal that this computing machine transmits, and in a computing time of being scheduled to, calculate the quantity of digital pixel clock signal wherein, to produce a result of calculation; And
According to this numeral horizontal-drive signal, the frequency of this numeral vertical synchronizing signal and digital pixel clock signal quantity Calculation result contrast this resolution table of comparisons, with vertical resolution and the horizontal resolution of differentiating this image frame, and foundation is somebody's turn to do vertical and horizontal resolution is shown in this image frame on this digital video display device.
8. method as claimed in claim 7 is characterized in that also including the following step:
According to vertical resolution and the horizontal resolution differentiated, be shown in size on this digital video display device to adjust this image frame.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB001043455A CN1160615C (en) | 2000-03-20 | 2000-03-20 | Digital display device and method according to pixel clock frequency to identify resolution degree |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB001043455A CN1160615C (en) | 2000-03-20 | 2000-03-20 | Digital display device and method according to pixel clock frequency to identify resolution degree |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1314632A CN1314632A (en) | 2001-09-26 |
| CN1160615C true CN1160615C (en) | 2004-08-04 |
Family
ID=4577285
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB001043455A Expired - Lifetime CN1160615C (en) | 2000-03-20 | 2000-03-20 | Digital display device and method according to pixel clock frequency to identify resolution degree |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1160615C (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100428205C (en) * | 2004-07-19 | 2008-10-22 | 明基电通股份有限公司 | Method for determining digital image signal of digital display |
| CN100405445C (en) * | 2006-05-25 | 2008-07-23 | 友达光电股份有限公司 | Display capable of adjusting drive circuit in accordance with resolution and drive method thereof |
| CN101458888B (en) * | 2007-12-12 | 2011-06-29 | 群康科技(深圳)有限公司 | Flat-panel display and image signal resolution detecting method thereof |
| CN102194433A (en) * | 2010-03-12 | 2011-09-21 | 中国长城计算机深圳股份有限公司 | Picture display method and system and display |
| CN108449564B (en) * | 2017-02-16 | 2020-03-06 | 视联动力信息技术股份有限公司 | Method and system for supporting video decoding chip to adapt to video source resolution |
| TWI679895B (en) * | 2017-12-15 | 2019-12-11 | 宏正自動科技股份有限公司 | Electronic device and image synchronization method |
| CN108235000B (en) * | 2018-01-26 | 2019-12-13 | 北京视通科技有限公司 | Resolution detection method and device based on parallel digital video signals |
-
2000
- 2000-03-20 CN CNB001043455A patent/CN1160615C/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN1314632A (en) | 2001-09-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100543568C (en) | Be used to drive the Apparatus and method for of liquid crystal display device | |
| CN100345035C (en) | Image display apparatus | |
| KR100218618B1 (en) | Method and apparatus for synchronizing video and graphics data in a multimedia display system including a shared frame buffer | |
| US7589745B2 (en) | Image signal processing circuit and image display apparatus | |
| JPH09114443A (en) | Video scaling device | |
| CN101060607A (en) | Image zooming device and its method | |
| CN1953034A (en) | Apparatus and method for driving liquid crystal display device | |
| US8411118B2 (en) | Flat panel display and method for detecting resolution of image signal thereof | |
| CN1760965A (en) | Come the apparatus and method of converting frame rate in the display system without external memory storage | |
| EP0502600A2 (en) | Method and apparatus for displaying RGB and sync video without auxiliary frame storage memory | |
| CN1694158A (en) | Apparatus and method for increasing pixel resolution of image using coherent sampling | |
| CN1160615C (en) | Digital display device and method according to pixel clock frequency to identify resolution degree | |
| CN1165033C (en) | Device for processing signals in monitor system | |
| KR100304899B1 (en) | Apparatus and method for displaying out of range video of monitor | |
| TW200926116A (en) | Method of processing LCD images according to the content of the images | |
| CN1945683A (en) | Display device using LCD panel and a method of executing timing control options thereof | |
| JP3141755B2 (en) | Matrix type liquid crystal display | |
| CN100508015C (en) | Method and apparatus for image frame synchronization | |
| CN1168063C (en) | Display device capable of automatically adjusting resolution ratio | |
| JP3655258B2 (en) | Display device for video scaling | |
| CN102142238A (en) | Image display system | |
| EP0721639B1 (en) | Image reconstruction interface with interlaced video signal to non-interlaced video signal conversion for lcd | |
| CN1875619A (en) | Display and control method thereof | |
| US6943783B1 (en) | LCD controller which supports a no-scaling image without a frame buffer | |
| CN1604172A (en) | Apparatus and method for driving liquid crystal display |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: QISDA TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: BENQ CORPORATION. Effective date: 20100408 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: TAOYUAN COUNTY, TAIWAN PROVINCE TO: TAOYUAN COUNTY, TAIWAN PROVINCE, CHINA |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20100408 Address after: China Taiwan Taoyuan County Patentee after: Qisda Corporation Address before: Taoyuan County of Taiwan Province Patentee before: Benq Corp. |
|
| CX01 | Expiry of patent term |
Granted publication date: 20040804 |
|
| CX01 | Expiry of patent term |