CN116031174A - Method for improving wafer warpage - Google Patents
Method for improving wafer warpage Download PDFInfo
- Publication number
- CN116031174A CN116031174A CN202310084662.0A CN202310084662A CN116031174A CN 116031174 A CN116031174 A CN 116031174A CN 202310084662 A CN202310084662 A CN 202310084662A CN 116031174 A CN116031174 A CN 116031174A
- Authority
- CN
- China
- Prior art keywords
- wafer
- warpage
- substrate
- film
- stress
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 52
- 239000010408 film Substances 0.000 claims description 56
- 239000000758 substrate Substances 0.000 claims description 44
- 230000008569 process Effects 0.000 claims description 22
- 239000010409 thin film Substances 0.000 claims description 21
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 20
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 20
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 16
- 235000012431 wafers Nutrition 0.000 description 96
- 238000010438 heat treatment Methods 0.000 description 6
- 230000009471 action Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001000 micrograph Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000011112 process operation Methods 0.000 description 1
- 238000001878 scanning electron micrograph Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
Images
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Recrystallisation Techniques (AREA)
Abstract
The invention provides a method for improving wafer warpage, which forms an auxiliary film with the same type as the stress of a wafer on the back surface of the wafer to be improved so as to offset the stress of the wafer, thereby improving the wafer warpage, reducing risks such as alarm, crack, broken piece and the like caused by the wafer warpage and improving the production efficiency and the production yield.
Description
Technical Field
The invention belongs to the technical field of semiconductor manufacturing, and relates to a method for improving wafer warpage.
Background
In the fabrication of semiconductor integrated circuits, various process operations, such as etching, deposition, etc., are performed on a wafer to process and fabricate various circuit element structures on the wafer according to functional requirements, so as to prepare integrated circuit products with specific electrical functions.
In the manufacturing process of a semiconductor integrated circuit, due to the characteristics of different processes, a wafer can generate stress change due to heating and the like, and the phenomenon of wafer warpage caused by the generation of stress, namely, the phenomenon of deformation due to uneven shrinkage of the wafer caused by heating and the like, is caused. The greater the degree of warpage, the greater the deformation, and the wafer deformation may cause adverse effects on subsequent processes, such as increasing the frequency of wafer alarm in the machine, even causing defects such as wafer crack (crack), wafer chipping, etc., so that the production efficiency and the production yield are reduced.
Currently, methods for improving wafer warpage and reducing wafer stress are generally to change some parameters in the process, such as film thickness, process temperature, and changing the process sequence, but the operation still has difficulty in meeting the requirements.
Therefore, it is desirable to provide a method for improving wafer warpage that meets the needs.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a method for improving wafer warpage, which is used for solving the problem of wafer warpage in the prior art.
To achieve the above and other related objects, the present invention provides a method for improving wafer warpage, comprising the steps of:
providing a substrate;
depositing a process film on the front surface of the substrate to form a wafer to be improved;
detecting the warpage shape of the wafer to determine the stress type of the wafer;
and forming an auxiliary film on the back surface of the substrate, wherein the auxiliary film has the same stress type as the wafer so as to improve the warpage of the wafer.
Optionally, the stress type includes tensile stress or compressive stress.
Optionally, when the stress type is compressive stress, the auxiliary thin film comprises a compressive stress silicon nitride thin film.
Optionally, when the stress type is tensile stress, the auxiliary thin film includes a tensile stress silicon nitride thin film.
Optionally, the auxiliary film further comprises a silicon oxide layer on the surface of the compressive stress silicon nitride film or the tensile stress silicon nitride film.
Optionally, the method further comprises the step of removing the auxiliary film.
Optionally, the method of removing the auxiliary thin film includes a CMP method.
Optionally, the method further comprises the following steps:
detecting the warpage of the improved wafer;
comparing the warpage with a standard warpage threshold, and repeatedly forming the auxiliary film on the back of the substrate when the warpage exceeds the standard warpage threshold;
and detecting the warpage of the improved wafer again until the wafer meets the standard warpage threshold.
Alternatively, the substrate includes a Si substrate, a GaN substrate, a SiC substrate, or a glass substrate.
Optionally, the auxiliary film covers the entire back surface or a partial area of the wafer.
As described above, in the method for improving wafer warpage of the present invention, the auxiliary film having the same stress type as the wafer is formed on the back surface of the wafer to be improved, so as to offset the stress of the wafer, thereby improving the wafer warpage, reducing the risks such as alarm, crack, breaking and the like caused by the wafer warpage, and improving the production efficiency and the production yield.
Drawings
FIG. 1 is a flow chart illustrating the improvement of wafer warpage in an embodiment of the present invention.
FIG. 2a is a schematic diagram showing an improved structure of a front wafer.
FIG. 2b is a schematic diagram of the structure of the improved wafer.
FIG. 3a is a graph showing the comparison of warpage amounts before and after forming a compressive stress silicon nitride film and a silicon oxide layer on the back surface of a substrate in accordance with an embodiment of the present invention.
FIG. 3b is a graph showing the comparison of warpage amounts before and after forming a tensile stress silicon nitride film and a silicon oxide layer on the back surface of a substrate in accordance with an embodiment of the present invention.
FIG. 4a is a schematic diagram showing an improved SEM image of a wafer after heat treatment.
FIG. 4b shows a scanning electron microscope image of an improved wafer after heat treatment.
Description of element reference numerals
100-substrate; 200-process film; 300-auxiliary film; a. b, c, d-improving the warp curve of the front wafer; a ', b', c ', d' -improve the warp curve of the back wafer.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
As described in detail in the embodiments of the present invention, the cross-sectional view of the device structure is not partially enlarged to a general scale for convenience of explanation, and the schematic drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
For ease of description, spatially relative terms such as "under", "below", "beneath", "above", "upper" and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Furthermore, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present. As used herein, "between … …" is meant to include both endpoints.
In the context of this application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, as well as embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be changed at will, and the layout of the components may be more complex.
As shown in fig. 1, the present embodiment provides a method for improving wafer warpage, which includes the following steps:
s1: providing a substrate;
s2: depositing a process film on the front surface of the substrate to form a wafer to be improved;
s3: detecting the warpage shape of the wafer to determine the stress type of the wafer;
s4: and forming an auxiliary film on the back surface of the substrate, wherein the auxiliary film has the same stress type as the wafer so as to improve the warpage of the wafer.
In this embodiment, the auxiliary film having the same stress type as the wafer is formed on the back surface of the wafer to be improved, so as to offset the stress of the wafer, thereby improving the warpage of the wafer, and reducing risks such as alarm, crack, breaking and the like caused by the warpage of the wafer, so as to improve the production efficiency and the production yield.
The technical scheme of the present application is further described in detail below with reference to the accompanying drawings.
First, as shown in fig. 2a, step S1 is performed to provide a substrate 100.
As an example, the substrate 100 may include a Si substrate, a GaN substrate, a SiC substrate, a glass substrate, or the like, and the material, thickness, size, or the like of the substrate 100 may be selected as needed, without being excessively limited thereto.
Next, step S2 is performed to deposit a process film 200 on the front surface of the substrate 100, so as to form a wafer to be improved.
By way of example, the process film 200 may include, for example, a TiN barrier layer, a metal film, etc., and the specific type may be selected as desired without undue limitation.
Next, step S3 is performed to detect the warpage shape of the wafer to determine the stress type of the wafer.
In particular, during the process of forming the process film 200 on the front surface of the substrate 100 or during the subsequent process such as thermal processing (RTA), wafer warpage is often accompanied by stress, such as forming a wafer having a convex shape or forming a wafer having a concave shape. The warp shape of the wafer to be improved can be measured using a shape scanning device.
In this embodiment, the substrate 100 is a silicon substrate, and the process film 200 is a TiN barrier layer, as shown in fig. 2a, so that the wafer forms a convex shape under the action of tensile stress, and the shape of the wafer is not limited thereto, and may be a concave shape under the action of compressive stress when the process film 200 is a metal film. The type of stress of the wafer is related to the type of the process film 200, including tensile stress or compressive stress, and the type of stress applied to the wafer is not limited herein.
Next, step S4 is performed to form an auxiliary film 300 on the back surface of the substrate 100, where the stress types of the auxiliary film 300 and the wafer are the same, so as to improve the warpage of the wafer.
As an example, when the stress type is compressive stress, the auxiliary thin film includes a compressive stress silicon nitride thin film; when the stress type is tensile stress, the auxiliary thin film includes a tensile stress silicon nitride thin film.
Specifically, due to the stress, the wafer is subjected to warp deformation, and after the warp shape of the wafer is tested, the type of stress experienced by the wafer can be determined to be tensile stress or compressive stress, so that the corresponding auxiliary film 300 can be formed conveniently and subsequently to improve the warp deformation of the wafer.
As shown in fig. 2b, in order to avoid the influence on the process on the front surface of the wafer, the auxiliary thin film 300 is preferably formed on the back surface of the substrate 100, wherein the auxiliary thin film 300 covers the substrate, i.e., covers the entire back surface of the wafer to be improved, but the coverage area of the auxiliary thin film 300 is not limited thereto, and the auxiliary thin film 300 may be formed only on the corresponding partial area of the back surface of the substrate 100 when the wafer to be improved is deformed only in a partial area according to necessity, and the area, distribution, etc. of the auxiliary thin film 300 are not limited herein.
In this embodiment, the wafer to be improved is concave under the action of the compressive stress, so that the compressive stress silicon nitride film with the same type as the stress is correspondingly formed on the back surface of the wafer, and the stresses can be mutually offset according to the resultant force analysis, so as to improve the warpage of the wafer, as shown in fig. 2a and 2b.
Further, a silicon oxide layer may be formed on the surface of the auxiliary thin film 300 after the auxiliary thin film 300 is formed, so that the wafer may be released by releasing electrons through the silicon oxide layer in a later process, such as when the wafer is required to be fixed by E-CHUCK adsorption.
As shown in FIG. 3a, the comparison curve of the warpage amounts before and after forming the compressive stress silicon nitride film and silicon oxide layer on the back surface of the substrate 100 in FIG. 2a is shown, wherein a and b represent two wafers having the same structure and material, the warpage amounts are about 130 μm, the difference of the warpage amounts between the wafers a and b is negligible, and a' represents the thickness formed on the back surface of the substrate corresponding to a
Is formed on the surface of the compressive stress silicon nitride film>
As can be seen from fig. 3a, the warpage amount after the silicon oxide layer can be optimized to-20 μm; b' represents forming a thickness of +.>
Is a compressive stress silicon nitride film and is under the compressive stressSurface formation of stress silicon nitride film>
The amount of warpage after the silicon oxide layer was found to be optimized to 80. Mu.m.
As shown in FIG. 3b, the comparison curve of warpage amounts before and after forming a tensile stress silicon nitride film and a silicon oxide layer on the back surface of the substrate 100 in FIG. 2a is shown, wherein c and d represent two wafers having the same structure and material, the warpage amounts are about-170 μm, the difference of warpage amounts between the wafers c and d is negligible, and c' represents the thickness formed on the back surface of the substrate corresponding to c
Is formed on the surface of the tensile stress silicon nitride film>
As can be seen from fig. 3b, the warpage amount after the silicon oxide layer reaches-310 μm; d' represents forming a thickness of +.>
Is formed on the surface of the tensile stress silicon nitride film>
The amount of warpage after the silicon oxide layer was-390. Mu.m.
It can be seen that the wafer warpage is optimized when the film layers having the same stress type are formed on the opposite sides of the substrate 100, and the wafer warpage is further enhanced when the film layers having different stress types are formed on the opposite sides of the substrate 100.
As shown in fig. 4a, which illustrates a sem image of the wafer after heat treatment before improvement, and fig. 4b, which illustrates a sem image of the wafer after heat treatment after improvement, the present embodiment can effectively reduce the risk of cracking, and in the same way, due to optimization of wafer warpage, the machine alarm frequency can be improved, so that the production efficiency and the production yield can be improved.
Further, the step of removing the auxiliary film 300 may be further included, for example, a CMP method may be used to remove the auxiliary film 300 according to the process requirement, and of course, when the auxiliary film 300 does not affect the process, the auxiliary film 300 may not be removed, so as to reduce the process steps and reduce the cost.
As an example, the following steps may also be included according to process requirements:
detecting the warpage of the improved wafer;
comparing the warpage with a standard warpage threshold, and repeatedly forming the auxiliary film on the back of the substrate when the warpage exceeds the standard warpage threshold;
and detecting the warpage of the improved wafer again until the wafer meets the standard warpage threshold.
Specifically, after step S4 is performed, the warp of the wafer may be detected by a detecting device, and then the obtained warp of the wafer may be compared with a standard warp threshold, and when the warp exceeds the standard warp threshold, the auxiliary film 300 may be repeatedly formed on the back of the substrate 100, so as to further optimize the warp of the wafer, and if necessary, the above steps may be repeated until the warp meets the standard warp threshold, where the number of repetitions is not limited herein.
In summary, in the method for improving wafer warpage of the present invention, the auxiliary film having the same stress type as the wafer is formed on the back surface of the wafer to be improved, so as to offset the stress of the wafer, thereby improving the warpage of the wafer, reducing the risks such as alarm, crack, breaking, etc. caused by the warpage of the wafer, and improving the production efficiency and the production yield.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (10)
1. A method for improving wafer warpage comprising the steps of:
providing a substrate;
depositing a process film on the front surface of the substrate to form a wafer to be improved;
detecting the warpage shape of the wafer to determine the stress type of the wafer;
and forming an auxiliary film on the back surface of the substrate, wherein the auxiliary film has the same stress type as the wafer so as to improve the warpage of the wafer.
2. The method of improving wafer warpage as set forth in claim 1, wherein: the stress type includes tensile stress or compressive stress.
3. The method of improving wafer warpage as set forth in claim 2, wherein: when the stress type is compressive stress, the auxiliary thin film includes a compressive stress silicon nitride thin film.
4. The method of improving wafer warpage as set forth in claim 2, wherein: when the stress type is tensile stress, the auxiliary thin film includes a tensile stress silicon nitride thin film.
5. The method for improving wafer warpage as claimed in claim 3 or 4, wherein: the auxiliary film also comprises a silicon oxide layer positioned on the surface of the compressive stress silicon nitride film or the tensile stress silicon nitride film.
6. The method of improving wafer warpage as set forth in claim 1, wherein: further comprising the step of removing the auxiliary film.
7. The method of improving wafer warpage as set forth in claim 6, wherein: the method of removing the auxiliary thin film includes a CMP method.
8. The method of improving wafer warpage as set forth in claim 1, further comprising the steps of:
detecting the warpage of the improved wafer;
comparing the warpage with a standard warpage threshold, and repeatedly forming the auxiliary film on the back of the substrate when the warpage exceeds the standard warpage threshold;
and detecting the warpage of the improved wafer again until the wafer meets the standard warpage threshold.
9. The method of improving wafer warpage as set forth in claim 1, wherein: the substrate includes a Si substrate, a GaN substrate, a SiC substrate, or a glass substrate.
10. The method of improving wafer warpage as claimed in any one of claims 1 to 9, wherein: the auxiliary film covers the whole back surface or partial area of the wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310084662.0A CN116031174A (en) | 2023-01-17 | 2023-01-17 | Method for improving wafer warpage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310084662.0A CN116031174A (en) | 2023-01-17 | 2023-01-17 | Method for improving wafer warpage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116031174A true CN116031174A (en) | 2023-04-28 |
Family
ID=86073817
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310084662.0A Pending CN116031174A (en) | 2023-01-17 | 2023-01-17 | Method for improving wafer warpage |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116031174A (en) |
-
2023
- 2023-01-17 CN CN202310084662.0A patent/CN116031174A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7700478B2 (en) | Intermediate anneal for metal deposition | |
| CN109671619B (en) | Wafer-level hybrid bonding method | |
| CN110050326B (en) | Member for semiconductor manufacture including SiC vapor deposition layer and method for manufacturing the same | |
| US20090252944A1 (en) | Silicon wafer and production method thereof | |
| US20220344282A1 (en) | Stress and overlay management for semiconductor processing | |
| JP2003257895A (en) | Wafer mounting semiconductor chip and its producing method | |
| US8969869B2 (en) | Integrated circuit wafer and integrated circuit die | |
| US6251693B1 (en) | Semiconductor processing methods and semiconductor defect detection methods | |
| CN116031174A (en) | Method for improving wafer warpage | |
| US10707151B2 (en) | Through silicon via structure and method for manufacturing the same | |
| CN116544123A (en) | Semiconductor device and method for manufacturing the same | |
| JPWO2020049731A1 (en) | Semiconductor device | |
| CN101764075B (en) | Monitoring method of backside defect of wafer and system thereof | |
| US11164749B1 (en) | Warpage reduction | |
| US10573725B1 (en) | Semiconductor structure and manufacturing method thereof | |
| CN109300781B (en) | Method for manufacturing ONO film layer | |
| US20160155675A1 (en) | Void monitoring device for measurement of wafer temperature variations | |
| KR100577526B1 (en) | Method of manufacturing a semiconductor device | |
| US20200145771A1 (en) | Semiconductor device and manufacture thereof | |
| CN108666209B (en) | Manufacturing method of semiconductor substrate | |
| US10103108B2 (en) | Nanostructured chip and method of producing the same | |
| CN112563194B (en) | Semiconductor structure and manufacturing method thereof | |
| CN111326426A (en) | Method for filling groove and controlling warping degree of silicon wafer and semiconductor device | |
| KR102719855B1 (en) | Manufacturing method of susceptor for wafer | |
| TWI817915B (en) | Method for depositing film of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |