CN116015292A - ADC calibration method based on fully-connected neural network - Google Patents

ADC calibration method based on fully-connected neural network Download PDF

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CN116015292A
CN116015292A CN202310113995.1A CN202310113995A CN116015292A CN 116015292 A CN116015292 A CN 116015292A CN 202310113995 A CN202310113995 A CN 202310113995A CN 116015292 A CN116015292 A CN 116015292A
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adc
neural network
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彭析竹
张耘凡
米奕杭
卢知非
唐鹤
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University of Electronic Science and Technology of China
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Abstract

The invention belongs to the field of ADC calibration algorithms, and particularly relates to an ADC calibration method based on a fully-connected neural network. The method mainly comprises the steps of constructing a fully-connected neural network; injecting harmonic waves into the ideal signals, lengthening sampling time, and randomly sampling to generate a training data set; performing ideal quantization on the training data set with a precision higher than that of the target ADC, and taking the ideal quantization as an input to train the fully connected neural network; and performing calibration processing on the actual ADC chip according to the trained fully-connected neural network. The invention has the advantages that the target ADC is calibrated by utilizing the fully-connected neural network, the error sources and the nonlinear influences are not required to be concerned, the invention is applicable to various ADC structures, has the characteristics of strong universality, easy transplantation, reduced ADC circuit design difficulty and the like, and improves the performance of the ADC chip.

Description

ADC calibration method based on fully-connected neural network
Technical Field
The invention belongs to the field of ADC calibration algorithms, and particularly relates to an ADC calibration method based on a fully-connected neural network.
Background
The basic working flow of the ADC is four stages of sampling, holding, quantizing and encoding, wherein the sampling stage converts a continuously-changed analog signal into a discretely-changed analog signal, the holding stage stores the sampling result until the next sampling, the two stages are usually realized by a sampling and holding circuit, the quantizing and encoding stages convert the analog signal into a digital signal, and the digital signal is converted into a digital code word through a certain encoding rule, and finally, the output of the digital signal is realized.
Due to device characteristics, process errors, environmental factors and the like, the ADC usually generates errors in the operation process, and the errors generated by different modules of the same ADC or ADCs of different architectures are different from each other. The traditional calibration technology is mostly suitable for single-type ADC, has limited aimed error types, is complex in algorithm implementation, high in hardware cost and poor in portability, and increases extra circuit design in the analog part, thereby increasing design difficulty and performance uncertainty of the analog part.
Disclosure of Invention
Aiming at the problems of single type of applicable ADC, single type of error, complex algorithm implementation and the like of the traditional calibration algorithm, the invention provides a neural network ADC calibration method for calibrating ADC errors. The method is based on signal frequency domain modeling and is suitable for various ADC architectures such as Pipelined, SAR, sigma-Delta and the like.
The technical scheme of the invention is as follows:
an ADC calibration method based on a fully connected neural network is used for directly calibrating digital code words output by an ADC, thereby reducing errors in the code words. Mainly comprises the following steps:
s1, constructing a training data set: using an arithmetic progression t m，n ＝t m，1 -(n-1)/f s Generating a time sequence T m Wherein f s For the sampling frequency of ADC, t m，n Represents the sampling time of the ADC, m represents the number of data samples to be generated, n=1, 2,3 … …The method comprises the steps of carrying out a first treatment on the surface of the At the generated T m When the set size is satisfied, randomly selecting a time point from the time points to define t m，1 As the current sampling time, let t m，1 The sampling period of 49 ADCs is continuously searched forward for reference to obtain a time sequence t m，2 ，t m，3 ，……，t m，50 The method comprises the steps of carrying out a first treatment on the surface of the Sampling the input signal at each sampling instant to obtain a basic output code word, and forming data samples by the basic output code word
Figure BDA0004077834130000011
All data samples form a training data matrix +.>
Figure BDA0004077834130000012
Specifically, t in the arithmetic progression m，1 Is the current sampling time of the ADC, and t m，1 ～∪(0，1000×2πf max ) The uniformity of the training data generation in the phase is met, and the decoupling of frequency and phase is realized.
Specifically, the basic output codeword S in the training data m，n From the main lobe of the signal
Figure BDA0004077834130000021
Second harmonic of signal->
Figure BDA0004077834130000022
Third harmonic of signal->
Figure BDA0004077834130000023
Up to the k th harmonic of the signal>
Figure BDA0004077834130000024
Composition, i.e
Figure BDA0004077834130000025
Figure BDA0004077834130000026
Delta is white noise.
The main signal lobe
Figure BDA0004077834130000027
For basic output code word S m，n The value in the ideal case is represented by the formula
Figure BDA0004077834130000028
Figure BDA0004077834130000029
Determination of->
Figure BDA00040778341300000210
Representing the amplitude of the main lobe of the signal and +>
Figure BDA00040778341300000211
f m Representing the frequency of the main lobe of the signal and the normalized frequency satisfying f m /f s ～∪(f min ，f max )。/>
The second harmonic of the signal
Figure BDA00040778341300000212
A small signal generated at 2 times frequency for the main lobe of the signal, which is the nonlinear error generated by the ADC during sampling, is represented by the formula +.>
Figure BDA00040778341300000213
Determination of->
Figure BDA00040778341300000214
Representing the amplitude of the second harmonic and +.>
Figure BDA00040778341300000215
Figure BDA00040778341300000216
Representing the phase relation of the second harmonic and the main lobe
Figure BDA00040778341300000217
Third harmonic of the signal
Figure BDA00040778341300000218
A small signal generated at 3 times frequency for the main lobe of the signal, which is the nonlinear error generated by the ADC during sampling, is represented by the formula +.>
Figure BDA00040778341300000219
And (5) determining.
K-th harmonic of same-order signal
Figure BDA00040778341300000220
A small signal generated at k-frequency for the main lobe of the signal, which is the nonlinear error generated by the ADC during sampling, is represented by the formula +.>
Figure BDA00040778341300000221
And (5) determining.
Wherein the normalized frequency f min And f max Amplitude of signal
Figure BDA00040778341300000222
And->
Figure BDA00040778341300000223
Harmonic order k, second harmonic amplitude
Figure BDA00040778341300000224
And->
Figure BDA00040778341300000225
Third harmonic amplitude->
Figure BDA00040778341300000226
And->
Figure BDA00040778341300000227
And up to k harmonic amplitudes +.>
Figure BDA00040778341300000228
And->
Figure BDA00040778341300000229
All are set according to the needs.
S2, selecting an ideal ADC to carry out ideal quantization on training data according to the accuracy of the target ADC.
Specifically, the quantization process of the ideal quantization is represented by the formula q=round (S m，n The LSB is determined by x LSB, and the LSB represents the minimum resolution precision of the ideal ADC; and the precision relation between the target ADC and the ideal ADC is N train ＝N real +2, where N real For the accuracy of the target ADC, N train Is the accuracy of an ideal ADC.
S3, inputting the data subjected to ideal quantization into a neural network for training, wherein the neural network module is a two-layer fully-connected neural network, and the network is provided with 50 input nodes, 1024 intermediate nodes and 1 output node; wherein 50 input nodes correspond to data samples
Figure BDA0004077834130000031
Combining the current sampling value and the first 49 sampling values of the ADC into a time sequence signal as network input; 1024 intermediate nodes are the perception layer of the neural network and are used for learning the amplitude, frequency and phase information of the input time sequence, so as to analyze network errors and make corresponding compensation; 1 output node outputs the calibration value of the current sampling value of ADC; training the training data to obtain a trained neural network.
Specifically, when initializing the neural network, a first layer weight is required to be set to satisfy the mean value of 0 and the variance of 0
Figure BDA0004077834130000032
The bias is 0, the second layer weight satisfies the mean value 0 and the variance 0>
Figure BDA0004077834130000033
The bias is 0, the activation function is set as a ReLU function, the loss function is set as an MSE function, and the optimization method is set as Adam and the initial learning rate is 0.1.
S4, calibrating the output of the target ADC chip by using the trained neural network, wherein the calibration method specifically comprises the following steps of: and serial-parallel converting the signal sampling data output by the target ADC chip and inputting the signal sampling data into a trained neural network, wherein the output data of the neural network is a calibrated signal.
The beneficial effects of the invention are as follows: the invention is suitable for various ADC structures, does not need to pay attention to the source and nonlinear influence of errors and does not need to derive a single calibration algorithm aiming at specific errors, and has the advantages of strong universality and easiness in transplanting; the neural network calibration method is highly decoupled from the ADC, so that the module of the neural network calibration method can be integrated into a rear-end signal processing chip, and the circuit complexity and the design difficulty of the ADC chip are reduced.
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The following drawings, which schematically illustrate the principal features of some embodiments of the invention, assist in better understanding the following description of various embodiments of the invention. The figures and embodiments provide some embodiments of the invention in a non-limiting, non-exhaustive manner. For simplicity, the same or similar components or structures having the same function in different drawings are given the same reference numerals.
Fig. 1 is a schematic diagram of an overall architecture of a neural network ADC calibration method according to the present invention.
Fig. 2 is a workflow diagram of training data set generation in accordance with the present invention.
Fig. 3 is a diagram illustrating a problem of non-uniformity of phase of a signal generated by frequency variation in training data set generation according to the present invention.
Fig. 4 is a flowchart of a training neural network according to an embodiment of the present invention.
FIG. 5 is a graph showing the calibration effect of a neural network trained in accordance with an embodiment of the present invention on an actual ADC with the pipeline and Sigma-Delta structures.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings and examples. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The overall architecture of the neural network ADC calibration method of this embodiment is shown in fig. 1, in which an ideal signal in a training dataset is generated and injected into an ideal ADC, the ADC may be in a variety of ADC structures such as Pipelined, SAR, sigma-Delta, and the higher harmonic error of the signal is injected into the ADC and corresponding sampled output data is generated, the neural network inputs the received data vector into a fully connected network, calculates the difference between the network output and the ideal signal by a ReLU function, and feeds back the difference to the network by using a counter-propagation mechanism to perform iterative optimization. The specific embodiment is as follows:
b1, generating training data as shown in FIG. 2, and setting a normalized frequency f min =0.28 and f max =0.32, signal amplitude
Figure BDA0004077834130000041
And->
Figure BDA0004077834130000042
ADC bit width N real =12, total data amount m max =5000000, harmonic order k=3, second harmonic amplitude +.>
Figure BDA0004077834130000043
And->
Figure BDA0004077834130000044
Third harmonic amplitude->
Figure BDA0004077834130000045
And->
Figure BDA0004077834130000046
Randomizing parameters in each iteration according to a defined range after setting, and generating an ADC sampling time sequence T m I.e. at [0, 1000×2πf max ]Randomly selecting a time point t within the time range of (2) m，1 As the current sampling time, taking the current sampling time as a reference, continuously searching the sampling periods of 49 ADCs forwards to obtain a time sequence t m，2 ，t m，3 ，……，t m，50 。
The random initial sampling point in a long enough time range can solve the problem of non-uniform phase of a sampled signal caused by continuous change of frequency, as shown in fig. 3, if sampling is performed in a period corresponding to the signal frequency of the first cycle, when the signal frequency of the second cycle is changed, if sampling is performed in the signal period of the first cycle, the problem of non-sampling or multi-sampling of partial phase can occur. When the sampling time is sufficiently large, the phase of the non-uniformity is so small as to be ignored, and the problem of the phase non-uniformity is also solved.
Then based on time series T m Performing cyclic operation at 50 time points to obtain basic output code word S m，n And respectively obtaining the value of the main lobe of the signal at the current moment or the value of each order of harmonic wave in each cycle.
The n-th cycle is described as an example:
b1.1, let t m，n Carry-in main lobe function
Figure BDA0004077834130000047
And obtaining an ideal output code word.
B1.2, let t m，n Brought into second harmonic function
Figure BDA0004077834130000048
Obtaining a secondary nonlinear error and continuing to bring in a third harmonic function +.>
Figure BDA0004077834130000049
Three nonlinear errors are obtained.
B1.3 use of
Figure BDA00040778341300000410
Combining the ideal signal and the nonlinear error to obtain a basic valueThe codeword is output, where δ is a small white noise to improve the robustness of the neural network.
Combining the 50 basic output codewords into a vector to obtain 1 output codeword sequence
Figure BDA0004077834130000051
If enough output code word sequences are obtained, the circulation is stopped, otherwise, the circulation is continued until the data quantity reaches the requirement.
B2, quantizing the training data set by using the ideal ADC, and selecting the quantized bit width N train ＝14。
B3, injecting the training data set into the fully connected neural network for training, as shown in fig. 4, which is a flowchart of training the neural network according to the embodiment, the specific training scheme is as follows:
b3.1, setting the network structure as a two-layer fully-connected network, wherein the network structure comprises 50 input nodes, 1024 intermediate nodes and 1 output node, and the first layer weight matrix satisfies that the mean value is 0 and the variance is 1
Figure BDA0004077834130000052
The bias is 0, the second layer weight matrix satisfies the mean value of 0 and the variance of +.>
Figure BDA0004077834130000053
The bias is 0 for the normal distribution of (a). The activation function is set as a ReLU function, the loss function is set as an MSE function, the optimization method is set as Adam and the initial learning rate is 0.1.
And B3.2, training the initialized neural network, setting the iteration number epoch=80, and setting the batch size=10 of each batch of data. Because of the nature of random sampling during the generation of the training data set, the data generated during each iteration is different, so that the fully connected neural network can be trained and iterated only once in this example, equivalently 4 hundred million sets of data. In the training process, each time the iteration is completed, the loss function value of the current network is recorded, and after the iteration is completed, the loss function converges to indicate that the neural network training is successful.
And B4, testing the performance of the trained neural network by using the actual measurement data of the real ADC chip, wherein the method for evaluating the performance of the ADC calibration method is to respectively carry out FFT analysis on signals before and after calibration and analyze parameters such as signal-to-noise-and-distortion ratio (SNDR), spurious-free dynamic range (SFDR), effective bit number (ENOB) and the like of the calibration signals on a frequency spectrum. Specifically, unlike random sampling of training data, FFT analysis of 1024 sampling points is selected in this example, test data needs to continuously sample 1073 sets of data samples, and 1024 continuous digital signals, that is, calibration signals, are generated after the data samples are calibrated by the neural network.
Further, FIG. 5 illustrates the calibration effect of the neural network trained by the present example on actual Pipelined ADC and Sigma-Delta ADC chips. The graph shows that after the treatment of the neural network calibration method provided by the invention, SNDR of two ADC chips is improved by 8-9 dB, SFDR is improved by 12-15 dB, ENOB is improved by 1-2 Bit, and clutter on a frequency spectrum is effectively inhibited, so that the neural network ADC calibration method constructed by the embodiment has an effective calibration effect on an actual ADC.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that various modifications and adaptations can be made without departing from the principles of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.

Claims (5)

1. The ADC calibration method based on the fully-connected neural network is characterized by comprising the following steps of:
s1, acquiring training data: using an arithmetic progression t m，n ＝t m，1 -(n-1)/f s Generating a time sequence T m Wherein f s For the sampling frequency of ADC, t m，n Representing the sampling time of the ADC, m representing the number of data samples to be generated, n=1, 2,3 … …; at the generated T m When the set size is satisfied, randomly selecting a time point from the time points to define t m，1 As the current sampling time, let t m，1 For benchmark, search for 49A continuously forwardThe sampling period of DC results in a time series t m，2 ，t m，3 ，……，t m，50 The method comprises the steps of carrying out a first treatment on the surface of the Obtaining a basic output code word at each sampling time, and forming data samples by the basic output code word
Figure FDA0004077834120000011
All data samples constitute training data +.>
Figure FDA0004077834120000012
S2, selecting an ideal ADC to carry out ideal quantization on training data according to the precision of a target ADC;
s3, inputting the data subjected to ideal quantization into a neural network for training, wherein the neural network module is a two-layer fully-connected neural network, and the network is provided with 50 input nodes, 1024 intermediate nodes and 1 output node; wherein 50 input nodes correspond to data samples
Figure FDA00040778341200000114
Combining the current sampling value and the first 49 sampling values of the ADC into a time sequence signal as network input; 1024 intermediate nodes are the perception layer of the neural network and are used for learning the amplitude, frequency and phase information of the input time sequence, so as to analyze network errors and make corresponding compensation; 1 output node outputs the calibration value of the current sampling value of ADC; training the training data to obtain a trained neural network;
s4, calibrating the output of the target ADC chip by using the trained neural network, wherein the calibration method specifically comprises the following steps of: and serial-parallel converting the signal sampling data output by the target ADC chip and inputting the signal sampling data into a trained neural network, wherein the output data of the neural network is a calibrated signal.
2. The neural network-based ADC calibration method according to claim 1, wherein the basic output code word S m，n From the main lobe of the signal
Figure FDA0004077834120000013
Second harmonic of signal->
Figure FDA0004077834120000014
Third harmonic of signal->
Figure FDA0004077834120000015
Up to the k th harmonic of the signal>
Figure FDA0004077834120000016
Composition, i.e.)>
Figure FDA0004077834120000017
Delta is white noise;
the main signal lobe
Figure FDA0004077834120000018
For basic output code word S m The value of n in the ideal case is represented by the formula
Figure FDA0004077834120000019
Figure FDA00040778341200000110
Determination of->
Figure FDA00040778341200000111
Representing the amplitude of the main lobe of the signal and +>
Figure FDA00040778341200000112
f m Representing the frequency of the main lobe of the signal and the normalized frequency satisfying f m /f s ～∪(f min ，f max )；
The second harmonic of the signal
Figure FDA00040778341200000113
Small signals generated at 2 times the frequency for the main lobe of the signalFor nonlinear errors generated by ADC during sampling, the method is represented by the formula +.>
Figure FDA0004077834120000021
Determination of->
Figure FDA0004077834120000022
Representing the amplitude of the second harmonic and +.>
Figure FDA0004077834120000023
Figure FDA0004077834120000024
Representing the phase relation of the second harmonic and the main lobe and +.>
Figure FDA0004077834120000025
Third harmonic of the signal
Figure FDA0004077834120000026
A small signal generated at 3 times frequency for the main lobe of the signal, which is the nonlinear error generated by the ADC during sampling, is represented by the formula +.>
Figure FDA0004077834120000027
Determining;
k-th harmonic of same-order signal
Figure FDA0004077834120000028
A small signal generated at k-frequency for the main lobe of the signal, which is the nonlinear error generated by the ADC during sampling, is represented by the formula +.>
Figure FDA0004077834120000029
Determining;
wherein the normalized frequency f min And f max Amplitude of signal
Figure FDA00040778341200000210
And->
Figure FDA00040778341200000211
Harmonic order k, second harmonic amplitude +.>
Figure FDA00040778341200000212
And
Figure FDA00040778341200000213
third harmonic amplitude->
Figure FDA00040778341200000214
And->
Figure FDA00040778341200000215
And up to k harmonic amplitudes +.>
Figure FDA00040778341200000216
And->
Figure FDA00040778341200000217
All are set according to the needs.
3. The neural network-based ADC calibration method according to claim 2, wherein t m，1 ～∪(0，1000×2πf max )。
4. A neural network based ADC calibration method according to claim 3, wherein the quantization process of the ideal quantization is represented by the formula Q = round (S m，n The LSB is determined by x LSB, and the LSB represents the minimum resolution precision of the ideal ADC; and the precision relation between the target ADC and the ideal ADC is N train ＝N real +2, where N real For the accuracy of the target ADC, N train Is the accuracy of an ideal ADC.
5. The method of claim 4, wherein the neural network is configured to set a first layer weight satisfying mean to 0 and variance to
Figure FDA00040778341200000218
The bias is 0, the second layer weight satisfies the mean value 0 and the variance 0>
Figure FDA00040778341200000219
The bias is 0, the activation function is set as a ReLU function, the loss function is set as an MSE function, the optimization method is set as Adam, and the initial learning rate is 0.1./>
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117408315A (en) * 2023-10-25 2024-01-16 合肥工业大学 Forward reasoning module for background calibration of pipeline analog-to-digital converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117408315A (en) * 2023-10-25 2024-01-16 合肥工业大学 Forward reasoning module for background calibration of pipeline analog-to-digital converter

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