CN115996514A - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereof Download PDFInfo
- Publication number
- CN115996514A CN115996514A CN202111223403.9A CN202111223403A CN115996514A CN 115996514 A CN115996514 A CN 115996514A CN 202111223403 A CN202111223403 A CN 202111223403A CN 115996514 A CN115996514 A CN 115996514A
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- Prior art keywords
- metal layer
- layer
- conductive pattern
- substrate
- opening
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 229910052751 metal Inorganic materials 0.000 claims abstract description 126
- 239000002184 metal Substances 0.000 claims abstract description 126
- 239000000758 substrate Substances 0.000 claims abstract description 89
- 238000005452 bending Methods 0.000 claims abstract description 35
- 230000000149 penetrating effect Effects 0.000 claims abstract description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 14
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical group [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 10
- 239000010931 gold Substances 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 164
- 239000011889 copper foil Substances 0.000 description 10
- 239000004020 conductor Substances 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- -1 Polyethylene terephthalate Polymers 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 229920000106 Liquid crystal polymer Polymers 0.000 description 3
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 description 3
- 239000011112 polyethylene naphthalate Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- FFRBMBIXVSCUFS-UHFFFAOYSA-N 2,4-dinitro-1-naphthol Chemical compound C1=CC=C2C(O)=C([N+]([O-])=O)C=C([N+]([O-])=O)C2=C1 FFRBMBIXVSCUFS-UHFFFAOYSA-N 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- LYCAIKOWRPUZTN-UHFFFAOYSA-N ethylene glycol Natural products OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- WGCNASOHLSPBMP-UHFFFAOYSA-N hydroxyacetaldehyde Natural products OCC=O WGCNASOHLSPBMP-UHFFFAOYSA-N 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The circuit substrate comprises a substrate layer and a conductive pattern arranged on the substrate layer, wherein the conductive pattern is provided with an opening in a penetrating way, and part of the substrate layer is exposed at the bottom of the opening. And arranging grooves on the exposed part of the substrate layer, wherein the side edges of the grooves are flush with the side edges of the openings. And a first metal layer is arranged in the groove, a second metal layer is arranged on the conductive pattern, the end part of the second metal layer extends towards the first metal layer to form a bending part, and the bending part is electrically connected with the first metal layer to obtain the circuit board. The manufacturing method can reduce the risk of falling of the conductive pattern. In addition, the application also provides a circuit board.
Description
Technical Field
The application relates to a circuit board and a manufacturing method thereof.
Background
Gold Finger (Gold Finger) is a plurality of golden yellow conductive plates arranged on the circuit board in a row and is used for being inserted into a slot of another component so as to realize electrical conduction with the other component.
In general, the gold finger forms the surface of the circuit substrate by electroplating or electroless plating, so that the adhesion force between the gold finger and the circuit substrate is weak, and the gold finger is peeled off from the circuit substrate after being plugged and pulled for many times.
Disclosure of Invention
In order to solve the problems in the background art, the present application provides a method for manufacturing a circuit board.
In addition, it is also necessary to provide a circuit board.
A method of manufacturing a circuit board, comprising the steps of:
the circuit substrate comprises a substrate layer and a conductive pattern arranged on the substrate layer, wherein an opening is formed in the conductive pattern in a penetrating mode, and part of the substrate layer is exposed out of the bottom of the opening. And arranging grooves on the exposed part of the substrate layer, wherein the side edges of the grooves are flush with the side edges of the openings. And a first metal layer is arranged in the groove, a second metal layer is arranged on the conductive pattern, the end part of the second metal layer extends towards the first metal layer to form a bending part, and the bending part is electrically connected with the first metal layer to obtain the circuit board.
Further, before disposing the second metal layer, the method further includes: and a third metal layer is arranged on the conductive pattern, and the end part of the third metal layer extends towards the first metal layer to form a substrate layer. The manufacturing method further comprises the steps of: and the second metal layer is arranged on the third metal layer, and the bending part is attached to the substrate layer.
Further, after disposing the third metal layer on the conductive pattern, the method further includes: and setting a seed layer on the third metal layer. The manufacturing method further comprises the steps of: and arranging the second metal layer on the seed layer.
Further, before disposing the first metal layer, the method further includes: and a first covering layer is arranged on the conductive pattern and the exposed part of the substrate layer, the first covering layer is provided with a first open window, and the first open window is arranged corresponding to the groove. After the first metal layer is arranged, the method further comprises the steps of: and removing the first covering layer.
Further, before disposing the second metal layer, the method further includes: and a second covering layer is arranged on the exposed part of the substrate layer and the exposed part of the first metal layer, the second covering layer is provided with a second open window, and the second open window is arranged corresponding to the conductive pattern and the part of the groove adjacent to the conductive pattern. The second metal layer is arranged and then further comprises: and removing the second covering layer.
Further, the method further comprises the steps of: and removing the part of the first metal layer which does not correspond to the bending part.
The circuit board comprises a circuit substrate, a first metal layer, a second metal layer and a bending part, wherein the circuit substrate comprises a substrate layer and conductive patterns arranged on the substrate layer, the conductive patterns penetrate through openings, part of the substrate layer is exposed out of the bottoms of the openings, grooves are formed in the exposed part of the substrate layer, and the side faces of the grooves are flush with the side faces of the openings. The first metal layer is arranged in the opening. The second metal layer is arranged on the conductive pattern, the end part of the second metal layer extends towards the first metal layer to form a bending part, and the bending part is electrically connected with the first metal layer.
Further, the conductive pattern includes a plurality of connection lines arranged side by side at intervals, and the first metal layer is electrically connected to each connection line.
Further, the circuit board further comprises a third metal layer and a substrate layer, the second metal layer is arranged on the third metal layer, the third metal layer faces the first metal layer to form the substrate layer, and the bending part is attached to the substrate layer.
Further, the first metal layer and the third metal layer are made of copper, and the second metal layer is made of gold.
The circuit board provided by the application forms the kink through extending on the second metal level, the kink can show the adhesion ability that increases second metal level and conductive pattern, especially can resist or offset the pulling force or the frictional force that act on conductive pattern to reduce conductive pattern drops the risk.
Drawings
Fig. 1 is a schematic cross-sectional view of a circuit substrate according to an embodiment of the present disclosure.
Fig. 2 is a schematic cross-sectional view of the circuit substrate shown in fig. 1 with a first opening and a second opening.
Fig. 3 is a schematic cross-sectional view of the circuit substrate shown in fig. 2 provided with a first groove and a second groove.
Fig. 4 is a schematic cross-sectional view of the circuit substrate shown in fig. 3 provided with a first cover layer.
Fig. 5 is a schematic cross-sectional view of the circuit substrate shown in fig. 4 provided with a first metal layer.
Fig. 6 is a schematic cross-sectional view of the circuit substrate shown in fig. 5 provided with a third metal layer.
Fig. 7 is a schematic cross-sectional view of the circuit substrate shown in fig. 6 provided with a second cover layer.
Fig. 8 is a schematic cross-sectional view of the circuit substrate shown in fig. 7 provided with a second metal layer.
Fig. 9 is a schematic cross-sectional view of the circuit substrate shown in fig. 8 with the second cover layer removed.
Fig. 10 is a schematic cross-sectional view (cross-sectional view along line XI-XI of fig. 11) of a circuit board according to an embodiment of the present application.
Fig. 11 is a top view of a circuit board according to an embodiment of the present disclosure.
Description of the main reference signs
First conductive pattern 12
First opening 121
Second conductive pattern 13
First copper foil layer 51
Second copper foil layer 52
The following detailed description will further illustrate the application in conjunction with the above-described figures.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may be present.
Referring to fig. 1 to 11, an embodiment of the present application provides a method for manufacturing a circuit board 100, including the steps of:
referring to fig. 2, a circuit substrate 10 is provided, and the circuit substrate 10 includes a substrate layer 11, a first conductive pattern 12 and a second conductive pattern 13. The first conductive patterns 12 and the second conductive patterns 13 are respectively disposed on two opposite surfaces of the substrate layer 11, the first conductive patterns 12 are provided with first openings 121, and a part of the substrate layer 11 is exposed at the bottoms of the first openings 121. The second conductive pattern 13 is provided with a second opening 131, a portion of the substrate layer 11 is exposed at the bottom of the second opening 131, and the first opening 121 is disposed corresponding to the second opening 131.
In this embodiment, referring to fig. 2, the substrate layer 11 further has a multi-layer circuit structure 14 and an interlayer conductor (not shown) embedded therein, and the interlayer conductor passes through the substrate layer 11 and electrically connects the first conductive pattern 12, the second conductive pattern 13 and the multi-layer circuit structure 14.
In this embodiment, the material of the substrate layer 11 includes, but is not limited to, polyimide (PI), polyester resin (Polyethylene terephthalate, PET), polyethylene naphthalate (Polyethylene naphthalate two formic acid glycol ester, PEN), liquid crystal polymer (liquid crystal polymer, LCP), and modified Polyimide (modified Polyimide, MPI).
In this embodiment, referring to fig. 2 and fig. 11, the first conductive pattern 12 includes a plurality of first connection lines 122 arranged side by side, and a plurality of first connection lines 122 are arranged at intervals. The second conductive pattern 13 includes a plurality of second connection lines 132 arranged side by side, and a plurality of second connection lines 132 are arranged at intervals.
In this embodiment, referring to fig. 1 and 2, the method for manufacturing the circuit substrate 10 includes:
referring to fig. 1, a substrate 50 is provided, wherein the substrate 50 includes the base material layer 11, a first copper foil layer 51, a second copper foil layer 52, the multi-layer circuit structure 14 and the interlayer conductor. The first copper foil layer 51 and the second copper foil layer 52 are respectively disposed on two opposite surfaces of the substrate layer 11, the multilayer circuit structure 14 is disposed in the substrate layer 11, the interlayer conductor penetrates through the substrate layer 11, and the interlayer conductor is electrically connected to the first copper foil layer 51, the second copper foil layer 52 and the multilayer circuit structure 14.
Referring to fig. 2, the first copper foil layer 51 is etched to form the first conductive pattern 12, the first conductive pattern 12 has the first opening 121, and the second copper foil layer 52 is etched to form the second conductive pattern 13, the second conductive pattern 13 has the second opening 131.
Referring to fig. 3, a first groove 111 and a second groove 112 are respectively disposed on the exposed portion of the substrate layer 11. The first groove 111 communicates with the first opening 121, and a side edge of the first groove 111 is flush with a side edge of the first opening 121 (i.e., corresponds to a portion of the substrate layer 11 near the first conductive pattern 12 being recessed to form the first groove 111). The second groove 112 communicates with the second opening 131, and a side edge of the second groove 112 is flush with a side edge of the second opening 131 (i.e., corresponds to a portion of the substrate layer 11 near the second conductive pattern 13 being recessed to form the second groove 112).
Referring to fig. 6, a first metal layer 21 is disposed in the first groove 111 and the second groove 112, the first metal layer 21 disposed in the first groove 111 is electrically connected to each of the first connection circuits 122, and the first metal layer 21 disposed in the second groove 112 is electrically connected to each of the second connection circuits 132.
In this embodiment, referring to fig. 4 to 5, step S3 includes:
referring to fig. 4, first cover layers 22 are disposed on opposite sides of the circuit substrate 10, wherein one of the first cover layers 22 covers the first conductive patterns 12 and a portion of the substrate layer 11 exposed in the first opening 121, and the other of the first cover layers 22 covers the second conductive patterns 13 and a portion of the substrate layer 11 exposed in the second opening 131. The first cover layers 22 are provided with first windows 221, and the first grooves 111 and the second grooves 112 are exposed in the first windows 221, respectively.
Referring to fig. 5, the circuit substrate 10 provided with the first cover layer 22 is immersed in a chemical plating solution to deposit and form the seed layers (not shown) in the first recess 111 and the second recess 112, respectively, the two first cover layers 22 are removed, and then the first metal layer 21 is electroplated on the seed layers to form the first metal layer 21, wherein the first metal layer 21 is made of conductive metals such as copper, iron, aluminum, etc.
Referring to fig. 9, a second metal layer 31 is disposed on the first conductive pattern 12 and the second conductive pattern 13, respectively. The second metal layer 31 disposed on the first conductive pattern 12 extends toward the first metal layer 21 disposed in the first groove 111 to form a first bending portion 311, and the first bending portion 311 is electrically connected to the first metal layer 21 disposed in the first groove 111. The second metal layer 31 disposed on the second conductive pattern 13 extends toward the first metal layer 21 disposed in the second groove 112 to form a second bending portion 312, and the second bending portion 312 is electrically connected to the first metal layer 21 in the second groove 112. Wherein, the material of the second metal layer 31 is gold.
In this embodiment, referring to fig. 6, step S4 further includes the following steps: and S40, respectively arranging a third metal layer 32 on the first conductive pattern 12 and the second conductive pattern 13, wherein the end part of the third metal layer 32 extends towards the first metal layer 21 to form a substrate layer 321. The third metal layer 32 is made of conductive metal such as copper, iron, aluminum, etc.
In the present embodiment, step S4 includes the steps of:
referring to fig. 7, a second cover layer 41 is disposed on a portion of the first metal layer 21 away from the substrate layer 321 and a portion of the substrate layer 11 exposing the first opening 121 or the second opening 131, the second cover layer 41 is provided with a second opening 411, and the second opening 411 is disposed corresponding to the third metal layer 32 and a portion of the first metal layer 21 adjacent to the substrate layer 321.
S42, disposing a seed layer (not shown) on the third metal layer 32;
referring to fig. 8, the second metal layer 31 is formed on the seed layer by electroplating, and the first bending portion 311 and the second bending portion 312 are attached to the surface of the substrate layer 321.
S43 referring to fig. 9, the second cover layer 41 is removed.
Referring to fig. 10, the first metal layer 21 is etched away from the portions of the first bending portion 311 and the second bending portion 312, so as to obtain the circuit board 100. Each of the first connection circuits 122, the third metal layer 32 disposed on the first connection circuits 122, and the second metal layer 31 disposed on the third metal layer 32 together form a gold finger 60, and the gold finger 60 may be used to be plugged into a slot of an electronic device (not shown) to realize electrical conduction between the circuit board 100 and the electronic device, where the electronic device includes a computer, a mobile phone, a camera, etc.
Compared with the prior art, the manufacturing method of the circuit board 100 provided by the application has the following advantages:
first, by forming the first bending portion 311 and the second bending portion 312 by extending on the second metal layer 31, the first bending portion 311 can significantly increase the adhesion capability between the second metal layer 31 and the first conductive pattern 12, and the second bending portion 312 can increase the adhesion capability between the second metal layer 31 and the second conductive pattern 13, and in particular, can resist or counteract the pulling force or friction force acting on the first conductive pattern 12 or the second conductive pattern 13, thereby reducing the risk of the first conductive pattern 12 or the second conductive pattern 13 falling off.
And (two) the first metal layer 21 is disposed in the first groove 111 or the second groove 112, so that the bending portion 312 may be disposed on the first metal layer 21, the first bending portion 311 connects the first conductive pattern 12 and the first metal layer 21 together, and the second bending portion 312 connects the second conductive pattern 13 and the first metal layer 21 together, thereby further reducing the risk of the first conductive pattern 12 or the second conductive pattern 13 falling off.
Referring to fig. 10 and 11, the present application further provides a circuit board 100, where the circuit board 100 includes a circuit substrate 10, a first metal layer 21, a second metal layer 31, and a bending portion 312.
The circuit substrate 10 includes a substrate layer 11, and a first conductive pattern 12 and a second conductive pattern 13 disposed on the substrate layer 11, where the first conductive pattern 12 is provided with a first opening 121 in a penetrating manner, the second conductive pattern 13 is provided with a second opening 131 in a penetrating manner, the first opening 121 and the second opening 131 are correspondingly disposed, and a part of the substrate layer 11 is exposed at bottoms of the first opening 121 and the second opening 131.
The exposed portion of the substrate layer 11 is provided with a first groove 111 and a second groove 112, the first groove 111 communicates with the first opening 121, the side surface of the first groove 111 is flush with the side surface of the first opening 121, the second groove 112 communicates with the second opening 131, and the side surface of the second groove 112 is flush with the side surface of the second opening 131.
The first metal layer 21 is disposed in the first groove 111 and the second groove 112, the second metal layer 31 is disposed on the first conductive pattern 12 and the second conductive pattern 13, the end portion of the second metal layer 31 extends toward the first metal layer 21 to form the bending portion 312, and the bending portion 312 is electrically connected to the first metal layer 21.
Claims (10)
1. A method of manufacturing a circuit board, comprising the steps of:
providing a circuit substrate, wherein the circuit substrate comprises a substrate layer and a conductive pattern arranged on the substrate layer, an opening is arranged through the conductive pattern, and part of the substrate layer is exposed out of the bottom of the opening;
arranging grooves on the exposed part of the substrate layer, wherein the side edges of the grooves are level with the side edges of the openings;
a first metal layer is arranged in the groove; and
and arranging a second metal layer on the conductive pattern, wherein the end part of the second metal layer extends towards the first metal layer to form a bending part, and the bending part is electrically connected with the first metal layer to obtain the circuit board.
2. The method of manufacturing of claim 1, further comprising, prior to disposing the second metal layer: providing a third metal layer on the conductive pattern, wherein the end part of the third metal layer extends towards the first metal layer to form a substrate layer;
the manufacturing method further comprises the steps of: and the second metal layer is arranged on the third metal layer, and the bending part is attached to the substrate layer.
3. The method of manufacturing of claim 2, further comprising, after disposing a third metal layer on the conductive pattern: setting a seed layer on the third metal layer;
the manufacturing method further comprises the steps of: and arranging the second metal layer on the seed layer.
4. The method of manufacturing of claim 1, further comprising, prior to disposing the first metal layer:
a first covering layer is arranged on the conductive pattern and the exposed part of the substrate layer, the first covering layer is provided with a first open window, and the first open window is arranged corresponding to the groove;
after the first metal layer is arranged, the method further comprises the steps of: and removing the first covering layer.
5. The method of manufacturing of claim 1, further comprising, prior to disposing the second metal layer:
a second covering layer is arranged on the exposed part of the substrate layer and the exposed part of the first metal layer, the second covering layer is provided with a second open window, and the second open window is arranged corresponding to the conductive pattern and the part of the groove adjacent to the conductive pattern;
the second metal layer is arranged and then further comprises: and removing the second covering layer.
6. The method of manufacturing of claim 1, further comprising the step of:
and removing the part of the first metal layer which does not correspond to the bending part.
7. A circuit board, comprising:
the circuit substrate comprises a substrate layer and a conductive pattern arranged on the substrate layer, wherein an opening is formed in the conductive pattern in a penetrating manner, part of the substrate layer is exposed out of the bottom of the opening, a groove is formed in the exposed part of the substrate layer, and the side face of the groove is level with the side face of the opening;
the first metal layer is arranged in the opening;
a second metal layer disposed on the conductive pattern;
the end part of the second metal layer extends towards the first metal layer to form the bending part, and the bending part is electrically connected with the first metal layer.
8. The circuit board of claim 7, wherein said conductive pattern includes a plurality of spaced apart connection traces side by side, said first metal layer electrically connecting each of said connection traces.
9. The circuit board of claim 7, further comprising a third metal layer and a substrate layer, wherein the second metal layer is disposed on the third metal layer, the third metal layer faces the first metal layer to form the substrate layer, and the bending portion is attached to the substrate layer.
10. The circuit board of claim 9, wherein the first metal layer and the third metal layer are copper and the second metal layer is gold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111223403.9A CN115996514A (en) | 2021-10-20 | 2021-10-20 | Circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111223403.9A CN115996514A (en) | 2021-10-20 | 2021-10-20 | Circuit board and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115996514A true CN115996514A (en) | 2023-04-21 |
Family
ID=85989231
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111223403.9A Pending CN115996514A (en) | 2021-10-20 | 2021-10-20 | Circuit board and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115996514A (en) |
-
2021
- 2021-10-20 CN CN202111223403.9A patent/CN115996514A/en active Pending
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