CN115987829A - Clock synchronization system testing method, device and equipment for intelligent substation process layer - Google Patents
Clock synchronization system testing method, device and equipment for intelligent substation process layer Download PDFInfo
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Abstract
The invention relates to the technical field of intelligent substation maintenance, in particular to a method, a device and equipment for testing a clock synchronization system of an intelligent substation process layer, wherein the method comprises the following steps: the background flow is constructed by sending the message information corresponding to the flow by the network port parameters of the switch, so that network congestion is formed in an intelligent substation in the signal transmission process, time signals of a microcomputer monitoring system and a clock synchronization system are obtained in real time, an error value between the time signals of the two systems is calculated, the reliability of the clock synchronization system in time synchronization under the condition of network congestion is verified by judging whether the error value is greater than an error threshold value, the process layer network digital development process of the intelligent station is conformed, the test method is improved by fully considering the process layer network data transmission form, and the test efficiency is improved.
Description
Technical Field
The invention relates to the technical field of intelligent substation maintenance, in particular to a method, a device and equipment for testing a clock synchronization system of an intelligent substation process layer.
Background
The method conforms to the technical development trend of plant station digitization, and the number of the intelligent transformer stations is more and more, so that the method is more and more important for comprehensively verifying and guaranteeing the technical reliability of each intelligent station, improving the grid-connected efficiency of the intelligent station for building or reconstructing the intelligent transformer station, reducing the on-site debugging workload and the debugging difficulty, and realizing the quality improvement and the efficiency improvement of the operation and maintenance management of the secondary equipment, and developing engineering test tests for the secondary system of the intelligent station;
compared with a conventional station, signal acquisition and action commands of secondary equipment of the intelligent station are transmitted in a process layer network data form, and the digitization and networking characteristics of the intelligent station make the traditional testing method difficult to meet testing requirements.
Disclosure of Invention
The invention provides a method for testing a clock synchronization system of an intelligent substation process layer, which is used for solving the problem that the traditional testing method is difficult to meet the testing requirement in the prior art due to digitization and networking of an intelligent substation.
The invention provides a clock synchronization system test method of an intelligent substation process layer, which comprises the following steps: calculating message information flow required to be generated under the background flow of the preset proportion according to the network port parameters of the switch connected with the microcomputer monitoring system and the clock synchronization system; sending message information to an exchange network port to construct background flow of preset proportion;
acquiring time signals of a microcomputer monitoring system and a clock synchronization system in real time within preset time, and calculating an error value between the time signals of the two systems; and judging whether the error value is larger than or equal to an error threshold value, if so, the clock synchronization system fails to test.
Optionally, the method further includes: disconnecting the GPS or Beidou standard clock source from the clock synchronization system; and acquiring a time signal of the GPS or Beidou standard clock source within preset time, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails.
Optionally, the method further includes: the clock synchronization system is accessed to a GPS or Beidou standard clock source, and the clock synchronization system is enabled to enter a GPS or Beidou signal locking state; and calculating an error value between the GPS or Beidou standard clock source and a time signal of the clock synchronization system in real time within preset time, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails.
Optionally, the method further includes: connecting a clock synchronization system to a GPS or Beidou standard clock source, keeping the clock synchronization system in a GPS or Beidou signal locking state for a first duration, and disconnecting the clock synchronization system from the GPS or Beidou standard clock source; and after the second duration, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system, and if the error value is greater than or equal to the timekeeping threshold, the clock synchronization system fails to test.
Optionally, the method further includes: respectively obtaining time signals of a master clock and a slave clock in a clock synchronization system, calculating an error value between the master clock and the slave clock, and judging that the clock synchronization system fails to test if the error value at a certain moment is greater than or equal to an error threshold value within preset time.
Optionally, the method further includes: and superposing an error value between the time signals of the microcomputer monitoring system and the clock synchronization system with an error value between the time signals of the GPS or Beidou standard clock source and the clock synchronization system to obtain an overall error value, judging whether the error value is greater than or equal to an error threshold value, and if so, failing to test the clock synchronization system.
The second aspect of the present application provides a clock synchronization system testing apparatus of an intelligent substation process layer, including:
the background flow generation module is used for acquiring the network port parameters of the switch connected with the microcomputer monitoring system and the clock synchronization system and calculating the message information flow required to be generated by the background flow with preset proportion under the network port parameters of the switch; constructing background flow of preset proportion by sending corresponding message information flow to a network port of a switch;
the time signal acquisition and calculation module is used for setting a first duration for acquiring the time signals, acquiring the time signals of the microcomputer monitoring system and the clock synchronization system in real time within the first duration, and calculating an error value between the time signals of the two systems; and judging whether the error value is larger than or equal to an error threshold value, if so, the test of the clock synchronization system fails.
Optionally, the method further includes: the out-of-synchronization time setting test module is used for disconnecting the connection between the GPS or Beidou standard clock source and the clock synchronization system; and setting a second duration for acquiring the time signal, acquiring the time signal of the GPS or Beidou standard clock source within the second duration, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails.
Optionally, the method further includes: the time setting precision testing module is used for connecting the clock synchronization system to a GPS or Beidou standard clock source and enabling the clock synchronization system to enter a GPS or Beidou signal locking state; and setting a third duration for acquiring the time signal, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time within the third duration, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails.
The third aspect of the present application provides a clock synchronization system testing device of an intelligent substation process layer, where the device includes a processor and a memory:
the memory is used for storing program codes and transmitting the program codes to the processor;
the processor is configured to execute the method for testing the clock synchronization system of the process layer of the intelligent substation according to any one of the first aspect of the present invention according to instructions in the program code.
According to the technical scheme, the invention has the following advantages: the background flow is constructed by sending the message information corresponding to the flow by the network port parameters of the switch, so that network congestion is formed in an intelligent substation in the signal transmission process, time signals of a microcomputer monitoring system and a clock synchronization system are obtained in real time, an error value between the time signals of the two systems is calculated, the reliability of the clock synchronization system in time synchronization under the condition of network congestion is verified by judging whether the error value is greater than an error threshold value, the process layer network digital development process of the intelligent station is conformed, the test method is improved by fully considering the process layer network data transmission form, and the test efficiency is improved.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a first flowchart of a clock synchronization system testing method at an intelligent substation process level;
FIG. 2 is a second flowchart of a method for testing a clock synchronization system at the process level of an intelligent substation;
fig. 3 is a diagram of a clock synchronization system testing device at the process level of an intelligent substation.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the embodiments described below are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a method for testing a clock synchronization system of an intelligent substation process layer, which is used for solving the problem that the traditional testing method is difficult to meet the testing requirement due to digitization and networking of an intelligent substation in the prior art.
Referring to fig. 1, fig. 1 is a first flowchart of a method for testing a clock synchronization system of an intelligent substation process layer according to an embodiment of the present invention.
S100, acquiring network port parameters of a switch connected with a microcomputer monitoring system and a clock synchronization system, and calculating message information flow required to be generated by background flow with preset proportion under the network port parameters of the switch; constructing background flow of preset proportion by sending corresponding message information flow to a network port of a switch;
it should be noted that the background flow is a flow in which data is irrelevant to a time synchronization message when the switch performs switching, and by constructing the background flow in the switch network port, network congestion which may occur at the switch network port when the intelligent substation processes information data peak is simulated, so that the transmission of the time synchronization message between the microcomputer monitoring system and the clock synchronization system is interfered;
reading parameters or models of the switch ports by accessing a process layer switch network, obtaining the transmission rate of the corresponding switch port according to the models and the parameters, wherein the message information flow required to be generated under the background flow ratio is the product of the background flow ratio and the transmission rate, the background flow ratio is 20%, 50% or 100%, and can be set according to the actual test requirement; for example, the transmission rate of the network port of the switch is 100Mbps, the message information flow required to be generated under the condition of 50% of background flow is 50Mbps, namely, the message information is required to be sent to the network port of the switch at 50Mbps to simulate the network congestion with the 50% of background flow;
s200, setting a first duration for acquiring the time signals, acquiring the time signals of the microcomputer monitoring system and the clock synchronization system in real time within the first duration, and calculating an error value between the time signals of the two systems; and judging whether the error value is larger than or equal to an error threshold value, if so, the clock synchronization system fails to test.
It should be noted that, by connecting with the microcomputer monitoring system and the clock synchronization system at the same Time, the SNTP (Simple Network Time Protocol) Time signals of the microcomputer monitoring system and the clock synchronization system collected at the same Time are subtracted to obtain an error value between the Time signals. The clock synchronization system is synchronized with the time signal of the GPS or beidou standard clock source, so in a specific implementation scheme, the time signal of the GPS or beidou standard clock source can be obtained to replace the time signal of the clock synchronization system to calculate an error value.
When the background flow is constructed to form network congestion, according to an error value between time signal time signals of the microcomputer monitoring system and the clock synchronization system, if the error value is larger than or equal to an error threshold value at a certain moment, it can be judged that the clock synchronization system is greatly influenced by the background flow, abnormal time setting can be caused when the network congestion occurs, and the test cannot be carried out through the clock synchronization system. In practical implementation, the first duration may be set to 5min, the error threshold may be set to 1us, and the specific first duration and the error threshold may be set according to test requirements.
In the embodiment, the background flow is constructed by sending the message information corresponding to the flow by the network port parameter of the switch, so that network congestion is formed in an intelligent substation in the signal transmission process, time signals of a microcomputer monitoring system and a clock synchronization system are obtained in real time, an error value between the time signals of the two systems is calculated, the reliability of the clock synchronization system in time synchronization under the condition of network congestion is verified by judging whether the error value is greater than an error threshold value, the process layer network digital development process of the intelligent station is conformed, the process layer network data transmission mode is fully considered to improve the test method, and the test efficiency is improved.
The above is a detailed description of a first embodiment of a method for testing a clock synchronization system of an intelligent substation process layer provided by the present application, and the following is a detailed description of a second embodiment of a method for testing a clock synchronization system of an intelligent substation process layer provided by the present application.
In this embodiment, a specific embodiment of a method for testing a clock synchronization system of an intelligent substation process layer is further provided, please refer to fig. 2, and steps S300-S700 are specifically included after step S200, and the details are as follows:
s300, disconnecting the GPS or Beidou standard clock source from the clock synchronization system; setting a second duration for acquiring the time signal, acquiring the time signal of the GPS or Beidou standard clock source within the second duration, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails;
it should be noted that, by manually pulling out the GPS or beidou standard clock source or blocking off the GPS or beidou standard clock source from the clock synchronization system, the clock synchronization system is in a condition of losing the synchronization condition, so as to determine whether the time synchronization effect of the clock synchronization system can meet the performance requirement, and it can be understood that in an emergency situation where the satellite signal is lost or the use of the american GPS system is limited, the accuracy of the time synchronization performance of the clock synchronization system can ensure the reliable operation of the intelligent substation. In practical implementation, the second duration may be set to 5min, the error threshold may be set to 1us, and the specific duration and the error threshold may be set according to test requirements and recorded through an error value curve.
S400, accessing a clock synchronization system to a GPS or Beidou standard clock source, and enabling the clock synchronization system to enter a GPS or Beidou signal locking state; setting a third duration for acquiring the time signal, calculating an error value between a GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time within the third duration, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails;
it should be noted that, after the clock synchronization system enters a GPS or beidou signal locking state, the time of the clock synchronization system can be synchronized with the time of a GPS or beidou standard clock source in real time to realize follow-up locking; and testing whether the time of the clock synchronization system can accurately output the time of the GPS or Beidou standard clock source by judging the error value in the duration time by using the error threshold value, so as to realize accurate time synchronization. In practical implementation, the third duration may be set to 5min, the error threshold may be set to 1us, and the specific duration and the error threshold may be set according to test requirements and recorded through an error value curve.
S500, connecting a clock synchronization system to a GPS or Beidou standard clock source, keeping the clock synchronization system in a GPS or Beidou signal locking state for a first preset time, and disconnecting the clock synchronization system from the GPS or Beidou standard clock source; after second preset time, calculating an error value between the GPS or Beidou standard clock source and a time signal of the clock synchronization system, and if the error value is greater than or equal to a timekeeping threshold value, the clock synchronization system does not pass the test;
it should be noted that, after the clock synchronization system is kept in the GPS or beidou signal locking state for the first preset time, it is ensured that the clock synchronization system performs stable clock synchronization, the connection between the clock synchronization system and the GPS or beidou standard clock source is disconnected, at this time, the clock synchronization system enters the time-keeping state after being continuously synchronized with the GPS or beidou signal, and by calculating an error value after the second preset time, it is determined whether the clock synchronization system can perform accurate clock synchronization after the time-keeping state for a period of time, and the following effect of the clock synchronization system on the GPS or beidou standard clock source is verified. In practical implementation, the first preset time may be set to 30min, the second preset time may be set to 120min, and the timekeeping threshold is set to 55us/h, that is, in the timekeeping state, if the cumulative error per hour is greater than or equal to 55us, the test does not pass, and the specific preset time and the specific threshold may be set according to the test requirement.
S600, setting a fourth duration for acquiring the time signal, respectively acquiring the time signals of a master clock and a slave clock in the clock synchronization system in real time within the fourth duration, calculating an error value between the master clock and the slave clock, and judging that the test of the clock synchronization system fails if the error value at a certain moment is greater than or equal to an error threshold;
it should be noted that, in order to ensure the reliability of the time synchronization effect in the clock synchronization system, two clocks, namely a master clock and a slave clock, are respectively set for time synchronization, and when any one clock is damaged, the other clock can be substituted for work, and if an error existing between the master clock and the slave clock exceeds an error threshold, a large error occurs during time synchronization when the master clock and the slave clock are switched, which affects the reliability of the time synchronization; in practical implementation, the fourth duration may be set to 5min, the error threshold may be set to 1us, and the specific duration and the error threshold may be set according to the test requirement and recorded by the error value curve.
Further, the steps S300, S400, S500 and S600 are performed to test the time synchronization error of the clock synchronization system, and under the condition that the overall error of the intelligent substation is considered, an error value between the time signals of the microcomputer monitoring system and the clock synchronization system at the same time and an error value between the time signals of the GPS or beidou standard clock source and the clock synchronization system are obtained, and the two error values are superimposed to obtain an overall error value, and then the judgment is performed by using criteria such as an error threshold value, so as to verify whether the time synchronization error of the clock synchronization system can meet the accuracy requirement in the station control layer integrated operation of the intelligent substation.
Further, configuring the B code time synchronization function of the protection and test device of the spacer layer, and completing the physical connection of the clock synchronization system and the B code time synchronization of the protection and test device of the spacer layer, wherein the background monitoring system of the station control layer adopts SNTP time synchronization; and starting a clock synchronization system, and waiting for 30 minutes after the time tick signal is output to ensure that the GPS time tick is stable. And changing the clocks of the interlayer protection and test device and the background monitoring system every 10 minutes, automatically detecting and acquiring the time of the interlayer protection and test device and the time of the station control layer monitoring system one by using a time synchronization automatic tester, comparing the time with the standard time of the clock synchronization system in real time, calculating the error of the interlayer protection and test device and the station control layer monitoring system, automatically recording the maximum error value, the minimum error value and the average error value, judging that the test is passed if the error is less than 1us, and otherwise, judging that the test is not passed, thereby realizing the B code time synchronization performance test.
In this embodiment, the reliability of the clock synchronization system is further verified by performing an out-of-sync signal test, an output precision test, a timekeeping function test, a master-slave clock test, a B-code performance test, and combining an internal test of the clock synchronization system with a test under background traffic, so that the test requirements are met, and the test normalization is improved.
The above is a detailed description of a second embodiment of the method for testing the clock synchronization system of the process layer of the intelligent substation provided by the present application, and the following is a detailed description of a device for testing the clock synchronization system of the process layer of the intelligent substation provided by the second aspect of the present application.
Referring to fig. 3, fig. 3 is a diagram of a clock synchronization system testing apparatus at an intelligent substation process level. This embodiment provides a clock synchronization system testing arrangement of intelligent substation process layer, includes:
the background flow generation module 10 is used for acquiring the network port parameters of the switch connected with the microcomputer monitoring system and the clock synchronization system and calculating the message information flow required to be generated by the background flow with preset proportion under the network port parameters of the switch; constructing background flow of preset proportion by sending corresponding message information flow to a network port of a switch;
the time signal acquisition and calculation module 20 is used for setting a first duration for acquiring the time signal, acquiring the time signals of the microcomputer monitoring system and the clock synchronization system in real time within the first duration, and calculating an error value between the time signals of the two systems; and judging whether the error value is larger than or equal to an error threshold value, if so, the test of the clock synchronization system fails.
Further, still include: the out-of-synchronization time setting test module 30 is used for disconnecting the connection between the GPS or Beidou standard clock source and the clock synchronization system; and setting a second duration for acquiring the time signal, acquiring the time signal of the GPS or Beidou standard clock source within the second duration, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time, and judging that the test of the clock synchronization system fails if the error value at a certain moment is greater than or equal to an error threshold value.
Further, still include: the time setting precision testing module 40 is used for connecting the clock synchronization system to a GPS or Beidou standard clock source and enabling the clock synchronization system to enter a GPS or Beidou signal locking state; and setting a third duration for acquiring the time signal, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time within the third duration, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails.
The third aspect of the present application further provides a clock synchronization system testing device of an intelligent substation process layer, including a processor and a memory: the memory is used for storing the program codes and transmitting the program codes to the processor; the processor is used for executing the clock synchronization system testing method of the intelligent substation process layer according to instructions in the program codes.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described apparatuses and devices may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk, and various media capable of storing program codes.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A clock synchronization system testing method of an intelligent substation process layer is characterized by comprising the following steps:
acquiring network port parameters of a switch connected with a microcomputer monitoring system and a clock synchronization system, and calculating message information flow required to be generated by preset proportion background flow under the network port parameters of the switch; constructing background flow of preset proportion by sending corresponding message information flow to a network port of a switch;
setting a first duration for acquiring the time signals, acquiring the time signals of the microcomputer monitoring system and the clock synchronization system in real time within the first duration, and calculating an error value between the time signals of the two systems; and judging whether the error value is larger than or equal to an error threshold value, if so, the clock synchronization system fails to test.
2. The method for testing the clock synchronization system of the intelligent substation process layer according to claim 1, further comprising:
disconnecting the GPS or Beidou standard clock source from the clock synchronization system; and setting a second duration for acquiring the time signal, acquiring the time signal of the GPS or Beidou standard clock source within the second duration, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time, and judging that the test of the clock synchronization system fails if the error value at a certain moment is greater than or equal to an error threshold value.
3. The method for testing the clock synchronization system of the intelligent substation process layer according to claim 1, further comprising:
accessing a clock synchronization system to a GPS or Beidou standard clock source, and enabling the clock synchronization system to enter a GPS or Beidou signal locking state; and setting a third duration for acquiring the time signal, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time within the third duration, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails.
4. The method for testing the clock synchronization system of the intelligent substation process layer according to claim 1, further comprising:
connecting a clock synchronization system to a GPS or Beidou standard clock source, keeping the clock synchronization system in a GPS or Beidou signal locking state for a first preset time, and disconnecting the clock synchronization system from the GPS or Beidou standard clock source; and after the second preset time, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system, and if the error value is greater than or equal to the timekeeping threshold, the clock synchronization system fails to test.
5. The method for testing the clock synchronization system of the intelligent substation process layer according to claim 1, further comprising:
and setting a fourth duration for acquiring the time signals, respectively acquiring the time signals of the master clock and the slave clock in the clock synchronization system in real time within the fourth duration, calculating an error value between the master clock and the slave clock, and judging that the test of the clock synchronization system fails if the error value at a certain moment is greater than or equal to an error threshold value.
6. The method for testing the clock synchronization system of the intelligent substation process layer according to claim 2 or 3, further comprising:
obtaining an error value between time signals of a microcomputer monitoring system and a clock synchronization system at the same moment and an error value between time signals of a GPS or Beidou standard clock source and the clock synchronization system, superposing the two error values to obtain an integral error value, judging whether the integral error value is greater than or equal to an error threshold value, and if so, not passing the test of the clock synchronization system.
7. The utility model provides a clock synchronization system testing arrangement on intelligent substation process layer which characterized in that includes:
the background flow generation module is used for acquiring the network port parameters of the switch connected with the microcomputer monitoring system and the clock synchronization system and calculating the message information flow required to be generated by the background flow with the preset proportion under the network port parameters of the switch; constructing background flow of preset proportion by sending corresponding message information flow to a network port of a switch;
the time signal acquisition and calculation module is used for setting a first duration for acquiring the time signals, acquiring the time signals of the microcomputer monitoring system and the clock synchronization system in real time within the first duration, and calculating an error value between the time signals of the two systems; and judging whether the error value is larger than or equal to an error threshold value, if so, the test of the clock synchronization system fails.
8. The device for testing the clock synchronization system of the process level of the intelligent substation of claim 7, further comprising:
the out-of-synchronization time setting test module is used for disconnecting the connection between the GPS or Beidou standard clock source and the clock synchronization system; and setting a second duration for acquiring the time signal, acquiring the time signal of the GPS or Beidou standard clock source within the second duration, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time, and judging that the test of the clock synchronization system fails if the error value at a certain moment is greater than or equal to an error threshold value.
9. The device for testing the clock synchronization system of the process level of the intelligent substation of claim 7, further comprising:
the time setting precision testing module is used for connecting the clock synchronization system to a GPS or Beidou standard clock source and enabling the clock synchronization system to enter a GPS or Beidou signal locking state; and setting a third duration for acquiring the time signal, calculating an error value between the GPS or Beidou standard clock source and the time signal of the clock synchronization system in real time within the third duration, and if the error value at a certain moment is greater than or equal to an error threshold value, judging that the test of the clock synchronization system fails.
10. The utility model provides a clock synchronization system test equipment of intelligent substation process layer which characterized in that, the equipment includes processor and memory:
the memory is used for storing program codes and transmitting the program codes to the processor;
the processor is configured to perform the method of any one of claims 1-6 according to instructions in the program code.
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