CN115980548A - Chip system testing method and device, electronic equipment and storage medium - Google Patents
Chip system testing method and device, electronic equipment and storage medium Download PDFInfo
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Abstract
The embodiment of the application relates to the technical field of production test, and discloses a system test method and device of a chip, electronic equipment and a storage medium, wherein the method comprises the following steps: configuring test information for a chip to be tested, wherein the test information at least comprises a register configuration file and a test item required to be performed; loading and analyzing the register configuration file to generate a test configuration list, and generating a test case according to the test configuration list and the test items; determining each first register corresponding to the test case, and operating each first register through a pre-established standard API corresponding to each first register and configuration parameters of each first register under the test case in the test configuration list so as to execute the test case; the method comprises the steps of calling a preset measuring instrument to measure a chip to be tested, and generating a test result file of the chip to be tested according to the measurement result, so that the system test is advanced in a highly visual mode, labor cost is saved, and development progress and test efficiency of the chip are greatly improved.
Description
Technical Field
The embodiment of the application relates to the technical field of production test, in particular to a system test method and device of a chip, electronic equipment and a storage medium.
Background
After the chip is designed, manufactured and packaged, later-stage product scheme development is performed, as shown in fig. 1, after the chip is packaged, driving debugging is first required to be performed, and it is ensured that each module of the chip can normally work (the first stage in fig. 1). After the driver is debugged, the baseband and rf department may perform function debugging on each module of the chip, including analog debugging, digital/rf debugging, etc. (the second stage in fig. 1). After the baseband and radio frequency departments complete debugging the chip, the system department can perform complete system test on the chip (the third stage in fig. 1), and the process can be continuously and repeatedly performed until the product quality requirement is met. In order to find the problem in advance and speed up the project progress, the system test can be moved forward by directly operating the relevant registers, and the system test is performed in the second stage of fig. 1. Common system test advancement methods include "semi-automated testing using simple tools" and "automated testing using proprietary scripts".
However, when a semi-automatic test is performed using a simple tool, the number of registers to be operated is large, and the number of data to be tested is also large, which consumes a lot of time and effort of a tester. When the special script is used for automatic testing, a corresponding script needs to be developed for each test case, and the script needs to be modified once the parameters change, so that the process is repeated and complicated, and a large amount of labor is consumed.
Disclosure of Invention
An object of the embodiments of the present application is to provide a method and an apparatus for testing a system of a chip, an electronic device, and a storage medium, which can move a system test forward with high visibility, save labor cost, reduce repetitive work, and greatly improve development progress and test efficiency of a chip.
In order to solve the above technical problem, an embodiment of the present application provides a system test method for a chip, including the following steps: configuring test information for a chip to be tested, wherein the test information at least comprises a register configuration file and a test item required to be performed; wherein the configuration process of the test information is visible; loading and analyzing the register configuration file to generate a test configuration list, and generating a test case according to the test configuration list and the test items; the elements in the test configuration list are a configuration list of a register, and the configuration list of the register comprises configuration parameters of the register; determining each first register corresponding to the test case, and operating each first register through a pre-created standard API interface corresponding to each first register and configuration parameters of each first register under the test case in the test configuration list so as to execute the test case; and calling a preset measuring instrument to measure the chip to be tested, and generating a test result file of the chip to be tested according to the measurement result.
An embodiment of the present application further provides a system test apparatus for a chip, including: the device comprises a configuration module, an analysis module, an execution module, a measurement module and a data processing module; the configuration module is used for configuring test information for a chip to be tested, the test information at least comprises a register configuration file and a test item required to be carried out, and the configuration process of the test information is visual; the analysis module is used for loading and analyzing the register configuration file, generating a test configuration list, and generating a test case according to the test configuration list and the test items, wherein elements in the test configuration list are configuration lists of registers, and the configuration lists of the registers comprise configuration parameters of the registers; the execution module is configured to determine each first register corresponding to the test case, and operate each first register through a pre-created specification API interface corresponding to each first register and a configuration parameter of each first register under the test case in the test configuration list to execute the test case; the measuring module is used for calling a preset measuring instrument to measure the chip to be tested; the data processing module is used for generating a test result file of the chip to be tested according to the measurement result.
An embodiment of the present application further provides an electronic device, including: at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the system test method of the chip.
Embodiments of the present application further provide a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the computer program implements the system testing method for a chip described above.
The method, the device, the electronic device and the storage medium for testing the system of the chip, provided by the embodiment of the application, are characterized in that test information including a register configuration file and a test item to be performed is configured for the chip to be tested, the configuration process of the test information is visible, then the register configuration file is loaded and analyzed, a test configuration list is generated, a test case is generated according to the test configuration list and the test item, elements in the test configuration list are the configuration list of the registers, the configuration list of the registers comprises configuration parameters of the registers, each first register corresponding to the test case is determined immediately, each first register is operated through a pre-established standard API interface corresponding to each first register and the configuration parameters of each first register under the test case in the test configuration list, the test case is executed, finally, a preset measuring instrument is called to measure the chip to be tested, and a test result file of the chip to be tested is generated according to the measurement result. In consideration of the fact that a system test forwarding method which is universal in the industry is repeated and tedious, and a lot of time and energy of a tester can be consumed, in the embodiment of the application, the tester can visually and flexibly configure different register parameters and register combinations, and calls each register through a standard API (application program interface), so that the requirements of different test cases can be met, a test script does not need to be modified for each test case, the whole test process is highly automatic, the tester only needs to perform initial configuration and monitoring of the test process, the labor cost is saved, the repetitive work is reduced, and the development progress and the test efficiency of a chip are greatly improved.
In addition, the register configuration file is configured by: acquiring information files of all registers, and loading and analyzing the information files of all the registers; displaying information of each register through a visual configuration interface, wherein the configuration interface supports selection and editing; acquiring selection and editing information of the configuration interface, and generating the register configuration file according to the selection and editing information; the register configuration file comprises address information, data information, read-write information, addressing range information and information of a pre-created standard API interface of each register, wherein the address information, the data information, the read-write information and the addressing range information are stored in a dictionary form. The information files of the registers are standardized files provided by a chip design department, and a visual interface capable of being selected and edited is generated based on the information files of the registers during system testing, so that testers can flexibly configure the visual interface, system testing is simpler and more convenient from the source, and system testing efficiency and chip development efficiency are improved.
In addition, the pre-created specification API interface is defined with an operation code, an address, an addressing range, a value and a return value; the operation code is READ or WRITE, the READ represents READ operation, and the WRITE represents WRITE operation; the address is the address of a register corresponding to the specification API; the addressing range is a configurable range of a register corresponding to the specification API; the value is the current value of a register corresponding to the specification API interface; the return value comprises a function execution result, the quantity of the reported data and the reported data. And standard API interfaces are created in advance, and the API interfaces corresponding to the registers are the same in form, so that the maintenance and development of testers are facilitated, and the redundant workload is greatly reduced.
In addition, the number of the test cases is several, and the executing the test cases comprises: traversing and executing a plurality of test cases according to the sequence of the test cases; the method for calling a preset measuring instrument to measure the chip to be tested and generating a test result file of the chip to be tested according to the measurement result comprises the following steps: if the current test case fails to be executed, skipping the current test case and directly executing the next test case of the current test case; if the current test case is successfully executed, calling a preset measuring instrument to measure the chip to be tested; and after traversing the plurality of test cases, generating a test result file of the chip to be tested according to the measurement result of the test case which is successfully executed. When the number of the test cases is a plurality, the test cases are required to be executed in sequence, a test result file of the chip to be tested is generated, the system test result is output once, and a tester can analyze the system test condition of the chip on the whole conveniently, so that the problem of positioning the chip more efficiently and more comprehensively is solved, and the delivery quality of the chip is improved.
In addition, before configuring the test information for the chip to be tested, the method further comprises: designing a plurality of interface classes according to the types of measuring instruments required to be used for the system test; each type of measuring instrument corresponds to one interface type; determining a target interface class in the plurality of interface classes according to the type of the preset measuring instrument; generating a target instrument interface corresponding to the preset measuring instrument according to the manufacturer of the preset measuring instrument and the target interface class; the method for testing the chip to be tested comprises the following steps of calling a preset measuring instrument to measure the chip to be tested: and calling the preset measuring instrument to measure the chip to be tested through the target instrument interface. Considering that a plurality of manufacturers of measuring instruments exist, and the operating methods and control instructions of the measuring instruments produced by different manufacturers are different, so that the instrument interface of one manufacturer is incompatible with the measuring instrument of another manufacturer.
In addition, the method further comprises: and acquiring preset key information in the system testing process, and storing and outputting the preset key information in the system testing process in a log file form. And the log printing is carried out on the key information in the system testing process in real time, so that the whole testing process is conveniently monitored by testing personnel, and possible problems in the system testing process are quickly and effectively positioned.
Drawings
One or more embodiments are illustrated by the corresponding figures in the drawings, which are not meant to be limiting.
FIG. 1 is a flowchart of a process for performing a later product scenario development after a chip is designed, manufactured, and packaged;
FIG. 2 is a first flowchart of a system test method for a chip according to an embodiment of the present disclosure;
FIG. 3 is a flow diagram of configuring a register configuration file in one embodiment of the present application;
FIG. 4 is a schematic illustration of a visual configuration interface provided in one embodiment of the present application;
FIG. 5 is a flow chart of configuring an interface for a predetermined measurement instrument in an embodiment of the present application;
FIG. 6 is a first schematic diagram of a system test apparatus for chips according to another embodiment of the present application;
FIG. 7 is a second schematic diagram of a system test apparatus for chips according to another embodiment of the present application;
fig. 8 is a schematic structural diagram of an electronic device according to another embodiment of the present application.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that in the examples of the present application, numerous technical details are set forth in order to provide a better understanding of the present application. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments. The following embodiments are divided for convenience of description, and should not constitute any limitation to the specific implementation manner of the present application, and the embodiments may be mutually incorporated and referred to without contradiction.
Semi-automatic testing using simple tools is a common system test forwarding method, i.e. using simple tools to operate chip-related registers, such as using a spectrum analyzer, a signal source, a precision power supply, etc. to perform manual measurement, record data, and perform sorting analysis on the recorded data. And debugging, optimizing circuits in the chip, adjusting circuit matching, modifying software of the chip and the like are carried out on the analysis result.
However, when a simple tool is used for semi-automatic testing, the number of registers to be operated is large, the number of data to be tested is also large, for a tester, each test case needs to inquire the configuration tables of all relevant registers, record data and operate, the workload is huge, and a great amount of time and energy are consumed by the tester.
The automatic test by using the special script is another common system test forward moving method, namely, the development is carried out by using a script language python, so that the abundant personalized requirements can be met.
However, when the dedicated script is used for automatic testing, a corresponding script needs to be developed for each test case, different scripts are also needed for different register combinations, a large number of scripts are generated, maintenance is difficult, management is inconvenient, a new script needs to be developed for a new product, and once parameters change, the script needs to be modified, so that the process is repeated and tedious, and a large amount of labor is consumed.
In order to solve the problems of repetition and complexity and large labor consumption in the system test forward movement scheme, an embodiment of the present application provides a system test method for a chip, which is applied to an electronic device, wherein the electronic device may be a terminal or a server, and the electronic device in this embodiment and the following embodiments is described by taking the server as an example. The following describes implementation details of the system testing method for a chip according to the present embodiment in detail, and the following description is only provided for easy understanding and is not necessary to implement the present embodiment.
The specific process of the system testing method of the chip of the embodiment may be as shown in fig. 2, and includes:
In a specific implementation, when a system test is performed on a chip, a server configures test information for the chip to be tested, where the test information at least includes a register configuration file and a test item to be performed. The test items to be performed can be selected and set by a tester according to actual needs, and the configuration process of the test information is visual, that is, the tester can configure the test information for the chip to be tested through a visual UI.
In some examples, the test information configured for the chip to be tested further includes communication parameters and frequency points to be scanned.
In some examples, test information is configured for the chip to be tested, and a subsequent system test process is developed by adopting a PYQT language, wherein the PYQT language has the advantages of QT interface development and Python data processing.
In some examples, the register configuration file is saved in the form of a jason file.
And 102, loading and analyzing the register configuration file, generating a test configuration list, and generating a test case according to the test configuration list and the test items.
In a specific implementation, after the server configures test information for a chip to be tested, the server may load and analyze a register configuration file in the test information to generate a test configuration list, where an element in the test configuration list is a configuration list of each register, the configuration list of each register includes configuration parameters of a corresponding register, that is, data of each register is stored in a list form, and all registers form a large test configuration list. The number of the test cases can be several, one test case can contain several test items, different test cases can contain the same test item, and parameters of the same test item contained in different test cases can be different. Considering that the configuration registers have precedence requirements, the list form of sequential execution can just meet the requirement friendly.
In some examples, the register configuration file is a jason file, and the configuration information of each register in the jason file exists in the form of a dictionary, and includes address information, data information, read-write information, addressing range information, API interface information and the like of the register.
In a specific implementation, after the server generates the test case, the server may determine each first register corresponding to the test case, where the first register is a register that needs to be operated in the test case, and operate each first register through a pre-created specification API interface corresponding to each first register and a configuration parameter of each first register under the test case in the test configuration list, so as to execute the test case.
In some examples, since the test case is dynamic, the parameters of each first register may also be dynamic, and thus a recursive call may be used in executing the function.
In some examples, the pre-created specification API interface is defined with an opcode, an address, an addressing realm, a value, and a return value. The operation code is READ or WRITE, the READ represents READ operation, the WRITE represents WRITE operation, or 0 represents READ operation, and 1 represents WRITE operation; the address is the address of a register corresponding to the standard API interface; the addressing range is a configurable range of a register corresponding to the standard API; the value is the current value of the register corresponding to the standard API interface; the return value comprises a function execution result, the quantity of the reported data and the reported data. The standard API interface can be established before test information is configured for the chip to be tested, the server establishes the standard API interface in advance, the API interfaces corresponding to the registers are identical in form, maintenance and development of testers are facilitated, and redundant workload is greatly reduced.
In some examples, the canonical API interface mainly includes two interfaces, i.e., a read interface and a write interface, and the other interfaces may be extended based on the read interface and the write interface, and the canonical API interface may adopt a format of the AT command. The canonical API interface may be defined as: "AT + REG = opcode, address, addressing range, value, return value". The operation code may be in an enumeration form or a character string form, and the character string form convenient for code reading is adopted in this embodiment; the addressing range is two values, which are high-bit and low-bit respectively, namely, the addressing of the register is a range, and all values in the range need to be traversed; the return value comprises the function execution result, the number of reported data and the reported data, and is separated by commas or semicolons.
And 104, calling a preset measuring instrument to measure the chip to be tested, and generating a test result file of the chip to be tested according to the measurement result.
In specific implementation, after executing a test case, the server may call a preset measurement instrument to measure the chip to be tested, and generate a test result file of the chip to be tested according to the measurement result, where the format of the test result file is in a csv format or an excel format, which is convenient for analysis and data processing, and after generating the test result file of the chip to be tested, the server may also synchronously upload the test result file to a preset database. The preset measuring instrument can be selected and set by even testing personnel according to the actual requirements of system testing.
In some examples, the predetermined measurement instruments include a power supply, a signal source, a spectrum analyzer, a comprehensive measurement instrument, an incubator, a precision power supply lamp, and the like.
In some examples, the server may further obtain key information preset in the system test process, and store and output the key information preset in the system test process in the form of a log file. The method and the system have the advantages that log printing is carried out on key information in the system testing process in real time, so that a tester can conveniently monitor the whole testing process, and possible problems in the system testing process can be quickly and effectively positioned. The log printing of the function adopts an adapter mode.
In some examples, the number of the test cases is several, the server may execute the test cases in a traversal manner according to the sequence of the test cases, and if the current test case fails to be executed, the current test case is skipped, and a next test case of the current test case is directly executed; if the current test case is successfully executed, calling a preset measuring instrument to measure the chip to be tested; and after traversing the plurality of test cases, the server generates a test result file of the chip to be tested according to the measurement result of the test case which is successfully executed. The system test result is output once, so that a tester can analyze the system test condition of the chip integrally, the chip is positioned more efficiently and comprehensively, and the delivery quality of the chip is improved.
In this embodiment, test information including a register configuration file and a test item to be performed is configured for a chip to be tested, a configuration process of the test information is visible, then the register configuration file is loaded and analyzed, a test configuration list is generated, a test case is generated according to the test configuration list and the test item, elements in the test configuration list are a configuration list of registers, the configuration list of registers includes configuration parameters of the registers, each first register corresponding to the test case is determined immediately, each first register is operated through a pre-established standard API interface corresponding to each first register and the configuration parameters of each first register under the test case in the test configuration list, so as to execute the test case, finally, a preset measuring instrument is called to measure the chip to be tested, and a test result file of the chip to be tested is generated according to a measurement result. In consideration of the fact that a universal system test forwarding method in the industry is repeated and tedious, and a large amount of time and energy of a tester can be consumed, in the embodiment of the application, the tester can visually and flexibly configure different register parameters and register combinations, and calls each register through a standard API (application programming interface), so that the requirements of different test cases can be met, a test script does not need to be modified for each test case, meanwhile, the whole test process is highly automatic, the tester only needs to perform initial configuration and monitoring of the test process, the labor cost is saved, the repetitive work is reduced, and the development progress and the test efficiency of a chip are greatly improved.
In an embodiment, the register configuration file in the test information may be configured by the server through the steps shown in fig. 3, which specifically includes:
In a specific implementation, when the server configures the register configuration file, the server first obtains the information file of each register, and then loads and analyzes the information file of each register. The information file of each register is a standardized file provided by the chip design division (ASCI division), i.e. the register configuration file is provided in a agreed file format.
In a specific implementation, after the server loads and parses the information file of each register, the information of each register may be displayed in a form of a list dialog box through a visual configuration interface, which may be as shown in fig. 4 and supports selection and editing, and a tester may select a register on the configuration interface by himself or herself and modify the value of the relevant parameter of the register through editing. When the system test is carried out, a visual interface capable of being selected and edited is generated based on the information files of the registers, so that the system test is configured flexibly by testers, the system test is simpler and more convenient from the source, and the system test efficiency and the chip development efficiency are improved.
In specific implementation, a server acquires selection and editing information of a tester on a configuration interface in real time, and generates a register configuration file according to the selection and editing information, wherein the register configuration file comprises address information, data information, read-write information, addressing range information and information of a pre-created standard API interface of each register, which are stored in a dictionary form.
In some examples, the code implemented for the register configuration file is as follows:
list format:
general list: [ register 1, register 2, register 3, … … register N ]
A register N: [ parameter 1, parameter 2, parameter 3, … … parameter N ] ".
In an embodiment, before configuring test information for a chip to be tested, a server may configure an interface for a preset measurement instrument through the steps shown in fig. 5, which specifically includes:
And 303, generating a target instrument interface corresponding to the preset measuring instrument according to the manufacturer of the preset measuring instrument and the target interface class.
In specific implementation, the server may design a plurality of interface classes according to the types of the measuring instruments to be used in the system test, each type of measuring instrument corresponds to one interface class, then determine a target interface class in the plurality of interface classes according to the type of the preset measuring instrument, and then generate a target instrument interface corresponding to the preset measuring instrument according to the manufacturer and the target interface class of the preset measuring instrument. Considering that a plurality of manufacturers of measuring instruments exist, the operating methods and program-controlled SCPI instructions of the measuring instruments produced by different manufacturers are different, so that the instrument interface of one manufacturer is incompatible with the measuring instrument of another manufacturer, and the design interface classes can be compatible with the measuring instrument.
In some examples, the interface class implementation code is as follows:
the steps of the above methods are divided for clarity, and the implementation may be combined into one step or split some steps, and the steps are divided into multiple steps, so long as the same logical relationship is included, which are all within the protection scope of the present patent; it is within the scope of the patent to add insignificant modifications to the algorithms or processes or to introduce insignificant design changes to the core design without changing the algorithms or processes.
Another embodiment of the present application relates to a system test device for a chip, and the following describes implementation details of the system test device for a chip of this embodiment in detail, and the following is only provided for facilitating understanding of the implementation details, and is not necessary for implementing this embodiment, a schematic diagram of the system test device for a chip of this embodiment may be as shown in fig. 6, the system test device for a chip includes a configuration module 42, an analysis module 43, an execution module 44, a measurement module 45, and a data processing module 46, and fig. 6 also shows a chip 41 to be tested.
The configuration module 42 is configured to configure test information for the chip 41 to be tested, where the test information at least includes a register configuration file and a test item to be performed, and a configuration process of the test information is visible.
The analysis module 43 is configured to load and analyze the register configuration file, generate a test configuration list, and generate a test case according to the test configuration list and the test items, where an element in the test configuration list is a configuration list of a register, and the configuration list of the register includes configuration parameters of the register.
The execution module 44 is configured to determine each first register corresponding to the test case, and operate each first register through the pre-created canonical API interface corresponding to each first register and the configuration parameters of each first register under the test case in the test configuration list to execute the test case.
The measuring module 45 is used for calling a preset measuring instrument to measure the chip 41 to be tested.
The data processing module 46 is used for generating a test result file of the chip to be tested according to the measurement result.
In some examples, the system testing apparatus of the chip may be as shown in fig. 7, and the system testing apparatus of the chip further includes a log printing module 47, where the log printing module 47 is configured to obtain key information preset in the system testing process, and store and output the key information preset in the system testing process in the form of a log file.
It should be noted that, all modules involved in this embodiment are logic modules, and in practical application, one logic unit may be one physical unit, may also be a part of one physical unit, and may also be implemented by a combination of multiple physical units. In addition, in order to highlight the innovative part of the present application, a unit that is not so closely related to solving the technical problem proposed by the present application is not introduced in the present embodiment, but this does not indicate that there is no other unit in the present embodiment.
Another embodiment of the present application relates to an electronic device, as shown in fig. 8, including: at least one processor 501; and a memory 502 communicatively coupled to the at least one processor 501; the memory 602 stores instructions executable by the at least one processor 501, and the instructions are executed by the at least one processor 501, so that the at least one processor 501 can execute the system test method of the chip in the above embodiments.
Where the memory and processor are connected by a bus, the bus may comprise any number of interconnected buses and bridges, the buses connecting together one or more of the various circuits of the processor and the memory. The bus may also connect various other circuits such as peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, will not be described any further herein. A bus interface provides an interface between the bus and the transceiver. The transceiver may be one element or a plurality of elements, such as a plurality of receivers and transmitters, providing a means for communicating with various other apparatus over a transmission medium. The data processed by the processor is transmitted over a wireless medium through an antenna, which further receives the data and transmits the data to the processor.
The processor is responsible for managing the bus and general processing and may also provide various functions including timing, peripheral interfaces, voltage regulation, power management, and other control functions. While the memory may be used to store data used by the processor in performing operations.
Another embodiment of the present application relates to a computer-readable storage medium storing a computer program. The computer program realizes the above-described method embodiments when executed by a processor.
That is, as can be understood by those skilled in the art, all or part of the steps in the method for implementing the embodiments described above may be implemented by a program instructing related hardware, where the program is stored in a storage medium and includes several instructions to enable a device (which may be a single chip, a chip, or the like) or a processor (processor) to execute all or part of the steps of the method described in the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the present application, and that various changes in form and details may be made therein without departing from the spirit and scope of the present application in practice.
Claims (10)
1. A system test method of a chip is characterized by comprising the following steps:
configuring test information for a chip to be tested, wherein the test information at least comprises a register configuration file and a test item required to be performed; wherein the configuration process of the test information is visible;
loading and analyzing the register configuration file to generate a test configuration list, and generating a test case according to the test configuration list and the test items; the elements in the test configuration list are a configuration list of a register, and the configuration list of the register comprises configuration parameters of the register;
determining each first register corresponding to the test case, and operating each first register through a pre-created standard API interface corresponding to each first register and configuration parameters of each first register under the test case in the test configuration list so as to execute the test case;
and calling a preset measuring instrument to measure the chip to be tested, and generating a test result file of the chip to be tested according to the measurement result.
2. The method for system testing of chips of claim 1, wherein said register configuration file is configured by the steps of:
acquiring an information file of each register, and loading and analyzing the information file of each register;
displaying the information of each register through a visual configuration interface, wherein the configuration interface supports selection and editing;
acquiring selection and editing information of the configuration interface, and generating the register configuration file according to the selection and editing information; the register configuration file comprises address information, data information, read-write information, addressing range information and information of a pre-created standard API interface of each register, wherein the address information, the data information, the read-write information and the addressing range information are stored in a dictionary form.
3. The system test method of chip according to claim 2, wherein the pre-created specification API interface is defined with an operation code, an address, an addressing range, a value, a return value;
the operation code is READ or WRITE, the READ represents READ operation, and the WRITE represents WRITE operation;
the address is the address of a register corresponding to the standard API interface;
the addressing range is a configurable range of a register corresponding to the specification API;
the value is the current value of a register corresponding to the standard API interface;
the return value comprises a function execution result, the quantity of the reported data and the reported data.
4. The method for system testing of chips of any of claims 1 to 3, wherein the number of test cases is several, and the executing of the test cases comprises:
traversing and executing a plurality of test cases according to the sequence of the test cases;
the method for calling a preset measuring instrument to measure the chip to be tested and generating a test result file of the chip to be tested according to the measurement result comprises the following steps:
if the current test case fails to be executed, skipping the current test case and directly executing the next test case of the current test case;
if the current test case is successfully executed, calling a preset measuring instrument to measure the chip to be tested;
and after traversing the plurality of test cases, generating a test result file of the chip to be tested according to the measurement result of the test case which is successfully executed.
5. The method for system testing of chips according to any of claims 1 to 3, further comprising, before configuring test information for the chip to be tested:
designing a plurality of interface classes according to the types of measuring instruments required to be used for the system test; each type of measuring instrument corresponds to one interface type;
determining a target interface class in the plurality of interface classes according to the type of the preset measuring instrument;
generating a target instrument interface corresponding to the preset measuring instrument according to the manufacturer of the preset measuring instrument and the target interface class;
the method for testing the chip to be tested by calling the preset measuring instrument specifically comprises the following steps:
and calling the preset measuring instrument to measure the chip to be tested through the target instrument interface.
6. The method for system testing of chips of any of claims 1 to 3, wherein the method further comprises:
and acquiring preset key information in the system testing process, and storing and outputting the preset key information in the system testing process in a log file form.
7. A system test apparatus for a chip, comprising: the device comprises a configuration module, an analysis module, an execution module, a measurement module and a data processing module;
the configuration module is used for configuring test information for a chip to be tested, the test information at least comprises a register configuration file and a test item required to be carried out, and the configuration process of the test information is visual;
the analysis module is used for loading and analyzing the register configuration file to generate a test configuration list, and generating a test case according to the test configuration list and the test items, wherein elements in the test configuration list are configuration lists of registers, and the configuration lists of the registers comprise configuration parameters of the registers;
the execution module is configured to determine each first register corresponding to the test case, and operate each first register through a pre-created specification API interface corresponding to each first register and a configuration parameter of each first register under the test case in the test configuration list to execute the test case;
the measuring module is used for calling a preset measuring instrument to measure the chip to be tested;
the data processing module is used for generating a test result file of the chip to be tested according to the measurement result.
8. The system test apparatus for chips of claim 7, further comprising a log printing module;
the log printing module is used for acquiring preset key information in the system testing process, and storing and outputting the preset key information in the system testing process in a log file form.
9. An electronic device, comprising:
at least one processor; and (c) a second step of,
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform a method of system testing of a chip according to any one of claims 1 to 6.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, implements a method for system testing of a chip according to any one of claims 1 to 6.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117192343A (en) * | 2023-11-08 | 2023-12-08 | 珠海芯业测控有限公司 | Chip testing method based on auxiliary system, electronic equipment and medium |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117192343A (en) * | 2023-11-08 | 2023-12-08 | 珠海芯业测控有限公司 | Chip testing method based on auxiliary system, electronic equipment and medium |
| CN117192343B (en) * | 2023-11-08 | 2024-01-23 | 珠海芯业测控有限公司 | Chip testing method based on auxiliary system, electronic equipment and medium |
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