CN115950562A - High-resolution and nanoscale pixel pressure piezoelectric memory system and preparation method thereof - Google Patents
High-resolution and nanoscale pixel pressure piezoelectric memory system and preparation method thereof Download PDFInfo
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Abstract
The invention belongs to the technical field of nano-scale nerve morphology touch sensors, and relates to a high-resolution and nano-scale pixel pressure piezoelectric memory system and a preparation method thereof. According to the invention, the intelligent piezoelectric memory pixel array based on the piezoelectric nanowire array and the resistance memristor is integrated, so that a pressure piezoelectric memory system for simulating human nervous form tactile behaviors is realized, the piezoelectric memory pixel array is connected with the piezoelectric nanowires and the resistance memory resistance element in series to complete the composition of the piezoelectric memory pixel array, and the pressure piezoelectric memory system can normally operate.
Description
Technical Field
The invention belongs to the technical field of nano-scale nerve form touch sensors, and relates to a high-resolution and nano-scale pixel pressure piezoelectric memory system (HPPMS) and a preparation method thereof, which can be used as a nerve form touch sensor with nonvolatile force resistance conversion and force adjustable synapse functions.
Background
In the field of sensors, pressure sensors based on piezoelectric nanowires, two-dimensional materials and organic materials have been widely applied to electronic skin devices such as bionic electromechanical synthesis, auxiliary medical devices and neural network systems. On the one hand, however, the existing pressure sensor generally has the problems of simplified functions, that is, contact force information can only be detected through simple conversion, and complex data result processing cannot be further performed, the existing patent in the aspect of pressure sensor can complete signal conversion through applying external force, but cannot store information for a long time so as to facilitate subsequent further feedback, and the existing patent in the aspect of electronic skin sensor requires long recognition period in information storage processing, has low processing efficiency, and is difficult to conveniently process background noise signal interference; on the other hand, according to the existing research, the materials and design methods of the existing touch sensor are difficult to realize the nanometer resolution, because the nanometer resolution needs to greatly reduce the pixel size, which greatly exceeds the force response limit of the existing thin film technology.
In order to exceed the force response limit of the thin film technology, the development of a nanoscale human skin-imitated artificial touch system provides a new idea for the development and application of bionic electronic devices, and particularly provides a 60-nanometer-pixel electronic skin based on a high-resolution pressure piezoelectric memory system as a neuromorphic touch sensor aiming at scenes such as an artificial limb for copying the function of human skin, an implanted robot with a low resolution requirement and the like. The pressure piezoelectric memory system is composed of a piezoelectric nanowire array for sensing external pressure signals and a resistance memristor array for storing and converting electric signals. According to the system, the piezoelectric nanowires and the resistance memory resistance elements are connected in series to realize the functions of external pressure sensing and signal storage, and meanwhile, a three-dimensional piezoelectric memory pixel matrix constructed in series is used as a functional element to realize the requirement of the size of a nanoscale pixel.
Disclosure of Invention
Aiming at the defects of the existing pressure sensor and solving the problems, the invention provides a sensor of a high-resolution pressure piezoelectric memory system with ultramicro pixel size, which adopts a pressure piezoelectric sensor based on a piezoelectric memory pixel array formed by combining a piezoelectric nanowire and a resistance memristor, uses the piezoelectric nanowire array to detect a sensing signal on the surface to obtain an electric signal, and then uses the resistance memristor to detect the electric signalMoO in resistor 3 The valence state change of the structure and the transfer of Li ions ensure the long-time storage of signals, and finally the piezoelectric memory pixel array is formed to ensure the ultra-precise pixel size and the ultra-high resolution of the sensor.
The technical scheme of the invention is as follows:
a high-resolution nanoscale pixel pressure piezoelectric memory system comprises a substrate, a bottom electrode, a middle layer ZnO positioning layer, a middle layer vertical ZnO nanowire, a middle layer etching photoresist isolation layer and an upper layer MoO, wherein each layer from bottom to top is transparent at the bottom and is provided with an electric insulating material 3 The upper layer is an etching photoresist isolation layer, the top electrode is a transparent insulating protection layer with mechanical property.
The bottom electrode and the top electrode are respectively arranged along an X axis and a Y axis on a horizontal layer; the middle-layer etching photoresist isolation layer and the upper-layer etching photoresist isolation layer need to etch the top of the isolation layer through oxygen reactive ion corrosion, and the middle-layer etching photoresist isolation layer enables the top of the ZnO nanowire to be exposed and MoO 3 The bottom of the structure is connected, and the upper layer is etched with a photoresist isolation layer to make MoO 3 The top of the structure is exposed for connection to a top electrode, which in turn is connected to an electrode for proper operation of the system.
The bottom electrode and the top electrode are made of electrodes with good electrical conductivity, wherein Au and Ag electrodes are active and can be selected as the top electrode, the bottom electrode can be selected from Al, li ions are required to be doped in the Al electrode to contribute to the reaction rate of the system, and the doping amount of the Li ions in the Al is 4-8% of the mass.
The thickness of the bottom electrode is 5-15 nm.
The thickness of the top electrode is 20-40 nm.
The height of the middle layer vertical ZnO nano-wire is 10 nm-100 μm.
The upper layer MoO 3 The thickness of the layer is 20 to 70nm.
The preparation method of the high-resolution nanoscale pixel pressure piezoelectric memory system comprises the following steps:
step (1): preparing a bottom electrode conductive layer
A photoresist film is spin-coated on a substrate having a transparent underlayer and an electrically insulating material (S1818, 4500-5500 rpm, 45-60 seconds), and prebaked at 110-150 ℃ for 1-2 minutes. The designed shape is exposed with a mask aligner and then developed with developer and de-ionized water and cleaned and baked, respectively. And sequentially sputtering the functional layer, namely the bottom electrode conducting layer by adopting a Physical Vapor Deposition (PVD) process, and removing the redundant photoresist and the metal layer by a stripping process.
Step (2): preparation of ZnO nanowire Structure connected to bottom electrode
For piezoelectric nanowires, an array of vertical ZnO nanowires (polarization direction) synthesized vertically upwards on the bottom electrode is fixed in the isolation layer to form a piezoelectric potential to adjust the resistance of the memory layer. The method comprises the following steps: repeating the photoetching process in the step (1) by using the hole mask, depositing a ZnO positioning layer in the layer by using an Atomic Layer Deposition (ALD), and removing the redundant photoconductive tube by using acetone. Reacting THMA (N- [ tris (hydroxymethyl) methyl)]Acrylamide) solution with Zn (NO) 3 ) 2 The solution is mixed to form a hydrothermal solution, wherein THMA is mixed with Zn (NO) 3 ) 2 Is 1:1; and (3) placing the bottom electrode with the middle ZnO positioning layer in an oven, placing a container with openings at the bottom and the top on the bottom electrode, pouring a hydrothermal solution into the container, heating the container in the oven, and self-growing the vertical ZnO nanowire with the fixed polarization direction on the middle ZnO positioning layer by using a solution method. Spin coating the isolation layer film and baking to form a middle layer etched photoresist isolation layer, etching the isolation layer film by oxygen Reactive Ion Etching (RIE) to expose the top of the ZnO nanowire to the MoO on the upper layer 3 The structures are contacted.
And (3): preparation of the Upper MoO layer 3 Layer structure
And depositing the well-arranged MoO3 array as a resistive memristor to establish a resistive function of the memristor array. The method comprises the following steps: repeating the photoetching process in the step (1) by using the hole mask, and depositing the upper MoO layer by adopting a thermal evaporation process under the vacuum condition 3 And removing the redundant photoresist and the metal layer through a stripping process. Spin coating an isolation layer film, and thenLine baking to remove water to form an upper etch resist spacer, reactive Ion Etching (RIE) of the spacer film with oxygen to expose MoO 3 The top of the layer is in contact with the top electrode.
And (4): preparation of MnO layer on top of the MnO 3 Top electrode structure with layer connection
Repeating the photolithography process in step (1) using an aperture mask, sequentially sputtering the top electrode using a Physical Vapor Deposition (PVD) process, and then removing excess photoresist using acetone.
And (5): preparing a top insulating protective layer:
high transparent and flexible top vapor deposition coated films as protective agents are prepared by spin coating and curing. And depositing a top transparent insulating material layer with mechanical properties on the sample as a protective layer by adopting a thermal evaporation process. And finally, preparing the pressure piezoelectric storage system.
The invention has the beneficial effects that:
the invention discloses a high-resolution pressure piezoelectric memory system with an ultramicro pixel size, which is a nerve form touch sensor with nonvolatile force-resistance conversion and force-adjustable highlighting functions. The method comprises the following specific steps:
1. the ZnO piezoelectric nanowire array is adopted, the state of the array determines the overall performance of the device, and the uniform and neat high-quality array enables the system to have high resolution and high sensitivity, and output voltage signals extruded by periodic machinery are more stable and accurate than other sensors.
2 the piezoelectric memory pixel array, the bottom electrode, the oxide nanowire and the MoO in the invention 3 Layer and top electrode by being compact, independent and uniformThe pixel size of the pressure piezoelectric storage system is below 60 nanometers, and the resolution of the device is above 130 nanometers.
3. In the invention, moO is adopted 3 As a resistance memristor, the switching characteristic of the memristor is more uniform than that of a filiform resistor, and the voltage between the top Li/Al electrode and the bottom electrode can be changed 3 The function of the resistive memristor electrical characteristics. For MoO 3 The higher potential is beneficial to generating more Li ions in the resistive memristor, and the response rate of the sensor is improved.
4. The piezoelectric memory pixel array formed by the invention can control MoO in the piezoelectric memory pixel by adjusting the piezoelectric potential of the ZnO piezoelectric nanowire array 3 Resistance state of the layer (in MoO) 3 A large amount of Li ions are generated in the layer to form LiMoO 3 Has higher reaction speed all the time, and a large amount of Mo 5+ The ions can convert the piezoelectric memory pixels into a low resistance state with low conductivity to achieve an ultra-low damping state (the first 2 min)<9.2%, first 2min<7.1%, 2 months later<2.1%) and reaches a high on-off ratio output of 91.2 and a signal storage time of more than two months.
5. The force excitation piezoelectric memory pixel array has the characteristics of long storage time, high on/off ratio and the like, and shows the advantages of voltage potential in long-time continuity and high-voltage mapping input comparison. And the 6 x 6 pixel array has excellent electrical performance uniformity over a small range of 0.1-1.0nA (after 0 nN) and 9.1 μ a-10.0nA (after 300 nN) at-0.2V readout bias.
6. The pressure piezoelectric memory system preprocessing has the functions of highlighting central characters of letters and smoothing background noise signals, and is suitable for on-chip calculation, so that the processing efficiency is improved by 36.4%, and the image recognition rate is 0.99%.
Drawings
FIG. 1 is an exploded view of a piezoelectric memory system.
FIG. 2 is a graph of current versus voltage for a characteristic of rectifying performed on a curve, in the graph MoO 3 The resistive memristor high-resistance and low-resistance state transition diagrams of the electro-Li ions are arranged in the layer.
FIG. 3 shows MoO under external force 3 The laminated piezoelectric-excitation conversion process is shown schematically. Mo 6+ And Mo 5+ The valence transition process between and the movement of Li ions.
FIG. 4 shows a detailed process of fabricating the piezoelectric memory system.
FIG. 5 (a) is the result diagram of the pressure piezoelectric memory system, FIG. 5 (b) is the electrical connection diagram of the system, FIG. 5 (c) is the simple front view block structure diagram of the pressure piezoelectric memory system, wherein, 1 is a transparent substrate with electrical insulation material at the bottom, 2 is a bottom electrode, 3 is a vertical ZnO nanowire at the middle layer, 8 is a photoresist isolation layer at the middle layer, 4 is an MoO at the upper layer 3 Layer 5, upper etching photoresist isolation layer, top electrode 6, and insulating protection layer with transparent top and mechanical property 7.
FIG. 6 is a different MoO 3 Force-under-thickness, force and reset bias curves typical of current and voltage for piezoelectric memory pixels.
Fig. 7 (a) is a voltage application circuit diagram of a pressure piezoelectric system, and fig. 7 (b) is an output characteristic diagram of different nanowire heights.
FIG. 8 is a three-layer artificial neural network framework based on HPPMS.
FIG. 9 shows the recognition rate difference between different calculation cycles, with the training time increasing, after and without preprocessing using a piezo-electric memory system.
Detailed Description
The invention will be further described with reference to the accompanying drawings, technical solutions and embodiments.
A piezoelectric memory system with high resolution and nanoscale pixel pressure of the present invention, as shown in FIG. 5 (a) -FIG. 5 (c), comprises: a substrate 1 with a transparent bottom layer and an electric insulating material, a bottom electrode 2, a middle layer vertical ZnO nanowire 3 (the bottom is a middle layer ZnO positioning layer), a middle layer etching photoresist isolation layer 8, and an upper layer MoO 3 Layer 4, upper etch photoresist isolation layer 5, top electrode 6, top transparent and mechanical insulating material layer 7.
As shown in FIG. 1, the material and thickness of each layer structure of the system can be selectedThe following were selected: polyethylene terephthalate (PET) as a bottom substrate (30 nm), a bottom electrode (5-15 nm Au), a middle ZnO positioning layer (5 nm), a middle vertical zinc ZnO nanowire (10 nm-100 mu m), a middle SU-8 thin film isolation layer (70 nm) and an upper MoO layer 3 Layer (20-70 nm), upper isolation layer SU-8 thin film (40 nm), top electrode (20-40nm, 4-8% Li-doped aluminum Al), top protective layer polycarbonate thin film (30 nm). The preparation process is shown in figure 4.
The bottom Au electrode and the top Li/Al electrode are vertical to each other on the horizontal layer surface; for the two isolation layers SU8, the SU8 thin film needs to be etched by oxygen Reactive Ion Etching (RIE), so that the top of the ZnO nanowire and the MoO 3 The top is exposed for proper functioning of the system.
The structure of the pressure piezoelectric memory system is shown in figures 5 (a) to 5 (c), and the key point is that the SU8 thin film layer is used for wrapping and isolating, the bottom electrode layer is contacted with the ZnO seed layer, the ZnO seed layer is contacted with the vertical ZnO nanowire, and the top of the vertical ZnO nanowire is contacted with the MoO 3 The bottom of the structure layer is contacted with the top electrode layer finally.
The working principle is as follows:
the method comprises the steps that a resistor-memristor array is superposed on a functional layer of a piezoelectric nanowire array to form an integrated piezoelectric memory pixel array, and in an explosion structure schematic diagram 1 of a pressure piezoelectric memory system, effective components forming the piezoelectric memory array comprise the piezoelectric nanowire array at the bottom and MoO at the top 3 The structure composition is that for the piezoelectric nanowire array, a vertical ZnO nanowire array synthesized on an Au electrode in the vertical and upward direction is fixed on an SU-8 layer to form a piezoelectric potential so as to adjust the resistance of a memory layer.
In fig. 2, an external load force generates free electrons, a piezoelectric point is generated instantly, the piezoelectric nanowire can sensitively convert a force signal into voltage, the resistance memristor is in a High Resistance State (HRS) at the beginning, and after the voltage is changed, the resistance state is changed into a Low Resistance State (LRS). After the voltage is removed, the resistance memristor can still keep a low-resistance state. Conversely, upon application of a reset voltage, the resistive memristor reverts to an initially high resistive state.
Shown in FIG. 3The piezoelectric nanowires generate piezoelectric polarization charges generated by load force in the piezoelectric memristor, and the polarization charges pull Li ions into MoO from a Li/Al electrode at the top 3 A layer. Under the piezoelectric-potential excitation of the Li ions, mo 6+ Into Mo 5+ Realize LinMoO 3 The MoO in the resistance memristor is reduced 3 Conduction of the layers. Therefore, under the action of external force, mo in the resistance memristor 5+ The concentration of ions is increased to make MoO 3 Changes from "off" to "on" and saves the corresponding force signal in the memory system. After the pressure is released, the resistive memristor remains in a low-resistance state continuously, so that the memory system can store the input signal until the reset voltage is applied. Under the action of the reset bias, the Li ions move to the top of the Li/Al electrode. After removal of Li ions, moO 3 Mo ions in the layer consisting of Mo 5+ Conversion to Mo 6+ The resistance memristor is caused to be converted from a low-resistance state to a high-resistance state, and information stored in a memory system is erased.
Some specific examples of the preparation of the pressure piezoelectric memory system are as follows:
example 1:
step (1): structure as bottom electrode
A photoresist film was spin-coated on a polyethylene terephthalate (PET) substrate (S1818,4500 rpm, 60 seconds) and prebaked at 110 ℃ for 1 minute. The designed shape was exposed with a mask aligner, then developed and cleaned with developer and deionized water for 60s and 60s, respectively, and baked at 90 ℃ for 1min. And (3) sequentially sputtering the functional layer, namely the bottom electrode conducting layer (5 nm Au) by adopting a Physical Vapor Deposition (PVD) process, and removing redundant photoresist and metal layers by a stripping process.
Step (2): preparation of nanowire structures connected to bottom electrodes
The photolithography in step (1) was repeated using an aperture mask, and a zinc oxide alignment layer (5 nm) was deposited using Atomic Layer Deposition (ALD), and the excess photo-electric device was removed with acetone. Preparation of 0.05M THMA and 0.05M Zn (NO) 3 ) 2 The one-to-one mixed hydrothermal solution is heated for 2.5h in an oven at 80 ℃ to synthesize the vertical ZnO nanowire (10 nm). Spin coating SU8Baking the thin film (3000rpm for 45 seconds) at 100 ℃ for 2min and baking the thin film for 1h at 300 ℃, and etching the SU8 thin film by oxygen Reactive Ion Etching (RIE) to expose the top of the ZnO nanowire and MoO on the upper layer 3 The structures are in contact.
And (3): preparation of resistance memristor MoO 3 Structure of the product
Repeating the photolithography in step (1) using an aperture mask at 4 × 10 -4 Respectively depositing 20nm MoO by thermal evaporation under Pa vacuum condition 3 Layer, mnO in different thickness 3 Different sensor systems are manufactured by the structure, and then redundant photoresist and metal layers are removed by a stripping process. Spin-coating SU-8 thin film (3000rpm, 45 sec), baking at 100 deg.C for 2min and 250 deg.C for 1.5h, and Reactive Ion Etching (RIE) the SU-8 film with oxygen to expose MoO 3 The top of the layer is in contact with the top electrode.
And (4): preparation and MnO 3 Top electrode structure with layer connection
The photolithography in step (1) was repeated using a hole mask, the top conductive layer was sputtered (20nm, 4% li-doped Al) in sequence using a Physical Vapor Deposition (PVD) process, and then the excess photoresist was removed with acetone.
And (5): preparation of a Top polycarbonate film protective layer
High-transparency and flexible polycarbonate vapour deposition-coated films (30 nm) as protective agents were prepared by spin coating and curing. A 1 μm polycarbonate film was deposited on the sample as a protective layer using a thermal evaporation process. And finally, preparing the pressure piezoelectric storage system.
Example 2:
step (1): structure of bottom electrode as base
A photoresist film was spin-coated on a polyethylene terephthalate (PET) substrate (S1818,5000 rpm, 55 seconds) and prebaked at 130 ℃ for 2 minutes. The designed shapes were exposed using a mask aligner, then developed and cleaned with developer and deionized water for 60s and 60s, respectively, and baked at 100 ℃ for 50s. And (3) sequentially sputtering the functional layer, namely the bottom electrode conducting layer (10 nm Au) by adopting a Physical Vapor Deposition (PVD) process, and removing redundant photoresist and metal layers by a stripping process.
Step (2): preparation of nanowire structures connected to bottom electrodes
The photolithography in step (1) was repeated using an aperture mask, and a zinc oxide alignment layer (5 nm) was deposited using Atomic Layer Deposition (ALD), and the excess photo-electric device was removed with acetone. Preparation of 0.05M THMA and 0.05M Zn (NO) 3 ) 2 Heating the mixed hydrothermal solution in an oven at 100 ℃ for 2h to synthesize the vertical ZnO nanowire (60 nm). Spin coating SU8 thin film (3000rpm 45 s), baking at 100 ℃ for 2min, baking at 300 ℃ for 1h, and etching the SU8 thin film by oxygen Reactive Ion Etching (RIE) to expose the top of the ZnO nanowire and MoO on the upper layer 3 The structures are contacted.
And (3): preparation of resistance memristor MoO 3 Structure of the product
Repeating the photolithography in step (1) using an aperture mask at 3.5 × 10 -4 Respectively depositing 40nm MoO by thermal evaporation under Pa vacuum condition 3 Layer, mnO in different thickness 3 Different sensor systems are manufactured by the structure, and then redundant photoresist and metal layers are removed by a stripping process. Spin-coat SU-8 thin film (3000rpm, 45 sec), bake at 100 ℃ for 2min and 300 ℃ for 1h, perform Reactive Ion Etching (RIE) on the SU-8 film with oxygen to expose MoO 3 The top of the layer is in contact with the top electrode.
And (4): preparation and MnO 3 Top electrode structure with layer connection
Repeating the photolithography in step (1) using a hole mask, sputtering the top conductive layer (30nm, 6% Li-doped Al) in sequence using a Physical Vapor Deposition (PVD) process, and then removing the excess photoresist with acetone.
And (5): preparation of a Top polycarbonate film protective layer
High transparent and flexible polycarbonate vapour deposition coated films (30 nm) as protective agents were prepared by spin coating and curing. A 1 μm polycarbonate film was deposited on the sample as a protective layer using a thermal evaporation process. And finally, preparing the pressure piezoelectric storage system.
Example 3:
step (1): structure of bottom electrode as base
A photoresist film was spin-coated on a polyethylene terephthalate (PET) substrate (S1818,5500 rpm, 50 seconds) and prebaked at 150 ℃ for 2 minutes. The designed shapes were exposed to light using a mask aligner, then developed and cleaned with developer and de-ionized water for 60s and 60s, respectively, and baked at 110 ℃ for 45s. And sequentially sputtering the functional layer, namely the bottom electrode conducting layer (15 nm Ag) by adopting a Physical Vapor Deposition (PVD) process, and removing redundant photoresist and metal layers by a stripping process.
Step (2): preparation of nanowire structures connected to bottom electrodes
The photolithography in step (1) was repeated using an aperture mask, and a zinc oxide alignment layer (5 nm) was deposited using Atomic Layer Deposition (ALD), and the excess photo-electric device was removed with acetone. Preparation of 0.05M THMA and 0.05M Zn (NO) 3 ) 2 The one-to-one mixed hydrothermal solution is heated for 1.5h at 120 ℃ in an oven to synthesize the vertical ZnO nanowire (100 um). Spin coating SU8 thin film (3000rpm for 45 seconds), baking at 100 ℃ for 2min, baking at 350 ℃ for 45min, etching the SU8 thin film by oxygen Reactive Ion Etching (RIE), and exposing the top of the ZnO nanowire to MoO on the upper layer 3 The structures are in contact.
And (3): preparation of resistance memristor MoO 3 Structure of the product
Repeating the photolithography in step (1) using an aperture mask at 4.5 × 10 -4 Respectively depositing 60nm MoO by thermal evaporation under Pa vacuum condition 3 Layer of MnO of different thickness 3 Different sensor systems are manufactured by the structure, and then redundant photoresist and metal layers are removed by a stripping process. Spin-coating SU-8 thin film (3000rpm, 45 sec), baking at 100 deg.C for 2min and 300 deg.C for 1h, and Reactive Ion Etching (RIE) the SU-8 film with oxygen to expose MoO 3 The top of the layer is in contact with the top electrode.
And (4): preparation and MnO 3 Top electrode structure with layer connection
The photolithography in step (1) was repeated using an aperture mask, with the top conductive layer (40nm, 8% li-doped Al) being sputtered in sequence using a Physical Vapor Deposition (PVD) process, and then the excess photoresist was removed with acetone.
And (5): preparation of a Top polycarbonate film protective layer
High transparent and flexible polycarbonate vapour deposition coated films (30 nm) as protective agents were prepared by spin coating and curing. A 1 μm polycarbonate film was deposited on the sample as a protective layer using a thermal evaporation process. And finally, preparing the pressure piezoelectric storage system.
Carrying out comparative analysis result analysis:
FIG. 6 shows MoO with different thicknesses 3 The conditions of force setting and electrical reset in a pixel scanning mode of the piezoelectric storage can be analyzed to obtain MoO with different thicknesses 3 The on/off ratio of the piezoelectric memory pixels is matched to the number of Mo ions per unit thickness from 6+ to 5+ with corresponding differences in on/off ratios. MoO with thickness of 60nm and 70nm in piezoelectric storage pixel 3 The layer is difficult to recover under an external force. For thinner MoO 3 Piezoelectric memory pixel of (2), moO of 20nm 3 (1.4V) MoO with reset bias less than 40nm for piezoelectric memory pixels 3 (1.6V), analysis gave MoO 3 The thicker the structure, wherein Li + The longer the travel length of the ions, the larger the reset bias voltage needs to be, and the sensitivity of the device response decreases.
For different thicknesses of the bottom and top electrodes, the example results show that the thicker the electrode, the higher its energy density, but the faster the energy decay, and the lower the power density; the thicker the electrode is, the higher the impedance of the electrode is, the conduction rate of Li ions in a device is reduced, the high resistance state and the state transition of a pressure piezoelectric system are increased, the response speed and the accuracy of the system are reduced, the thinner the electrode layer is, the better the rate discharge and the cycle of the battery are, but the thinner the electrode layer is, the lower the Li ion capacity can not meet the working requirement, and the proper thickness is selected.
It is illustrated in fig. 7 that different heights of the nanowires may affect the piezoelectric effect of the system, the nanowires have a high height, which may increase the piezoelectric output, the obtained current signals are more obvious, the valence state transition and the high-low resistance state transition are more accurate, if the nanowires have a low height, which may cause the current signals to be less obvious, the system may not sense the current signals, thereby affecting the system operation, and meanwhile, in order to ensure that the whole device is maintained at the nanoscale pixel, a suitable nanowire height may be selected, and the result analysis may result in a higher nanowire height, which may generate a higher voltage signal and a good piezoelectric effect.
The bottom base layer polyethylene terephthalate (PET) material has excellent physical and mechanical properties in a wide temperature range, the long-term use temperature can reach 120 ℃, the electrical insulation property is excellent, even under high temperature and high frequency, the electrical property is still good, but the material generates certain expansion deformation when the temperature is over 150 ℃ during processing, and the spin-coating photoresist and the subsequent deposition process are affected.
Application example:
the pressure piezoelectric system is applied to a 36 × 18 × 3 three-layer artificial neural network, as shown in fig. 8. For a neural network configuration in combination with a pressure piezoelectric memory system, the pressure piezoelectric memory system is directly connected to the input layer in the neural network. During training, force images are demonstrated to the pressure piezo memory system or delivered to the input layer one by one. The corresponding activation function of these hidden and output layers is Sigmoid. Selecting a logic (sigmoid) activation function as a code neuron
Where ε is a scale factor, I n Is the sum of the signals in each pixel; for output neurons
Wherein->
And W n Representing the weight matrix of the decoder, the tuning learning rate is defined to be 0.01. Mean square difference function->
Relating to the difference between the input image and the reconstructed image for corresponding processing.
The haptic system recognition rate with and without the pressure piezo memory system for 4 different simulation run cycles is compared as shown in fig. 9. The background noise is randomly generated during these 4 operating periods. For a force diagram database with a noise background, the recognition rate of the pressure piezoelectric memory system is higher than that of a non-pressure piezoelectric memory system, and the pressure piezoelectric memory system is more stable. The preprocessing training efficiency of the pressure piezoelectric memory system is higher, and the calculation of the pressure piezoelectric memory system has repeatability. On the basis of improving the speed and energy efficiency of classification work, the time required by different recognition accuracies before and after preprocessing of the pressure piezoelectric memory system is extracted from calculation, wherein the energy speed and consumption of each epoch are almost the same when the neural network framework before and after preprocessing of the pressure piezoelectric memory system is calculated, all the processing speeds are opposite to the time under the same accuracy, and all the energy consumption is related to the time. The result of recognition accuracy of 99% obtained by calculating the reinforcement ratio (the reinforcement ratio is the difference between the recognition period without the pressure piezoelectric memory system and the recognition period with the pressure piezoelectric memory system, divided by the recognition period without the pressure piezoelectric memory system) shows that 3871 periods are required for recognition of the force map image without using the pressure piezoelectric memory system, and that 2533 periods are required in total for preprocessing using the pressure piezoelectric memory system array, which is 34.6% less than that when the pressure piezoelectric memory system is not used. Under the same condition of calculation force database, the force image recognition work of the pressure piezoelectric memory system is more effective in speed and energy consumption than the force image recognition work without the pressure piezoelectric memory system.
According to the technical scheme, the high-resolution pressure piezoelectric memory system with the ultramicro pixel size can realize the electric energy conversion of a common pressure piezoelectric sensor, can memorize and store information for a long time, and has a plurality of innovation points, the pressure piezoelectric memory system works together with the piezoelectric nanowires and the resistance memristor, a device reaches the nanoscale pixel size of 60nm, the pressure stability performance of the device for a long time (2 months) is realized to ensure the stability of the stored information, the device can also be used for internal calculation, the processing efficiency and the image recognition rate are improved, the network-based neuromorphic touch system is free from the limitation of a von Neumann calculation framework, and the network-based neuromorphic touch system has a great prospect in the aspect of creating an artificial touch system with effective touch information processing, simplified hardware and low energy consumption.
Claims (4)
1. The high-resolution nanoscale pixel pressure piezoelectric memory system is characterized in that each layer of the high-resolution nanoscale pixel pressure piezoelectric memory system sequentially comprises a substrate which is transparent and is provided with an electric insulating material, a bottom electrode, a middle-layer ZnO positioning layer, a middle-layer vertical ZnO nanowire, a middle-layer etching photoresist isolation layer and an upper-layer MoO from bottom to top 3 The upper layer is etched with a photoresist isolation layer, a top electrode and an insulating protection layer with transparent top and mechanical property;
the bottom electrode and the top electrode are respectively arranged along an X axis and a Y axis on a horizontal layer; the middle-layer etching photoresist isolation layer and the upper-layer etching photoresist isolation layer need to etch the top of the isolation layer through oxygen reactive ion corrosion, and the middle-layer etching photoresist isolation layer enables the top of the ZnO nanowire to be exposed and MoO 3 The bottom of the structure is connected, and the upper layer is etched with a photoresist isolation layer to make MoO 3 The top of the structure is exposed and connected to the top electrode.
2. The piezoelectric memory system as claimed in claim 1, wherein the bottom electrode is made of Au or Ag; the top electrode is made of Al, li is doped in the Al, and the doping amount of Li ions in the Al is 4-8% of the mass.
3. The system according to claim 1 or 2, wherein the thickness of the bottom electrode is 5-15 nm; the thickness of the top electrode is 20-40 nm; the height of the middle layer vertical ZnO nano-wire is 10 nm-100 μm; the upper layer MoO 3 The thickness of the layer is 20 to 70nm.
4. A method of fabricating a high resolution and nanoscale pixel pressure piezoelectric memory system as claimed in any of claims 1 to 3, comprising the steps of:
step (1): preparation of bottom electrode
Spin-coating a photoresist film on a substrate which is transparent and has an electric insulating material as a bottom layer, wherein the spin-coating rotation speed is 4500-5500 rpm, the spin-coating time is 45-60 seconds, and prebaking is carried out for 1-2 minutes at 110-150 ℃; exposing the designed shape by using a mask aligner, and then respectively developing, cleaning and baking by using developing solution and deionized water; carrying out sequential sputtering on the functional layer, namely the bottom electrode, by adopting a physical vapor deposition process, and removing redundant photoresist and a metal layer by a stripping process;
step (2): preparation of ZnO nanowire Structure connected to bottom electrode
Repeating the photoetching process in the step (1) by using a hole mask, depositing a middle ZnO positioning layer by adopting an atomic layer deposition method, and removing redundant photoelectric conduits by using acetone; mixing THMA solution with Zn (NO) 3 ) 2 The solution is mixed to form a hydrothermal solution, wherein THMA is mixed with Zn (NO) 3 ) 2 Is 1:1; placing a bottom electrode with a middle ZnO positioning layer and a middle ZnO positioning layer in an oven, placing a container with openings at the bottom and the top on the bottom electrode, pouring a hydrothermal solution into the container, heating the container in the oven, and self-growing a vertical ZnO nanowire with a fixed polarization direction on the middle ZnO positioning layer by using a solution method; spin coating the isolation layer film and baking to form a middle layer etching photoresist isolation layer, etching the isolation layer film by oxygen reactive ion etching to expose the top of the ZnO nanowire and MoO on the upper layer 3 Contacting the structure;
and (3): preparation of the Upper MoO layer 3 Layer structure
Repeating the photoetching process in the step (1) by using the hole mask, and depositing the upper MoO layer by adopting a thermal evaporation process under the vacuum condition 3 Removing the redundant photoresist and the metal layer through a stripping process; spin coating an isolation layer film, baking to remove water to form an upper etching photoresist isolation layer, and performing reactive ion etching on the isolation layer film with oxygen to expose MoO 3 The top of the layer is in contact with the top electrode;
and (4): preparation of MnO layer on top of the MnO 3 Top electrode of layer connectionPole structure
Repeating the photoetching process in the step (1) by using a hole mask, sputtering the top electrodes in sequence by using a physical vapor deposition process, and then removing the redundant photoresist by using acetone;
and (5): preparing a top insulating protective layer:
and depositing an insulating protective layer which is transparent at the top and has mechanical properties on the sample by adopting a thermal evaporation process.
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