CN115913183A - Method for equalizing input signal to generate equalizer output signal and parameter equalizer - Google Patents
Method for equalizing input signal to generate equalizer output signal and parameter equalizer Download PDFInfo
- Publication number
- CN115913183A CN115913183A CN202110923381.0A CN202110923381A CN115913183A CN 115913183 A CN115913183 A CN 115913183A CN 202110923381 A CN202110923381 A CN 202110923381A CN 115913183 A CN115913183 A CN 115913183A
- Authority
- CN
- China
- Prior art keywords
- signal
- input
- equalizer
- protection
- threshold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
A method for equalizing an input signal to generate an equalizer output signal and a parametric equalizer. The parameter equalizer comprises an equalizer circuit, a first protection circuit, a second protection circuit and a first addition circuit. The equalizer circuit is used for receiving an input signal and processing the input signal to generate an output signal. The first protection circuit is used for generating a first protection signal according to the output signal, the input signal and a first processing signal. The second protection circuit is used for generating a second protection signal according to the input signal and a second processing signal. The first adding circuit is coupled to the first protection circuit and the second protection circuit, and is used for combining the first protection signal and the second protection signal to generate an equalizer output signal.
Description
Technical Field
The present invention relates to frequency response compensation, and more particularly, to a method for equalizing an input signal to generate an equalizer output signal and related parametric equalizer.
Background
A parametric equalizer is an equalizer that can configure parameters, such as center frequency (center frequency) and quality factor (Q), to perform output frequency response modulation on an input signal. By using the parametric equalizer, when the level (level) of the signal input to the parametric equalizer is too large, clipping (clipping) of the signal can be avoided, however, when the level of the signal input to the parametric equalizer is too small, a good hearing effect cannot be achieved by using the fixed gain attenuated parametric equalizer, and therefore, in order to solve the above problem, a method for compensating the output frequency response with respect to the level of the input signal and a related parametric equalizer are needed.
Disclosure of Invention
Therefore, an objective of the present invention is to provide a method for equalizing an input signal to generate an equalizer output signal and a related parametric equalizer, so as to solve the above-mentioned problems.
According to an embodiment of the present invention, a parametric equalizer is disclosed. The parametric equalizer may include an equalizer circuit configured to receive an input signal and process the input signal to generate an output signal, a first protection circuit configured to generate a first protection signal according to the output signal, the input signal, and a first processing signal, wherein a peak level of the first protection signal is protected from exceeding a first threshold used by the first protection circuit, a second protection circuit configured to generate a second protection signal according to the input signal and a second processing signal, wherein the first processing signal relates to generation of the second processing signal, the second processing signal relates to generation of the first processing signal, and a peak level of the first processing signal is protected from exceeding a second threshold used by the second protection circuit, and a first adder circuit coupled to the first protection circuit and the second protection circuit and configured to combine the first protection signal and the second protection signal to generate an equalizer output signal.
According to an embodiment of the present invention, a method for equalizing an input signal to generate an equalizer output signal is disclosed. The method may comprise: receiving an input signal and processing the input signal to generate an output signal; generating a first guard signal according to the output signal, the input signal and a first processing signal, wherein a peak level of the first guard signal is protected from exceeding a first threshold; generating a second protection signal according to the input signal and a second processing signal, wherein the first processing signal relates to the generation of the second processing signal, the second processing signal relates to the generation of the first processing signal, and a peak level of the first processing signal is protected from exceeding a second threshold; and combining the first guard signal with the second guard signal to produce an equalizer output signal.
Drawings
Fig. 1 is a block diagram of a parametric equalizer according to an embodiment of the present invention.
Fig. 2 is a diagram illustrating the parametric equalizer shown in fig. 1 according to an embodiment of the present invention.
Fig. 3 is a diagram illustrating operation of the parametric equalizer of fig. 2 in case 1 according to an embodiment of the present invention.
Fig. 4 is a diagram illustrating operation of the parametric equalizer of fig. 2 in case 2 according to an embodiment of the present invention.
Fig. 5 is a diagram illustrating operation of the parametric equalizer of fig. 2 in case 3 according to an embodiment of the present invention.
FIG. 6 is a diagram illustrating a frequency response obtained by the parametric equalizer of FIG. 2 according to an embodiment of the present invention.
Fig. 7 is a diagram illustrating a parametric equalizer according to another embodiment of the present invention.
Fig. 8 is a flowchart of a method for equalizing an input signal to generate an equalizer output signal according to an embodiment of the invention.
[ notation ] to show
100 200, 700 parameter equalizer
12 22 equalizer circuit
14 Protection circuit 16, 202, 204
18 34 averaging circuit
20 26, 36 adder circuit
A _ IN is an input signal
EQ _ OUT output signal
PROCESS _1 first processed signal
PROCESS _2 second processed signal
PROTECT _1 first protection signal
PROTECT _2 second protection signal
PEQ _ OUT equalizer output signal
TH1 first threshold
TH2 second threshold
AV average value
24 32 subtraction circuit
28 30 automatic gain control circuit
PAD pre-adjust signal
RMS root mean square
702 704 multiplexer
S 1 A first selection signal
S 2 A second selection signal
MUX _ OUT _1 first multiplexer output signal
MUX _ OUT _2 second multiplexer output signal
S50-S64 step
Detailed Description
Fig. 1 is a block diagram of a parametric equalizer 100 according to an embodiment of the present invention. The parametric equalizer 100 may receive an input signal a _ IN, such as an audio signal (audio signal), and equalize the input signal a _ IN to generate an equalizer output signal PEQ _ OUT, as shown IN fig. 1, the parametric equalizer 100 may include an equalizer circuit 12, a plurality of protection circuits 14 and 16, an averaging circuit 18, and a summing circuit 20. The equalizer circuit 12 is operable to receive the input signal a _ IN and process the input signal a _ IN to generate an output signal EQ _ OUT. The protection circuit 14 is configured to generate a first protection signal protection _1 according to the output signal EQ _ OUT, the input signal a _ IN, and a first processing signal PROCESS _1, wherein a peak level (peak level) of the first protection signal protection _1 is protected without exceeding a first threshold TH1 used by the protection circuit 14, for example, the first threshold TH1 may be a user-programmable (user-programmable) parameter. The protection circuit 16 is configured to generate a second protection signal PROCESS _2 according to the input signal a _ IN and a second processing signal PROCESS _2, wherein the first processing signal PROCESS _1 relates to the generation of the second protection signal PROCESS _2, the second processing signal PROCESS _2 relates to the generation of the first protection signal PROCESS _1, and a peak level of the first processing signal PROCESS _1 is protected from exceeding a second threshold TH2 used by the protection circuit 16. The averaging circuit 18 may be configured to generate an average value AV of the input signal a _ IN as the second threshold value TH2 (i.e., TH2= AV), for example, the average value AV may be a root-mean-square (RMS) value of the input signal a _ IN, that is, the second threshold value TH2 is equal to the RMS value of the input signal a _ IN, but the invention is not limited thereto. The adder circuit 20 may be coupled to the protection circuit 14 and the protection circuit 16, and may be configured to combine the first protection signal protection _1 and the second protection signal protection _2 to generate the equalizer output signal PEQ _ OUT (i.e., PEQ _ OUT = protection _1+ protection \\2).
The parametric equalizer 100 can dynamically adjust equalization (equalization) applied to the input signal a _ IN according to the level of the input signal a _ IN, and fig. 2 is a schematic diagram of the parametric equalizer 100 shown IN fig. 1 according to an embodiment of the present invention. The parametric equalizer 100 shown IN fig. 1 can be implemented by a parametric equalizer 200 shown IN fig. 2 (i.e., the parametric equalizer 200 also adopts the architecture of the parametric equalizer 100 shown IN fig. 1), the parametric equalizer 200 can include an equalizer circuit 22, a plurality of protection circuits 202 and 204 (e.g., the plurality of protection circuits 14 and 16 can be implemented by the plurality of protection circuits 202 and 204), an averaging circuit 34, and a summing circuit 36, the equalizer circuit 22 can receive the input signal a _ IN and process the input signal a _ IN to generate the output signal EQ _ OUT.
In the present embodiment, the protection circuit 202 may include a subtracting circuit 24, an adding circuit 26 and an automatic gain control circuit 28. The subtracting circuit 24 is coupled to the equalizer circuit 22 and configured to receive the input signal a _ IN and subtract the input signal a _ IN from the output signal EQ _ OUT to generate a second processing signal processing _2 (i.e., processing _2= EQ _out-a _ IN). The addition circuit 26 may be coupled to the subtraction circuit 24 and the protection circuit 204, and may be configured to combine the first processing signal PROCESS _1 and the second processing signal PROCESS _2 to generate a pre-adjusted (pre-adjusted) signal PAD (i.e., PAD = PROCESS _1+ PROCESS_2). The automatic gain control circuit 28 is coupled to the adder circuit 26 and is configured to generate the first protection signal protection _1 according to the pre-adjustment signal PAD and the first threshold TH1, wherein a peak level of the first protection signal protection _1 is protected from exceeding the first threshold TH1 used by the automatic gain control circuit 28.
The protection circuit 204 may include an automatic gain control circuit 30 and a subtraction circuit 32. The automatic gain control circuit 30 may be coupled to the subtraction circuit 24 and the addition circuit 26, and may be configured to generate the first processing signal processing _1 according to the second processing signal processing _2 and the second threshold TH2, wherein a peak level of the first processing signal processing _1 is protected from exceeding the second threshold TH2 used by the automatic gain control circuit 30. The subtraction circuit 32 may be coupled to the automatic gain control circuit 30 and may be configured to subtract the first processing signal PROCESS _1 from the input signal a _ IN to generate a second protection signal PROCESS _2 (i.e., PROCESS _2= a _in-PROCESS _ 1). The averaging circuit 34 is configured to generate an average value AV of the input signal a _ IN as the second threshold value TH2, wherein the average value AV may be a root mean square value of the input signal a _ IN (i.e. the second threshold value TH2 is equal to the root mean square value of the input signal a _ IN, but the invention is not limited thereto). The adder circuit 36 may be coupled to the protection circuit 202 and the protection circuit 204, and may be configured to combine the first protection signal protection _1 and the second protection signal protection _2 to generate the equalizer output signal PEQ _ OUT.
According to an input level of the input signal a _ IN, a peak level of the output signal EQ _ OUT, and the first threshold TH1, the process of equalizing the input signal a _ IN to generate the equalizer output signal PEQ _ OUT IN the present invention can be divided into 3 cases (e.g., case 1, case 2, and case 3).
Referring to fig. 2 and 3, fig. 3 is a schematic diagram illustrating operation of the parametric equalizer 200 shown in fig. 2 in case 1 according to an embodiment of the invention. IN case 1, the input level of the input signal a _ IN and the peak level of the output signal EQ _ OUT are both less than or equal to the first threshold TH1, for example, the input level of the input signal a _ IN is 1, a peak gain of the equalizer circuit 22 is 30 (i.e., the peak level of the output signal EQ _ OUT is 30), and the first threshold TH1 is set to 50. The automatic gain control circuit 28 is designed to PROTECT the peak level of the first protection signal protection _1 from exceeding the first threshold TH1 and the peak level of the pre-adjustment signal PAD is equal to the peak level of the output signal EQ _ PUT (e.g., the peak level of the pre-adjustment signal PAD is equal to 30), since the peak level of the pre-adjustment signal PAD does not exceed the first threshold TH1, it is not necessary to clamp (clamp) the peak level of the first protection signal protection _1 when the pre-adjustment signal PAD passes through the automatic gain control circuit 28, and thus, the peak level of the first protection signal protection _1 and the peak level of the equalizer output signal PEQ _ OUT are both the same as the peak level of the pre-adjustment signal PAD (e.g., the peak level of the first protection signal protection _1 and the peak level of the equalizer output signal PEQ _ OUT are both equal to 30), and the peak level of the first protection signal protection _1 is greater than the input level of the input signal a _ IN, and by combining the first protection signal protection _1 and the second protection signal protection _2 through the addition circuit 36, the minimum level of the equalizer output signal PEQ _ OUT is equal to the input level of the input signal a _ IN (e.g., the minimum level of the equalizer output signal PEQ _ OUT is equal to 1). For case 1, the parametric equalizer 200 acts as a peaking filter (peaking filter) that provides a boost (boost) around the center frequency (center frequency) without the need for level clamping (level clipping) and with unity gain away from the center frequency.
Referring to fig. 2 and 4, fig. 4 is a schematic diagram illustrating operation of the parametric equalizer 200 shown in fig. 2 in case 2 according to an embodiment of the present invention. IN case 2, the input level of the input signal a _ IN is less than or equal to the first threshold TH1, and the peak level of the output signal EQ _ OUT is greater than the first threshold TH1, for example, the input level of the input signal a _ IN is 30, a peak gain of the equalizer circuit 22 is 30 (i.e., the peak level of the output signal EQ _ OUT is 900), and the first threshold TH1 is set to 50, the peak level of the pre-adjustment signal PAD is equal to the peak level of the output signal EQ _ PUT (e.g., the peak level of the pre-adjustment signal PAD is equal to 900), the automatic gain control circuit 28 aims to PROTECT the peak level of the first protection signal protection _1 from exceeding the first threshold TH1, since the peak level of the pre-adjustment signal PAD exceeds the first threshold TH1, when the pre-adjustment signal PAD passes through the automatic gain control circuit 28, the peak level of the first protection signal protection _1 is limited to the first threshold TH1 (e.g., the peak level of the first protection signal protection _1 is limited to 50), such that the peak level of the equalizer output signal PEQ _ OUT is equal to the peak level of the first protection signal protection _1 (i.e., the peak level of the equalizer output signal PEQ _ OUT is equal to 50), and the clamped peak level of the first protection signal protection _1 is greater than the input level of the input signal a _ IN, such that the minimum level of the equalizer output signal PEQ _ OUT is equal to the input level of the input signal a _ IN (e.g., the minimum level of the equalizer output signal PEQ _ OUT is equal to 30) by combining the first protection signal protection _1 and the second protection signal protection _2 through the adding circuit 36. For case 2, the parametric equalizer 200 acts as a spike filter that provides boosting with level clamping near the center frequency and has unity gain away from the center frequency.
Referring to fig. 2 and 5, fig. 5 is a schematic diagram illustrating operation of the parametric equalizer 200 shown in fig. 2 in case 3 according to an embodiment of the invention. IN case 3, the input level of the input signal a _ IN and the peak level of the output signal EQ _ OUT are both greater than the first threshold TH1, for example, the input level of the input signal a _ IN is 70, a peak gain of the equalizer circuit 22 is 30 (i.e., the peak level of the output signal EQ _ OUT is 2100), and the first threshold TH1 is set to 50, the peak level of the pre-adjustment signal PAD is equal to the peak level of the output signal EQ _ PUT (e.g., the peak level of the pre-adjustment signal PAD is 2100), the automatic gain control circuit 28 aims to PROTECT the peak level of the first protection signal process _1 from exceeding the first threshold TH1, since the peak level of the pre-adjustment signal PAD exceeds the first threshold TH1, the peak level of the first protection signal process _1 is limited to the first threshold TH1 (e.g., the peak level of the first protection signal process _1 is limited to 50) when the pre-adjustment signal PAD passes through the automatic gain control circuit 28, and the peak level of the first protection signal process _1 is limited to be less than the peak level of the input signal input by the input level of the input signal process _ OUT (e.g., the peak level of the input signal input _ OUT is equal to 50), and the peak level of the protection signal output by the peak level of the protection signal OUT is equal to the peak level of the input signal OUT output by the peak level of the input signal process _ OUT circuit 36, for example, the input signal input _ OUT 36). For case 3, the parametric equalizer 200 acts as a notch filter (notch filter) that provides suppression (suppression) with level clamping around the center frequency and has unity gain away from the center frequency.
Fig. 6 is a diagram illustrating a frequency response obtained by the parametric equalizer 200 shown in fig. 2 according to an embodiment of the present invention. As shown in fig. 6, it is assumed that the center frequency of the parametric equalizer 200 and the equalizer circuit 200 is 10 3 Hertz (hertz, hz), the first threshold TH1 is 30 decibels (dB), and the input level of the input signal a _ IN is 0 dB to 50 dB, where 0 dB to 20 dB is case 1 above, 30 dB is case 2 above, and 40 dB to 50 dB is case 3 above.
IN case 1, since the input level of the input signal a _ IN and the peak level of the output signal EQ _ OUT are both less than or equal to the first threshold TH1, the parametric equalizer 200 only operates at the center frequency 10 3 The hertz position amplifies (amplifies) the input signal a _ IN without protecting the peak level of the first protection signal PROTECT _1 from exceeding the first threshold TH1 used by the automatic gain control circuit 28.
IN case 2, since the input level of the input signal a _ IN is less than or equal to the first threshold TH1 and the peak level of the output signal EQ _ OUT is greater than the first threshold TH1, the parameter equalizer 200 can PROTECT the peak level of the first protection signal protection _1 from exceeding the first threshold TH1 used by the agc circuit 28, so that the peak level of the first protection signal protection _1 is limited to the first threshold TH1 (e.g., the peak level of the first protection signal protection _1 is limited to 30 db), and the peak level of the equalizer output signal PEQ _ OUT is equal to the peak level of the first protection signal protection _1 (i.e., the peak level of the equalizer output signal PEQ _ OUT is equal to 30 db).
IN case 3, since the input level of the input signal a _ IN and the peak level of the output signal EQ _ OUT are both greater than the first threshold TH1, the parameter equalizer 200 can PROTECT the peak level of the first protection signal protection _1 from exceeding the first threshold TH1 used by the agc circuit 28, so that the peak level of the first protection signal protection _1 is limited to the first threshold TH1 (for example, the peak level of the first protection signal protection _1 is limited to 30 db), and further, since the input level of the input signal a _ IN is higher than the peak level of the first protection signal protection _1, the equalizer output signal PEQ _ OUT (PEQ _ OUT = protection _1+ protection _ 2) has a valley level which is equal to the peak level of the first protection signal protection _1 (i.e., the valley level of the equalizer output signal PEQ _ OUT is equal to 30 db).
For performing a plurality of operation modes of the parametric equalizer of the present invention, 2-to-1 (2-to-1) Multiplexers (MUXs) may be coupled to the parametric equalizer 200, and fig. 7 is a schematic diagram of a parametric equalizer 700 according to another embodiment of the present invention. The parametric equalizer 700 may comprise the parametric equalizer 200 and a plurality of multiplexers 702 and 704, and may support 3 operating modes: pure PEQ mode, APEQ-only mode, and APEQ-limited mode.
As shown IN fig. 7, the multiplexer 702 may have a first input port (labeled as "1" IN fig. 7) for receiving the input signal a _ IN, a second input port (labeled as "0" IN fig. 7) coupled to the parametric equalizer 200 and configured to receive a first selection signal S according to a first selection signal S, and a first output port 1 The first output port is coupled to one of the first input port and the second input port to generate a first multiplexer output signal MUX _ OUT _1.
The first selection signal S is used when the parametric equalizer 700 needs to be operated IN the APEQ single mode and the input level of the input signal a _ IN of the parametric equalizer 200 is greater than the first threshold TH1 1 Can be set to a logic level (e.g., S) 1 = "1"), which indicates that multiplexer 702 should couple the first output port to the first input port (i.e. the first multiplexer output signal MUX _ OUT _1 equals the input signal a _ IN), which isIN addition, when the parametric equalizer 700 needs to be operated IN the APEQ-limited mode and the input level of the input signal a _ IN of the parametric equalizer 200 is less than or equal to the first threshold TH1, the first selection signal S 1 Can be set to another logic level (e.g., S) 1 = "0") indicating that multiplexer 702 should couple the first output port to the second input port (i.e. first multiplexer output signal MUX _ OUT _1 equals equalizer output signal PEQ _ OUT).
As shown in fig. 7, the multiplexer 704 may have a third input port (labeled "0" in fig. 7), a fourth input port (labeled "1" in fig. 7), and a second output port, wherein the third input port may be coupled to the equalizer circuit 22 of the parametric equalizer 200 and may be configured to receive the output signal EQ _ OUT, the fourth input port may be coupled to the first output port of the multiplexer 702 and may be configured to receive the first multiplexer output signal MUX _ OUT _1, and the multiplexer 704 may be configured to output the signal S according to a second selection signal S 2 The second output port is coupled to one of the third input port and the fourth input port to generate a second multiplexer output signal MUX _ OUT _2.
When the parameter equalizer 700 needs to be operated in the APEQ single mode or the APEQ restricted mode, the second selection signal S 2 Can be set to a logic level (e.g., S) 2 = "1"), which indicates that the multiplexer 704 should couple the second output port to the fourth input port (i.e. the second multiplexer output signal MUX _ OUT _2 is equal to the first multiplexer output signal MUX _ OUT _ 1), and furthermore, when the parameter equalizer 700 needs to be operated in pure PEQ mode, the second selection signal S 2 Can be set to another logic level (e.g., S) 2 = "0") indicating that multiplexer 704 should couple the second output port to the third input port (i.e. the second multiplexer output signal MUX _ OUT _2 equals the output signal EQ _ OUT).
Fig. 8 is a flowchart of a method for equalizing an input signal a _ IN to generate an equalizer output signal PEQ _ OUT according to an embodiment of the present invention. If the same result is obtained, the steps do not have to follow the flow shown in FIG. 8 completely, for example, the method shown in FIG. 8 can be implemented by the parameter equalizer 100/200.
IN step S50, an average calculation is performed on the input signal a _ IN to generate an average AV of the input signal a _ IN as the second threshold TH2.
IN step S52, the input signal a _ IN is received and equalized to generate the output signal EQ _ OUT.
IN step S54, the input signal a _ IN is received and subtracted from the output signal EQ _ OUT to generate a second processed signal PROCESS _2.
In step S56, the first PROCESS signal PROCESS _1 is generated based on the second PROCESS signal PROCESS _2 and the second threshold TH2.
In step S58, the first processing signal PROCESS _1 is combined with the second processing signal PROCESS _2 to generate the pre-adjustment signal PAD.
In step S60, a first protection signal protection _1 is generated according to the pre-adjustment signal PAD and the first threshold TH1.
IN step S62, the first processing signal PROCESS _1 is subtracted from the input signal a _ IN to generate a second protection signal PROCESS _2.
In step S64, the first protection signal PROTECT _1 is combined with the second protection signal PROTECT _2 to generate the equalizer output signal PEQ _ OUT.
Since the operations of the steps shown in fig. 8 can be easily understood by those skilled in the art through the descriptions of the parameter equalizer 100 and the parameter equalizer 200, similar contents in this embodiment are not repeated herein for brevity.
The above-mentioned embodiments are only preferred embodiments of the present invention, and all equivalent changes and modifications made by the claims of the present invention should be covered by the scope of the present invention.
Claims (18)
1. A parametric equalizer, comprising:
an equalizer circuit to receive an input signal and process the input signal to generate an output signal;
a first protection circuit for generating a first protection signal according to the output signal, the input signal and a first processing signal, wherein a peak level of the first protection signal is protected from exceeding a first threshold used by the first protection circuit;
a second protection circuit for generating a second protection signal based on the input signal and a second processed signal, wherein the first processed signal relates to generation of the second processed signal, the second processed signal relates to generation of the first processed signal, and a peak level of the first processed signal is protected from exceeding a second threshold used by the second protection circuit; and
the first adder circuit is coupled to the first protection circuit and the second protection circuit, and is configured to combine the first protection signal and the second protection signal to generate an equalizer output signal.
2. The parametric equalizer of claim 1, wherein the first protection circuit comprises:
a first subtracting circuit coupled to the equalizer circuit and configured to receive the input signal and subtract the input signal from the output signal to generate the second processed signal;
a second adder circuit coupled to the first subtractor circuit and the second protection circuit for combining the first processed signal and the second processed signal to generate a pre-adjusted signal; and
the first automatic gain control circuit is coupled to the second adder circuit and configured to generate the first protection signal according to the pre-adjustment signal and the first threshold.
3. The parametric equalizer of claim 2, wherein the second protection circuit comprises:
a second automatic gain control circuit coupled to the first subtracting circuit and the second adding circuit and configured to generate the first processed signal according to the second processed signal and the second threshold; and
the second subtracting circuit is coupled to the second automatic gain control circuit and configured to subtract the first processing signal from the input signal to generate the second protection signal.
4. The parametric equalizer of claim 1, further comprising:
an averaging circuit for generating an average value of the input signal as the second threshold.
5. The parametric equalizer of claim 4, wherein the average is a root mean square value of the input signal.
6. The parametric equalizer of claim 1, wherein an input level of the input signal and a peak level of the output signal are both less than or equal to the first threshold, and the equalizer output signal is the same as the output signal.
7. The parametric equalizer of claim 1, wherein an input level of the input signal is less than or equal to the first threshold, a peak level of the output signal is greater than the first threshold, a peak level of the equalizer output signal is limited to the first threshold, and a minimum level of the equalizer output signal is equal to the input level of the input signal.
8. The parametric equalizer of claim 1, wherein an input level of the input signal and a peak level of the output signal are both greater than the first threshold, a valley of the equalizer output signal is limited to the first threshold, and a maximum level of the equalizer output signal is equal to the input level of the input signal.
9. The parametric equalizer of claim 1, further comprising:
a first multiplexer circuit having a first input port for receiving the input signal, a second input port for receiving the equalizer output signal, and a first output port, and coupled to one of the first input port and the second input port according to a first selection signal; and
a second multiplexer circuit having a third input port for receiving the output signal, a fourth input port for receiving an output at the first output port of the first multiplexer circuit, and a second output port for coupling the second output port to one of the third input port and the fourth input port according to a second selection signal.
10. A method for equalizing an input signal to generate an equalizer output signal, comprising:
receiving the input signal and processing the input signal to produce an output signal;
generating a first guard signal according to the output signal, the input signal and a first processing signal, wherein a peak level of the first guard signal is protected from exceeding a first threshold;
generating a second protection signal based on the input signal and a second processed signal, wherein the first processed signal relates to generation of the second processed signal, the second processed signal relates to generation of the first processed signal, and a peak level of the first processed signal is protected from exceeding a second threshold; and
the first guard signal is combined with the second guard signal to produce the equalizer output signal.
11. The method of claim 10, wherein generating the first guard signal according to the output signal, the input signal, and the first processed signal comprises:
subtracting the input signal from the output signal to generate the second processed signal;
combining the first processed signal with the second processed signal to generate a pre-conditioned signal; and
the first protection signal is generated according to the pre-adjustment signal and the first threshold.
12. The method of claim 11, wherein the step of generating the second protection signal according to the input signal and the second processing signal comprises:
generating the first processed signal according to the second processed signal and the second threshold; and
the first processed signal is subtracted from the input signal to generate the second protection signal.
13. The method of claim 10, further comprising:
an average value of the input signal is calculated to generate an average value of the input signal as the second threshold.
14. The method of claim 13 wherein the average is a root mean square value of the input signal.
15. The method of claim 10, wherein an input level of the input signal and a peak level of the output signal are both less than or equal to the first threshold, and the equalizer output signal is the same as the output signal.
16. The method of claim 10, wherein an input level of the input signal is less than or equal to the first threshold, a peak level of the output signal is greater than the first threshold, a peak level of the equalizer output signal is limited to the first threshold, and a minimum level of the equalizer output signal is equal to the input level of the input signal.
17. The method of claim 10, wherein an input level of the input signal and a peak level of the output signal are both greater than the first threshold, a valley of the equalizer output signal is limited to the first threshold, and a maximum level of the equalizer output signal is equal to the input level of the input signal.
18. The method of claim 10, further comprising:
performing a first multiplexing operation on the input signal and the equalizer output signal according to a first selection signal to generate a first multiplexed output; and
and performing a second multiplexing operation on the output signal and the first multiplexed output according to a second selection signal to generate a second multiplexed output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110923381.0A CN115913183A (en) | 2021-08-12 | 2021-08-12 | Method for equalizing input signal to generate equalizer output signal and parameter equalizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110923381.0A CN115913183A (en) | 2021-08-12 | 2021-08-12 | Method for equalizing input signal to generate equalizer output signal and parameter equalizer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115913183A true CN115913183A (en) | 2023-04-04 |
Family
ID=86486863
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110923381.0A Pending CN115913183A (en) | 2021-08-12 | 2021-08-12 | Method for equalizing input signal to generate equalizer output signal and parameter equalizer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115913183A (en) |
-
2021
- 2021-08-12 CN CN202110923381.0A patent/CN115913183A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5394905B2 (en) | Automatic level control circuit, audio digital signal processor and variable gain amplifier gain control method using the same | |
| US8582784B2 (en) | Method and device for extension of low frequency output from a loudspeaker | |
| JP4161983B2 (en) | Sound quality adjustment device | |
| US5208866A (en) | On-board vehicle automatic sound volume adjusting apparatus | |
| US8150067B2 (en) | Bass enhancing method, signal processing device, and audio reproducing system | |
| US20140205111A1 (en) | Sound processing apparatus, method, and program | |
| US20100220864A1 (en) | Low frequency management for multichannel sound reproduction systems | |
| US20080152168A1 (en) | Audio signal frequency range boost circuits | |
| US20080008311A1 (en) | Methods and apparatus for improving voice quality in an environment with noise | |
| US20060274903A1 (en) | Sound quality adjustment device | |
| KR101085488B1 (en) | Sound signal processing apparatus and method | |
| EP1580884A1 (en) | Dynamic equalizing | |
| US20080285781A1 (en) | Signal Processing System, for Example Sound Signal Processing System or a Hearing Aid Device | |
| EP1148637B1 (en) | Level adjustment circuit | |
| CN115913183A (en) | Method for equalizing input signal to generate equalizer output signal and parameter equalizer | |
| TWI781714B (en) | Method for equalizing input signal to generate equalizer output signal and parametric equalizer | |
| US11601753B2 (en) | Method for equalizing input signal to generate equalizer output signal and associated parametric equalizer | |
| JP2007088568A (en) | Audio unit | |
| EP0882381B1 (en) | An arrangement, a system, a circuit and a method for enhancing a stereo image | |
| CN115696133A (en) | Method for equalizing signal and leveling equalizer | |
| JP2019096947A (en) | Audio device and level adjustment method for audio signal | |
| EP3994592A1 (en) | Method and apparatus for improving effective signal-to-noise ratio of analog to digital conversion for multi-band digital signal processing devices | |
| JP4483468B2 (en) | Noise reduction circuit, electronic device, noise reduction method | |
| US11757420B2 (en) | Method for dynamically adjusting adjustable gain value to equalize input signal to generate equalizer output signal and associated leveling equalizer | |
| JP2946884B2 (en) | Low frequency response correction circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |