CN115910918A - Method for forming metal layer - Google Patents
Method for forming metal layer Download PDFInfo
- Publication number
- CN115910918A CN115910918A CN202310036399.8A CN202310036399A CN115910918A CN 115910918 A CN115910918 A CN 115910918A CN 202310036399 A CN202310036399 A CN 202310036399A CN 115910918 A CN115910918 A CN 115910918A
- Authority
- CN
- China
- Prior art keywords
- metal layer
- metal
- deposition process
- substrate
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 136
- 239000002184 metal Substances 0.000 title claims abstract description 136
- 238000000034 method Methods 0.000 title claims abstract description 99
- 238000001465 metallisation Methods 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 238000001816 cooling Methods 0.000 claims abstract description 29
- 238000010438 heat treatment Methods 0.000 claims abstract description 16
- 238000000151 deposition Methods 0.000 claims description 22
- 230000008021 deposition Effects 0.000 claims description 18
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 14
- 239000011261 inert gas Substances 0.000 claims description 14
- 229910052786 argon Inorganic materials 0.000 claims description 7
- 239000007789 gas Substances 0.000 claims description 6
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 abstract description 16
- 230000007547 defect Effects 0.000 description 22
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 7
- 239000012535 impurity Substances 0.000 description 7
- 239000013078 crystal Substances 0.000 description 6
- 230000000877 morphologic effect Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005137 deposition process Methods 0.000 description 5
- 229910001873 dinitrogen Inorganic materials 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 239000000112 cooling gas Substances 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 125000004437 phosphorous atom Chemical group 0.000 description 1
- CCEKAJIANROZEO-UHFFFAOYSA-N sulfluramid Chemical group CCNS(=O)(=O)C(F)(F)C(F)(F)C(F)(F)C(F)(F)C(F)(F)C(F)(F)C(F)(F)C(F)(F)F CCEKAJIANROZEO-UHFFFAOYSA-N 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
Images
Abstract
The application discloses a method for forming a metal layer, which comprises the steps of providing a substrate, adsorbing one surface of the substrate on an electrostatic chuck, and enabling the heating function of the electrostatic chuck to be in a closed state; forming a first metal layer on the other side of the substrate by a first metal deposition process; starting the heating function of the electrostatic chuck; and alternately performing a second metal deposition process and cooling on the first metal layer a plurality of times to form a second metal layer having a target thickness. The scheme can improve the yield of the semiconductor device.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a method for forming a metal layer.
Background
In the semiconductor field, the number of elements of high-efficiency and high-density integrated circuits rises to several tens of millions, and signal integration of these huge active elements needs to be realized through a metal interconnection structure.
However, in the conventional metal interconnection process, morphological defects such as "whiskers" and "volcanoes" are easily formed in the metal layer during the formation process, which seriously affects the yield of semiconductor devices.
Disclosure of Invention
The application provides a method for forming a metal layer, which can improve the yield of semiconductor devices.
The application provides a method for forming a metal layer, which comprises the following steps:
providing a substrate, and adsorbing one surface of the substrate on an electrostatic chuck, wherein the heating function of the electrostatic chuck is in a closed state;
forming a first metal layer on the other side of the substrate through a first metal deposition process;
starting a heating function of the electrostatic chuck;
and alternately performing a second metal deposition process and cooling on the first metal layer for multiple times to form a second metal layer with a target thickness.
In the method for forming the metal layer, the second metal deposition process and the number of cooling times are in direct proportion to the target thickness of the second metal layer.
In the forming method of the metal layer provided by the application, the time length of each cooling is the same.
In the forming method of the metal layer, a gas flow channel is arranged on one side of the electrostatic chuck, which faces away from the substrate, and the gas flow channel is used for transmitting inert gas with heat.
In the method for forming a metal layer provided by the present application, the inert gas is argon.
In the method for forming the metal layer, the first metal deposition process and the second metal deposition process are sputtering deposition processes.
In the method for forming the metal layer, the inert gas used in the first metal deposition process and the second metal deposition process is argon.
In the forming method of the metal layer, the deposition time of the second metal deposition process for each time is 35-50 seconds, and the deposition thickness is 0.6-0.8 micrometers.
In the forming method of the metal layer, the cooling time is 40-55 seconds each time.
In the forming method of the metal layer, the duration of the first metal deposition process is 15-30 seconds.
In summary, the method for forming a metal layer provided in the present application includes providing a substrate, and attaching one surface of the substrate to an electrostatic chuck, where a heating function of the electrostatic chuck is in an off state; forming a first metal layer on the other side of the substrate through a first metal deposition process; starting a heating function of the electrostatic chuck; and alternately performing a second metal deposition process and cooling on the first metal layer for multiple times to form a second metal layer with a target thickness. According to the scheme, the heating function of the electrostatic chuck is closed in the first metal deposition process, so that the first metal layer with small grain size and good uniformity is obtained, the second metal layer continues to grow along the first metal layer and has the same grain size and uniformity, the formation of morphology defects such as 'whiskers' and 'volcanoes' is effectively avoided, and the yield of semiconductor devices is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a method for forming a metal layer according to an embodiment of the present disclosure.
Fig. 2 is a defect diagram of a metal layer formed in a conventional manner.
FIG. 3 is a graphical depiction of "whisker" and "volcano" topographical defects of a conventionally formed metal layer.
Fig. 4 is a graph of metal grain size for a metal layer formed in a conventional manner.
Fig. 5 is a defect diagram of a target metal layer provided in an embodiment of the present application.
Fig. 6 is a graph of metal grain size of a target metal layer provided in an embodiment of the present application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the recitation of a claim "comprising a" 8230a "\8230means" does not exclude the presence of additional identical elements in the process, method, article or apparatus in which the element is incorporated, and further, similarly named components, features, elements in different embodiments of the application may have the same meaning or may have different meanings, the specific meaning of which should be determined by its interpretation in the specific embodiment or by further combination with the context of the specific embodiment.
It should be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad application.
In the following description, suffixes such as "module", "component", or "unit" used to denote elements are used only for the convenience of description of the present application, and have no specific meaning in themselves. Thus, "module", "component" or "unit" may be used mixedly.
In the description of the present application, it should be noted that the terms "upper", "lower", "left", "right", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Since the metal layer has a higher expansion coefficient than the substrate, a large amount of compressive Stress (Stress) is generated during the deposition process of the metal layer, and when the compressive Stress is accumulated to a certain degree and the metal grains are non-uniform, some smaller grains are extruded in the grain boundary to form morphological defects such as 'whiskers' or 'volcanoes' and the like to release the pressure.
The conventional metal layer deposition is generally divided into a one-step deposition method and a multi-step deposition method, in the metal layer deposition process, the substrate receives heat brought by plasma and metal atoms sputtering to the surface of the substrate while being heated by an electrostatic chuck, and the longer the deposition time is, the higher the temperature of the substrate is. In the one-step deposition method, the deposition time is too long, which results in a large temperature variation of the substrate, and the temperature non-uniformity is more significant with the increase of the deposition thickness, resulting in non-uniformity of the crystal grains of the formed metal layer. The multi-step deposition method has the defects that the crystal grains of the formed metal layer are not uniform due to the overlarge temperature difference and the non-uniform temperature conduction of the deposition of each step.
Therefore, in the conventional metal interconnection process, morphological defects such as 'whiskers' and 'volcanoes' are easily formed in the metal layer in the forming process, and the yield of the semiconductor device is seriously influenced.
Based on this, the embodiment of the application provides a forming method of a metal layer. The technical solution shown in the present application will be described in detail by specific examples. It should be noted that the description sequence of the following embodiments is not intended to limit the priority sequence of the embodiments.
Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a method for forming a metal layer according to an embodiment of the present disclosure. The specific flow of the metal layer forming method can be as follows:
101. providing a substrate, and adsorbing one surface of the substrate on the electrostatic chuck, wherein the heating function of the electrostatic chuck is in a closed state.
It is understood that the base may include a semiconductor substrate and a device structure disposed on the semiconductor substrate.
The semiconductor substrate may be a silicon single crystal, silicon carbide, gallium arsenide, indium phosphide, silicon germanium, or the like, a silicon germanium substrate, a group iii-v element compound substrate, a silicon carbide substrate, or a stacked structure thereof, or a silicon on insulator structure, or a diamond substrate or another semiconductor material substrate known to those skilled in the art, for example, a semiconductor substrate in which P atoms are implanted into a silicon single crystal to form N-type conductivity, or a semiconductor substrate in which B atoms are implanted into a silicon single crystal to form P-type conductivity. It should be noted that a channel region, a source region, a drain region, and a deep well region plasma implantation region are disposed in the semiconductor substrate.
102. A first metal layer is formed on the other side of the substrate by a first metal deposition process.
Specifically, the first metal layer may be formed on the other side of the substrate by a sputtering deposition process. In some embodiments, the inert gas used in the first metal deposition process is argon.
It can be appreciated that since the heating function of the electrostatic chuck is in an off state during the first metal deposition process, the temperature of the substrate can be maintained at a low level with little change in temperature. And the lower the substrate temperature, the smaller the size of the metal grains formed. In addition, the temperature change of the substrate is not large, so that the formed metal crystal grains have high uniformity. Therefore, a first metal layer with small grain size and high uniformity can be formed on the substrate by the first metal deposition process.
It should be noted that the first metal layer is a seed layer for a subsequent metal deposition process, and has a relatively small thickness. In the embodiment of the application, the time length of the first metal deposition process is 15 seconds to 30 seconds. It can be understood that the shorter the duration of the first metal deposition process, the smaller the thickness of the first metal layer is formed; the longer the duration of the first metal deposition process, the greater the thickness of the first metal layer formed. The duration of the first metal deposition process can be adjusted correspondingly according to the thickness of the first metal layer required in practice. For example, the duration of the first metal deposition process may be 15 seconds, 16 seconds, 18 seconds, 20 seconds, 25 seconds, 30 seconds, etc., according to the actual required thickness of the first metal layer.
In some embodiments, the material of the second metal layer may include one or an alloy of at least two of aluminum, copper, tungsten, nickel, gold, silver, and titanium.
103. And starting the heating function of the electrostatic chuck.
In the embodiment of the application, the side of the electrostatic chuck opposite to the substrate is provided with a gas flow channel which is used for transmitting inert gas with heat. In some embodiments, the inert gas may be argon.
It will be appreciated that the heating function of the electrostatic chuck may be turned on or off by opening or closing the airflow path.
104. And alternately performing a second metal deposition process and cooling on the first metal layer a plurality of times to form a second metal layer having a target thickness.
The material of the second metal layer may include one or an alloy of at least two of aluminum, copper, tungsten, nickel, gold, silver, titanium, and the like.
It should be noted that the structure formed by the first metal layer and the second metal layer is the target metal layer. The thickness of the target metal layer can be set according to actual requirements. It is understood that the target thickness of the second metal layer is positively correlated to the thickness of the target metal layer, and the greater the thickness of the target metal layer, the greater the target thickness of the second metal layer.
In the embodiment of the present application, the second metal deposition process is a sputtering deposition process, and the inert gas used in the second metal deposition process is argon. It can be understood that, since the inert gas used in the second metal deposition process is the same as the inert gas transmitted by the gas flow channel on the back side of the electrostatic chuck, the inert gas transmitted by the gas flow channel can supplement the inert gas used in the second metal deposition process during the second metal deposition process, so that the deposition speed and the deposition effect of the second metal deposition process are increased.
It will be appreciated that the second metal deposition process and the number of cooldown times is proportional to the target thickness of the second metal layer. The larger the target thickness of the second metal layer is obtained, the more the second metal deposition process and the cooling frequency are; the smaller the target thickness of the second metal layer is obtained, the fewer the second metal deposition process and the number of cooling times.
In the embodiment of the application, the deposition time of each second metal deposition process is 35-50 seconds, and the deposition thickness is 0.6-0.8 micrometer. The time length of each cooling is 40-55 seconds. It should be noted that, in the specific implementation process, the thickness of the second metal deposition process and the time duration of each cooling should be kept as much as possible, so as to ensure that the substrate is kept at the same temperature after each second metal deposition process and cooling, so as to ensure the uniformity of the formed metal grains, further effectively avoid the formation of morphological defects such as 'whiskers' and 'volcanoes', and improve the yield of semiconductor devices.
It can be understood that the first metal layer is a seed layer of the second metal deposition process, and the second metal layer can continue to grow along the first metal layer, so that the second metal layer with the same grain size and uniformity as the first metal layer is obtained, and the formation of morphological defects such as 'whiskers' and 'volcanoes' is effectively avoided.
In some embodiments, the metal film formed after each second metal deposition process may be cooled using nitrogen gas. In some embodiments, in order to rapidly cool the metal film, a multi-stage cooling method may be used for cooling. For example, when the cooling is performed by a two-stage cooling method, and the cooling time is 50 seconds, a certain amount of nitrogen gas may be introduced to cool for 20 seconds in the first stage, the nitrogen gas used in the first stage may be discharged in the second stage, the nitrogen gas is introduced again to cool for 30 seconds, and the cooling speed is controlled by controlling parameters such as the flow rate and pressure of the nitrogen gas, so as to reduce the impurity defects in the metal film as much as possible, and the cooling time in the first stage and the second stage may also be adjusted according to the cooling effect.
In the process of cooling the metal film, factors such as insufficient amount of introduced nitrogen and other cooling gases cause the cooling process to be abnormal, so that the structural state of the metal film is changed, and further impurity defects occur in the metal film. The non-uniform metal film with a large number of out-of-specification impurity defects may affect the performance of the second metal layer and thus the target metal layer. For example, when the target metal layer is a metal layer in a metal interconnection structure, in a subsequent packaging process, the connection reliability between the bonding pad and the lead of the target metal layer with an uneven structure or surface may be affected, thereby causing problems such as circuit failure.
Therefore, after the target metal layer is formed, the impurity defects in the target metal layer need to be detected, and if the impurity defects in the metal film exceed the specification, different impurity removal treatment modes can be adopted for the metal film according to different reasons causing the impurity defects exceeding the specification in the metal film.
In the specific implementation process, the cooling time and the cooling speed can be selected as appropriate according to different materials of the second metal layer.
Through experiments, the defect map of the metal layer obtained through the conventional metal layer deposition as shown in fig. 2, the morphology defect map of the metal layer obtained through the conventional metal layer deposition as shown in fig. 3, such as "whiskers" and "volcanoes", and the grain size map of the metal layer obtained through the conventional metal layer deposition as shown in fig. 4 are obtained. The defect map of the target metal layer obtained by the embodiment of the application is shown in fig. 5, and the metal layer grain size map of the target metal layer is shown in fig. 6.
Therefore, the metal layer grain size of the target metal layer obtained by the embodiment of the application is obviously smaller than that of the metal layer obtained by traditional metal layer deposition, the target metal layer obtained by the embodiment of the application has no morphological defects such as 'whiskers' and 'volcanoes', and the like, and the total defects are obviously smaller than that of the metal layer obtained by traditional metal layer deposition.
In summary, the method for forming a metal layer provided by the embodiment of the present application includes providing a substrate, and attaching one surface of the substrate to an electrostatic chuck, where a heating function of the electrostatic chuck is in an off state; forming a first metal layer on the other side of the substrate through a first metal deposition process; starting a heating function of the electrostatic chuck; and alternately performing a second metal deposition process and cooling on the first metal layer for multiple times to form a second metal layer with a target thickness. According to the scheme, the heating function of the electrostatic chuck is turned off in the first metal deposition process, so that the first metal layer with small grain size and good uniformity is obtained, the second metal layer continuously grows along the first metal layer and has the same grain size and uniformity, the formation of morphology defects such as 'whiskers' and 'volcanoes' is effectively avoided, and the yield of semiconductor devices is improved.
The method for forming the metal layer provided by the present application is described in detail above, and the principle and the implementation of the present application are explained herein by applying specific examples, and the description of the above examples is only used to help understand the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A method for forming a metal layer, comprising:
providing a substrate, and adsorbing one surface of the substrate on an electrostatic chuck, wherein the heating function of the electrostatic chuck is in a closed state;
forming a first metal layer on the other side of the substrate through a first metal deposition process;
starting a heating function of the electrostatic chuck;
and alternately performing a second metal deposition process and cooling on the first metal layer for multiple times to form a second metal layer with a target thickness.
2. The method of claim 1, wherein the second metal deposition process and the number of cooling times is proportional to a target thickness of the second metal layer.
3. The method of claim 2, wherein the cooling is performed for the same time period each time.
4. The method of claim 1, wherein a side of the electrostatic chuck facing away from the substrate is provided with a gas flow channel for transporting an inert gas having heat.
5. The method of forming a metal layer according to claim 4, wherein the inert gas is argon.
6. The method of forming a metal layer of claim 1, wherein the first metal deposition process and the second metal deposition process are sputter deposition processes.
7. The method of claim 6, wherein the inert gas used in the first metal deposition process and the second metal deposition process is argon.
8. The method of any of claims 1-7, wherein each of the second metal deposition processes has a deposition time of 35 seconds to 50 seconds and a deposition thickness of 0.6 microns to 0.8 microns.
9. The method of forming a metal layer according to any one of claims 1 to 7, wherein a time period for each cooling is 40 seconds to 55 seconds.
10. The method of forming the metal layer according to any one of claims 1 to 7, wherein the first metal deposition process is performed for a period of 15 seconds to 30 seconds.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310036399.8A CN115910918A (en) | 2023-01-10 | 2023-01-10 | Method for forming metal layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310036399.8A CN115910918A (en) | 2023-01-10 | 2023-01-10 | Method for forming metal layer |
Publications (1)
Publication Number | Publication Date |
---|---|
CN115910918A true CN115910918A (en) | 2023-04-04 |
Family
ID=86481122
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310036399.8A Pending CN115910918A (en) | 2023-01-10 | 2023-01-10 | Method for forming metal layer |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN115910918A (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6638856B1 (en) * | 1998-09-11 | 2003-10-28 | Cypress Semiconductor Corporation | Method of depositing metal onto a substrate |
US6905543B1 (en) * | 2002-06-19 | 2005-06-14 | Novellus Systems, Inc | Methods of forming tungsten nucleation layer |
CN102237299A (en) * | 2010-04-27 | 2011-11-09 | 中芯国际集成电路制造(上海)有限公司 | Method for forming aluminum thin film |
CN102443777A (en) * | 2010-10-12 | 2012-05-09 | 无锡华润上华半导体有限公司 | Metal layer deposition method |
CN105990227A (en) * | 2015-02-27 | 2016-10-05 | 中芯国际集成电路制造(上海)有限公司 | Metal wire manufacturing method and semiconductor device |
CN110890261A (en) * | 2018-09-11 | 2020-03-17 | 长鑫存储技术有限公司 | Electrostatic chuck, vacuum processing apparatus, and gas supply method |
-
2023
- 2023-01-10 CN CN202310036399.8A patent/CN115910918A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6638856B1 (en) * | 1998-09-11 | 2003-10-28 | Cypress Semiconductor Corporation | Method of depositing metal onto a substrate |
US6905543B1 (en) * | 2002-06-19 | 2005-06-14 | Novellus Systems, Inc | Methods of forming tungsten nucleation layer |
CN102237299A (en) * | 2010-04-27 | 2011-11-09 | 中芯国际集成电路制造(上海)有限公司 | Method for forming aluminum thin film |
CN102443777A (en) * | 2010-10-12 | 2012-05-09 | 无锡华润上华半导体有限公司 | Metal layer deposition method |
CN105990227A (en) * | 2015-02-27 | 2016-10-05 | 中芯国际集成电路制造(上海)有限公司 | Metal wire manufacturing method and semiconductor device |
CN110890261A (en) * | 2018-09-11 | 2020-03-17 | 长鑫存储技术有限公司 | Electrostatic chuck, vacuum processing apparatus, and gas supply method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5978548B2 (en) | Method for manufacturing gallium nitride type wafer on diamond | |
US7943485B2 (en) | Composite wafers having bulk-quality semiconductor layers and method of manufacturing thereof | |
US5770468A (en) | Process for mounting a semiconductor chip to a chip carrier by exposing a solder layer to a reducing atmosphere | |
US8722487B2 (en) | Semiconductor device with an electrode including an aluminum-silicon film | |
US20090108437A1 (en) | Wafer scale integrated thermal heat spreader | |
EP0637077B1 (en) | Method for making a substrate structure with improved heat dissipation | |
JP2000106413A (en) | Heat sink and manufacture thereof | |
JPS6120315A (en) | Semiconductor device substrate | |
JP2000091271A (en) | Manufacture of electronic circuit | |
US4590130A (en) | Solid state zone recrystallization of semiconductor material on an insulator | |
US7531429B2 (en) | Methods and apparatuses for manufacturing ultra thin device layers for integrated circuit devices | |
US9358765B2 (en) | Method for coating and bonding substrates | |
CN115910918A (en) | Method for forming metal layer | |
US11060182B2 (en) | Method of forming metal layer, semiconductor device and method of fabricating same | |
US6638856B1 (en) | Method of depositing metal onto a substrate | |
JPH09104972A (en) | Titanium target for sputtering and its production | |
JP2685750B2 (en) | Substrate for semiconductor device formation | |
JPH10172923A (en) | Forming mehtod for metallic wiring for semiconductor device | |
JPS593952A (en) | Formation of aluminum wiring layer | |
US11127595B2 (en) | Method for bonding a semiconductor substrate to a carrier | |
US11476178B2 (en) | Selectively-pliable chemical vapor deposition (CVD) diamond or other heat spreader | |
US20230317443A1 (en) | Composite semiconductor wafer/chip for advanced ics and advanced ic packages and the manufacture method thereof | |
US20040229477A1 (en) | Apparatus and method for producing a <111> orientation aluminum film for an integrated circuit device | |
Biard et al. | Tailored Polycrystalline Substrate for SmartSiCTM Substrates Enabling High Performance Power Devices | |
CN107680901A (en) | The flexible compound substrate and manufacture method of a kind of semiconductor epitaxial |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20230404 |
|
RJ01 | Rejection of invention patent application after publication |