CN115905073A - Double-path serial bus switching system and method based on single-pole double-throw analog switch - Google Patents
Double-path serial bus switching system and method based on single-pole double-throw analog switch Download PDFInfo
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- CN115905073A CN115905073A CN202110937228.3A CN202110937228A CN115905073A CN 115905073 A CN115905073 A CN 115905073A CN 202110937228 A CN202110937228 A CN 202110937228A CN 115905073 A CN115905073 A CN 115905073A
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Abstract
The invention discloses a two-way serial bus switching system and a two-way serial bus switching method. When the first serial bus is switched, the master device controls the two single-pole double-throw analog switches to be switched simultaneously, so that the first single-pole double-throw analog switch outputs a clock signal of the first serial bus to the slave device, and the second single-pole double-throw analog switch outputs a data signal of the first serial bus to the slave device; when the second serial bus is switched, the master device controls the two single-pole double-throw analog switches to be switched simultaneously, so that the first single-pole double-throw analog switch outputs a clock signal of the second serial bus to the slave device, and the second single-pole double-throw analog switch outputs a data signal of the second serial bus to the slave device. The invention can realize the switching of the serial bus without using a special bus switching chip and designing a logic driving code.
Description
Technical Field
The invention relates to the technical field of buses, in particular to a double-path serial bus switching system based on a single-pole double-throw analog switch and a method for realizing double-path serial bus switching by the double-path serial bus switching system.
Background
With the development of modern electronic circuit systems, the functions supported by the electronic circuit systems become various. Along with the development of integrated circuits, more and more electronic circuit systems adopt a modular design, that is, a functional module and a management module of the electronic circuit system are designed separately, and the functional module is connected with the management module through a connector. The system can support more and more functions, relying on more sensors and special functional components on the functional modules. Typically, these sensors and special function components are managed through a low-speed serial bus including data signal lines and clock signal lines, the device that manages these sensors and special components is called a Master (Master), and the sensors and special components are called slaves (Slave).
When the main device supports two types of serial buses, the communication protocols followed by the two types of serial buses are different, and the connector only has one path of serial communication interface output, so that the serial buses need to be switched according to the devices mounted on the functional modules, so that the main device can manage the corresponding devices, for example, the main device simultaneously supports I 2 C bus and SMBus bus, and the main device is mounted with I according to the serial interface of the functional module 2 C device or SMBus device to flexibly switch I 2 A C bus or an SMBus bus.
At present, when serial bus switching is performed, a bus selection control chip is usually used to implement bus switching, for example, a 2. When the control interface is at a low level, the output bus is equivalent to the direct connection of the bus1, and when the control interface is at a high level, the output bus is equivalent to the direct connection of the bus2, so that the switching of the buses is realized. However, although the bus selection control chip can realize switching of the bus, it is costly and not suitable for large-scale use in some simple electronic circuit systems.
In addition, some employ programmable logic devices to implement the switching of the bus. Because the programmable logic device has a plurality of flexible IO interfaces, the programmable logic device can be flexibly configured according to specific requirements. When a plurality of serial buses are connected to the programmable logic device, one of the two or more paths of input is selected as a main control bus by designing internal logic codes. Compared with a proprietary bus selection function chip, the selection of the bus can be flexibly configured by using the programmable logic device, for example, when a control interface of the proprietary bus selection chip is pulled down, only one of two input buses can be fixedly selected, when the programmable logic device is used, any one input bus can be selected as a main control bus when the state of an external control signal is detected by modifying a logic code, for example, when the external control interface signal is detected to be in a low level, the bus1 is selected by default, and when the changed logic code is downloaded again, the bus2 can be selected by default when the control interface signal is in the low level, and the flexible design according to different application scenes can be realized under the condition that hardware is not changed. However, the use of the programmable logic device to implement switching of the dual-bus channel is flexible and easy to use, but the logic driving code needs to be designed, which increases the complexity of system design, and meanwhile, the reliability of the logic code also affects the stability of the whole system.
Disclosure of Invention
The invention aims to provide a double-path serial bus switching system which can realize bus switching without using a special bus switching chip and designing a logic driving code, and also provides a method for realizing the double-path serial bus switching by the double-path serial bus switching system.
In order to achieve the above object, the present invention provides a two-way serial bus switching system based on a single-pole double-throw analog switch, the two-way serial bus switching system comprising:
the first single-pole double-throw analog switch is used for switching clock signals;
the second single-pole double-throw analog switch is used for switching data signals;
the first serial bus and the second serial bus respectively comprise a clock signal line and a data signal line;
the master device is connected with the input end of the first single-pole double-throw analog switch through clock signal lines of a first serial bus and a second serial bus respectively, and connected with the input end of the second single-pole double-throw analog switch through data signal lines of the first serial bus and the second serial bus respectively, and is used for controlling the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to switch simultaneously when the first serial bus is switched, so that the first single-pole double-throw analog switch outputs a clock signal of the first serial bus, and the second single-pole double-throw analog switch outputs a data signal of the first serial bus; when the second serial bus is switched, the first single-pole double-throw analog switch and the second single-pole double-throw analog switch are controlled to be switched simultaneously, so that the first single-pole double-throw analog switch outputs a clock signal of the second serial bus, and the second single-pole double-throw analog switch outputs a data signal of the second serial bus;
and the slave equipment is respectively connected with the output ends of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch.
Preferably, the first single-pole double-throw analog switch and the second single-pole double-throw analog switch each include a first input interface, a second input interface, and an output interface; the master device is connected with a first input interface of the first single-pole double-throw analog switch through a clock signal line of a first serial bus, connected with a first input interface of the second single-pole double-throw analog switch through a data signal line, connected with a second input interface of the first single-pole double-throw analog switch through a clock signal line of a second serial bus, and connected with a second input interface of the second single-pole double-throw analog switch through a data signal line.
Preferably, the master device has a control signal output interface, the first single-pole double-throw analog switch and the second single-pole double-throw analog switch both have a control signal input interface, and the control signal input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch are both connected with the control signal output interface of the master device.
Preferably, the first serial bus and the second serial bus are both selected from I 2 C. SMBus bus or CAN bus.
Preferably, the master device is a CPU.
The invention also discloses a double-path serial bus switching method, which comprises the following steps:
when the first serial bus is switched, the master device controls a first single-pole double-throw analog switch and a second single-pole double-throw analog switch to simultaneously switch signals, the first single-pole double-throw analog switch outputs a clock signal of the first serial bus, and the second single-pole double-throw analog switch outputs a data signal of the first serial bus;
when the second serial bus is switched, the master device controls the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to simultaneously switch signals, the first single-pole double-throw analog switch outputs a clock signal of the second serial bus, and the second single-pole double-throw analog switch outputs a data signal of the second serial bus.
Preferably, the clock signal line and the data signal line of the first serial bus are respectively connected with the first input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch, and the clock signal line and the data signal line of the second serial bus are respectively connected with the second input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch.
Preferably, the master device controls the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to switch signals simultaneously through the same control signal.
Preferably, the first serial bus and the second serial bus are both selected from I 2 C. SMBus bus or CAN bus.
Preferably, the master device is a CPU.
The invention has the beneficial effects that:
the invention realizes the switching of the serial bus by adopting the single-pole double-throw analog switch without using a special bus switching chip and designing a logic driving code, so that the hardware design of the double-wire bus switching system can be further simplified, and the hardware design cost can be further reduced. Meanwhile, the single-pole double-throw analog switch has the characteristics of low time delay and quick switching, so that the synchronization of a clock signal and a data signal cannot be influenced in the serial bus switching process.
Drawings
FIG. 1 is a block diagram of a two-way serial bus switching system according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a two-way serial bus switching method according to an embodiment of the invention.
Detailed Description
The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the present invention.
The double-path serial bus switching system based on the single-pole double-throw analog switch disclosed by the invention can realize the switching of the bus without using a special bus switching chip or designing a logic driving code.
As shown in fig. 1, a two-way serial bus switching system based on a single-pole double-throw analog switch according to an embodiment of the present invention includes a first serial bus, a second serial bus, a first single-pole double-throw analog switch, a second single-pole double-throw analog switch, a master device, and a slave device. Specifically, the first serial bus and the second serial bus are used for information transmission, and each of the first serial bus and the second serial bus comprises a clock signal line and a data signal line, wherein the data signal line is used for data transmission, and the clock signal line is used for controlling the data signal line to transmit data.
The first single-pole double-throw analog Switch (SPDT) and the second single-pole double-throw analog Switch (SDPT) are used for switching signals and are respectively provided with a first input interface (CH 1), a second input interface (CH 2), a control signal input interface (CTR) and an output interface (OUT), the first single-pole double-throw analog switch is used for switching clock signals, and the second single-pole double-throw analog switch is used for switching data signals.
The master device is used for managing the slave devices and controlling the switching among buses through a serial Bus, and is provided with a first serial Bus interface (Bus 1), a second serial Bus interface (Bus 2) and a control signal output interface (GPIO), wherein the first serial Bus interface of the master device is respectively connected with a first single-pole double-throw analog switch and a second single-pole double-throw analog switch through the first serial Bus, the second serial Bus interface is respectively connected with the first single-pole double-throw analog switch and the second single-pole double-throw analog switch through the second serial Bus, and the control signal output interface (GPIO) is respectively connected with the first single-pole double-throw analog switch and the second single-pole double-throw analog switch, the first serial Bus interface is connected with a first input interface of the first single-pole double-throw analog switch through a clock signal line of the first serial Bus, a data signal line is connected with a first input interface of the second single-pole double-throw analog switch, the second serial Bus interface is connected with a second input interface of the first single-pole double-throw analog switch through a clock signal line of the second serial Bus, the data signal line is connected with a second input interface of the second single-pole double-throw analog switch, and a control signal output interface is respectively connected with control signal input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch.
The slave device is respectively connected with the output interfaces of the first single-pole double-throw analog switch and the first single-pole double-throw analog switch.
When the first serial bus is switched, the master device inputs a first bus switching signal to both the first single-pole double-throw analog switch and the second single-pole double-throw analog switch through the control signal output interface, and after the first single-pole double-throw analog switch receives the first bus switching signal through the control signal input interface on the first single-pole double-throw analog switch, the first single-pole double-throw analog switch switches the clock signal to enable the first single-pole double-throw analog switch to output the clock signal of the first serial bus. Meanwhile, after the second single-pole double-throw analog switch receives the first bus switching signal through the control signal input interface on the second single-pole double-throw analog switch, the second single-pole double-throw analog switch switches the data signal to enable the second single-pole double-throw analog switch to output the data signal of the first serial bus to the outside, and therefore switching of the output bus to the first serial bus is achieved.
When the second serial bus is switched, the master device inputs a second bus switching signal to the first single-pole double-throw analog switch and the second single-pole double-throw analog switch through the control signal output interface, and after the first single-pole double-throw analog switch receives the second bus switching signal through the control signal input interface on the first single-pole double-throw analog switch, the first single-pole double-throw analog switch switches the clock signal to enable the first single-pole double-throw analog switch to output the clock signal of the second serial bus to the outside. Meanwhile, after the second single-pole double-throw analog switch receives a second bus switching signal through a control signal input interface on the second single-pole double-throw analog switch, the second single-pole double-throw analog switch switches the data signal to enable the second single-pole double-throw analog switch to output the data signal of a second serial bus to the outside, and therefore switching of the output bus to the second serial bus is achieved.
In this embodiment, the control signal input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch are respectively connected to the control signal output interface of the master device, that is, the first single-pole double-throw analog switch and the second single-pole double-throw analog switch are controlled by the same control signal, and the master device can control the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to simultaneously switch signals, thereby ensuring the time sequence of the serial bus. Of course, in other embodiments, the control signal input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch may be respectively connected to different control signal output interfaces of the master device, but the master device is required to be able to control the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to switch signals at the same time.
Further, in this embodiment, the first serial bus may be selected from I 2 C (Inter-Integrated Circuit), SMBus (System Management Bus) Bus, and CAN (controller area network) Bus, and similarly, the second serial Bus may also be selected from one of I2C, SMBus Bus, and CAN Bus, and may be selected according to actual requirements during implementation.
Further, in this embodiment, the main device is preferably a CPU, and in other embodiments, other chips or modules capable of managing and supporting a serial bus may be selected.
As shown in fig. 2, the present invention also discloses a method for implementing dual serial bus switching by the dual serial bus switching system, which comprises the following steps:
when the first serial bus is switched, the master device controls a first single-pole double-throw analog switch and a second single-pole double-throw analog switch to simultaneously switch signals, the first single-pole double-throw analog switch outputs a clock signal of the first serial bus, and the second single-pole double-throw analog switch outputs a data signal of the first serial bus;
when the second serial bus is switched, the master device controls the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to simultaneously switch signals, the first single-pole double-throw analog switch outputs a clock signal of the second serial bus, and the second single-pole double-throw analog switch outputs a data signal of the second serial bus.
Specifically, when the dual-path serial bus switching system switches the first serial bus, the master device inputs a first bus switching signal to both the first single-pole double-throw analog switch and the second single-pole double-throw analog switch through the control signal output interface, and after the first single-pole double-throw analog switch receives the first bus switching signal through the control signal input interface on the first single-pole double-throw analog switch, the first single-pole double-throw analog switch switches the clock signal to enable the first single-pole double-throw analog switch to output the clock signal of the first serial bus. Meanwhile, after the second single-pole double-throw analog switch receives the first bus switching signal through the control signal input interface on the second single-pole double-throw analog switch, the second single-pole double-throw analog switch switches the data signal to enable the second single-pole double-throw analog switch to output the data signal of the first serial bus to the outside, and therefore switching of the output bus to the first serial bus is achieved.
When the double-path serial bus switching system switches the second serial bus, the main device inputs a second bus switching signal to the first single-pole double-throw analog switch and the second single-pole double-throw analog switch through the control signal output interface, and after the first single-pole double-throw analog switch receives the second bus switching signal through the control signal input interface on the first single-pole double-throw analog switch, the first single-pole double-throw analog switch switches the clock signal to enable the first single-pole double-throw analog switch to output the clock signal of the second serial bus to the outside. Meanwhile, after the second single-pole double-throw analog switch receives a second bus switching signal through a control signal input interface on the second single-pole double-throw analog switch, the second single-pole double-throw analog switch switches the data signal to enable the second single-pole double-throw analog switch to output the data signal of a second serial bus to the outside, and therefore switching of the output bus to the second serial bus is achieved.
The invention realizes the switching of the serial bus by adopting the single-pole double-throw analog switch without using a special bus switching chip and designing a logic driving code, so that the hardware design of the double-wire bus switching system can be further simplified, and the hardware design cost can be further reduced. Meanwhile, the single-pole double-throw analog switch has the characteristics of low time delay and quick switching, so that the synchronization of a clock signal and a data signal cannot be influenced in the serial bus switching process.
Therefore, the scope of the present invention should not be limited to the disclosure of the embodiments, but includes various alternatives and modifications without departing from the scope of the present invention, which is defined by the claims of the present patent application.
Claims (10)
1. A two-way serial bus switching system based on a single-pole double-throw analog switch, the two-way serial bus switching system comprising:
the first single-pole double-throw analog switch is used for switching clock signals;
the second single-pole double-throw analog switch is used for switching data signals;
the first serial bus and the second serial bus respectively comprise a clock signal line and a data signal line;
the master device is connected with the input end of the first single-pole double-throw analog switch through clock signal lines of a first serial bus and a second serial bus respectively, and connected with the input end of the second single-pole double-throw analog switch through data signal lines of the first serial bus and the second serial bus respectively, and is used for controlling the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to switch simultaneously when the first serial bus is switched, so that the first single-pole double-throw analog switch outputs a clock signal of the first serial bus, and the second single-pole double-throw analog switch outputs a data signal of the first serial bus; when the second serial bus is switched, the first single-pole double-throw analog switch and the second single-pole double-throw analog switch are controlled to be switched simultaneously, so that the first single-pole double-throw analog switch outputs a clock signal of the second serial bus, and the second single-pole double-throw analog switch outputs a data signal of the second serial bus;
and the slave equipment is respectively connected with the output ends of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch.
2. The two-way serial bus switching system of claim 1, wherein the first single-pole double-throw analog switch and the second single-pole double-throw analog switch each comprise a first input interface, a second input interface, and an output interface; the master device is connected with a first input interface of the first single-pole double-throw analog switch through a clock signal line of a first serial bus, connected with a first input interface of the second single-pole double-throw analog switch through a data signal line, connected with a second input interface of the first single-pole double-throw analog switch through a clock signal line of a second serial bus, and connected with a second input interface of the second single-pole double-throw analog switch through a data signal line.
3. The two-way serial bus switching system according to claim 1, wherein the master device has a control signal output interface, the first and second spdt analog switches each have a control signal input interface, and the control signal input interfaces of the first and second spdt analog switches are connected to the control signal output interface of the master device.
4. The dual serial bus switching system of claim 1, wherein the first serial bus and the second serial bus are both selected from I 2 C. SMBus bus or CAN bus.
5. The two-way serial bus switching system of claim 1, wherein the master device is a CPU.
6. A two-way serial bus switching method of the two-way serial bus switching system according to claim 1, wherein the two-way serial bus switching method comprises the steps of:
when the first serial bus is switched, the master device controls a first single-pole double-throw analog switch and a second single-pole double-throw analog switch to simultaneously switch signals, the first single-pole double-throw analog switch outputs a clock signal of the first serial bus, and the second single-pole double-throw analog switch outputs a data signal of the first serial bus;
when the second serial bus is switched, the master device controls the first single-pole double-throw analog switch and the second single-pole double-throw analog switch to simultaneously switch signals, the first single-pole double-throw analog switch outputs a clock signal of the second serial bus, and the second single-pole double-throw analog switch outputs a data signal of the second serial bus.
7. The two-way serial bus switching method according to claim 6, wherein the clock signal line and the data signal line of the first serial bus are connected to the first input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch, respectively, and the clock signal line and the data signal line of the second serial bus are connected to the second input interfaces of the first single-pole double-throw analog switch and the second single-pole double-throw analog switch, respectively.
8. The two-way serial bus switching method according to claim 6, wherein the master device controls the first SPDT analog switch and the second SPDT analog switch to switch signals simultaneously through the same control signal.
9. The two-way serial bus switching method of claim 6, wherein the first serial bus and the second serial bus are both selected from I 2 C. SMBus bus or CAN bus.
10. The two-way serial bus switching method of claim 6, wherein the master device is a CPU.
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| CN202110937228.3A CN115905073A (en) | 2021-08-16 | 2021-08-16 | Double-path serial bus switching system and method based on single-pole double-throw analog switch |
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| CN202110937228.3A CN115905073A (en) | 2021-08-16 | 2021-08-16 | Double-path serial bus switching system and method based on single-pole double-throw analog switch |
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