CN115904839A

CN115904839A - Memory bandwidth detection method, device, equipment and storage medium

Info

Publication number: CN115904839A
Application number: CN202211429660.2A
Authority: CN
Inventors: 常甜甜; 秦晓宁; 陈颖
Original assignee: Nettrix Information Industry Beijing Co Ltd
Current assignee: Nettrix Information Industry Beijing Co Ltd
Priority date: 2022-11-15
Filing date: 2022-11-15
Publication date: 2023-04-04

Abstract

The embodiment of the invention discloses a method, a device, equipment and a storage medium for detecting memory bandwidth, wherein the method is applied to a self-checking tool, and comprises the following steps: calling a memory viewing tool carried by the system to view memory information under the system; calling a search tool to screen the real-time frequency of the memory from the memory information; determining the optimal actual value of the memory bandwidth by calling a plurality of compiling models; and determining the performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency. The technical scheme provided by the embodiment of the invention automatically realizes the calculation of the performance efficiency of the memory bandwidth, and can improve the detection efficiency of the memory bandwidth condition.

Description

Memory bandwidth detection method, device, equipment and storage medium

Technical Field

The present invention relates to the technical field of servers, and in particular, to a method, an apparatus, a device, and a storage medium for detecting a memory bandwidth.

Background

Memory is the focus of server performance. The memory is a bridge for communication between computers, all data entering and exiting a Central Processing Unit (CPU) need to pass through the memory, and the memory can temporarily store operation data in the CPU and exchange data with external memories such as a hard disk. The performance of the memory affects the processing speed and the running speed of the whole server, so it is important to automatically acquire the bandwidth of the memory without consuming manpower.

For each different server, the corresponding memory parameters are substantially different. In the related art, if the performance of the memory needs to be judged, a plurality of parameters of the memory need to be manually acquired or calculated, so that the performance efficiency of the memory bandwidth is calculated, and time and labor are wasted.

Disclosure of Invention

Embodiments of the present invention provide a method, an apparatus, a device, and a storage medium for detecting a memory bandwidth, which can automatically implement calculation of performance efficiency of the memory bandwidth, and improve detection efficiency of a memory bandwidth condition.

In a first aspect, an embodiment of the present invention provides a method for detecting a memory bandwidth, where the method is applied to a self-test tool, and the method includes:

calling a memory viewing tool carried by the system to view memory information under the system;

calling a search tool to screen the real-time frequency of the memory from the memory information;

determining the optimal actual value of the memory bandwidth by calling a plurality of compiling models;

and determining the performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency.

Optionally, the determining the optimal actual value of the memory bandwidth by invoking multiple compiling models includes:

calling multiple compiling models to respectively capture actual values of memory bandwidth;

and analyzing the actual values respectively captured to obtain the optimal actual value of the memory bandwidth.

According to the technical scheme, the actual values of the memory bandwidth are respectively captured by calling various compiling models, and the actual values are analyzed to obtain the optimal actual value of the memory bandwidth, so that the memory bandwidth can be optimized, and the performance of the memory is improved.

Optionally, the determining the performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency includes:

and determining a theoretical value of the memory bandwidth based on the real-time frequency, and determining the performance efficiency of the memory bandwidth based on the optimal actual value and the theoretical value.

According to the technical scheme, the theoretical value of the memory bandwidth is determined through the real-time frequency, the performance efficiency of the memory bandwidth is determined based on the theoretical value and the optimal actual value, the theoretical value and the performance efficiency of the memory bandwidth can be automatically calculated, and the detection efficiency is improved.

Optionally, the memory view tool comprises a dmidreode tool; the search tool comprises a grep tool;

the compilation model comprises: a stream _ omp _ purley coding model, a stream _ exe coding model, and a stream _ omp coding model.

According to the technical scheme, the memory viewing tool comprises a dmidcode tool, the searching tool comprises a grep tool, the calling cost can be reduced, the data can be conveniently obtained, and the memory bandwidth can be optimized by the compiling model comprising a stream _ omp _ purley compiling model, a stream _ exe compiling model and a stream _ omp compiling model.

Optionally, the self-checking tool is embedded in the system through an editing window in the system.

According to the technical scheme, the self-checking tool is embedded into the system through the editing window in the system, so that the development cost can be reduced.

Optionally, the method further includes:

and judging the performance of the memory based on the performance efficiency, or judging whether the memory is matched with the server based on the performance efficiency.

According to the technical scheme, the performance optimization of the memory is judged through the performance efficiency, or whether the memory is matched with the server is judged, so that the judgment on the performance of the memory can be automatically realized.

Optionally, the determining whether the memory is matched with the server based on the performance efficiency includes:

and if the performance efficiency is matched with the electronic device in the server, judging that the memory is matched with the server.

According to the technical scheme, the matching of the memory and the server is judged through the matching of the performance efficiency and the electronic devices in the server, and the matching efficiency can be improved.

In a second aspect, an embodiment of the present invention provides a memory detection apparatus configured on a self-test tool, where the apparatus includes:

the first calling module is used for calling a memory checking tool carried by the system to check the memory information under the system;

the second calling module is used for calling a searching tool to screen the real-time frequency of the memory from the memory information;

the first determining module is used for determining the optimal actual value of the memory bandwidth by calling a plurality of compiling models;

a second determining module, configured to determine performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency.

In a third aspect, an embodiment of the present invention provides an electronic device, where the electronic device includes:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,

the memory stores a computer program executable by the at least one processor, the computer program being executable by the at least one processor to enable the at least one processor to perform the method provided by the embodiments of the present invention.

In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, where computer instructions are stored, and the computer instructions are configured to, when executed, cause a processor to implement a method provided by an embodiment of the present invention.

According to the technical scheme of the embodiment of the invention, the memory information under the system is checked by calling the memory checking tool carried by the system through the self-checking tool, the real-time frequency of the memory is screened from the memory information by calling the searching tool through the self-checking tool, the self-checking tool determines the optimal actual value of the memory bandwidth by calling various compiling models, so that the performance efficiency of the memory bandwidth is determined through the optimal actual value and the real-time frequency, namely, the memory checking tool and the searching tool are called through the self-checking tool, the calling of various compiling models is realized, the performance efficiency of the memory bandwidth is automatically calculated, and the detection efficiency of the memory bandwidth condition can be improved.

It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present invention, nor do they necessarily limit the scope of the invention. Other features of the present invention will become apparent from the following description.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a flowchart of a method for detecting a memory bandwidth according to an embodiment of the present invention;

fig. 2a is a flowchart of a method for detecting a memory bandwidth according to an embodiment of the present invention;

FIG. 2b is a diagram showing four operations of Copy, scale, add and Triad;

fig. 2c is a flowchart of a method for detecting a memory bandwidth according to an embodiment of the present invention;

fig. 3 is a block diagram of a structure of a device for detecting memory bandwidth according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in other sequences than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Fig. 1 is a flowchart of a method for detecting a memory bandwidth according to an embodiment of the present invention, where the method may be executed by a device for detecting a memory bandwidth, where the device may be implemented by software and/or hardware, and the method is applied to a self-checking tool, where the self-checking tool is embedded in a system, and the method is applied in a scenario of detecting a memory bandwidth condition of a server or in a scenario of determining a memory performance.

As shown in fig. 1, the technical solution provided by the embodiment of the present invention includes:

s110: and calling a memory viewing tool carried by the system to view the memory information under the system.

In an embodiment of the present invention, the system may be a Linux system. Optionally, the memory viewing tool may be a dmidcode tool, by which memory information of a server under the system can be viewed. The memory information includes real-time frequency, maximum voltage, minimum voltage, and the like.

In the embodiment of the invention, the self-checking tool can be embedded in the system through the editing window in the system, specifically, the editing window of the system can be opened, the program code of the self-checking tool is edited through the editing window, and after the editing is finished, the self-checking tool is embedded in the system, so that the development cost can be reduced.

In the related technology, the memory checking tool is manually opened, and the memory information of the server is manually and one by one captured.

S120: and calling a search tool to screen the real-time frequency of the memory from the memory information.

In this embodiment of the present invention, optionally, the search tool may be a grep tool, where the grep tool is capable of searching for a specified pattern or keyword in one or more files. Optionally, in this embodiment, a search tool may be called through an interface of the self-checking tool, and the real-time frequency of the memory is screened from the memory information.

In the related art, by opening the grep tool, keywords are manually input, so that the real-time frequency of the memory is screened, time and labor are wasted, and the method is more inconvenient particularly when the memory is more. The embodiment of the invention can automatically realize the screening of the real-time frequency and improve the screening efficiency by calling the search tool to screen the real-time frequency of the memory from the memory information through the self-checking tool.

S130: and determining the optimal actual value of the memory bandwidth by calling various compiling models.

In this embodiment of the present invention, optionally, the coding model may include a stream _ omp _ purley coding model, a stream _ exe coding model, and a stream _ omp coding model.

In the embodiment of the invention, various compiling models can be called by the self-checking tool to capture the actual values of the memory bandwidth, and the optimal actual value of the memory bandwidth is determined according to each actual value. The optimal actual value of the memory bandwidth is determined through different compiling models, performance optimization can be carried out on the memory bandwidth of the server, and the optimized memory bandwidth is obtained.

In the related art, the memory bandwidth is simply acquired through a Stream tool, and the memory bandwidth is not optimized, wherein the Stream is used for testing the memory bandwidth of a high-performance computer by generating memory read-write operations in four different modes. In the embodiment of the invention, the optimal actual value of the memory bandwidth is determined through various compiling models, the memory bandwidth is optimized, and the optimized memory bandwidth can be obtained.

S140: and determining the performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency.

In this embodiment of the present invention, the determining the performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency includes: and determining a theoretical value of the memory bandwidth based on the real-time frequency, and determining the performance efficiency of the memory bandwidth based on the optimal actual value and the theoretical value.

Specifically, the theoretical value of the memory bandwidth is calculated by the following formula:

Theo＝Freq×channel×8

the performance efficiency of the memory bandwidth is determined by the following formula:

Eff＝ACT÷Theo

wherein, the channels are the number of the channels in the server memory, and Eff is the performance efficiency of the memory bandwidth; freq is the real-time frequency; theo is a theoretical value of memory bandwidth.

In the embodiment of the invention, the theoretical value of the memory bandwidth and the performance efficiency are automatically calculated through a self-checking tool. In the related art, the theoretical value and the performance efficiency of the memory bandwidth are calculated manually, and the theoretical value and the performance efficiency of the memory bandwidth are calculated automatically through a self-checking tool, so that the time can be saved, and the calculation efficiency can be improved.

In the related art, the focus is on the storage performance of the server, and neglects the memory performance which is also important, the term memory is widely used to refer to Random Access Memory (RAM), which is used by the computer to store the instructions and data required for executing the operation, so that the Central Processing Unit (CPU) of the computer can read the instructions and data stored in the memory more quickly. From the architecture of the server, the storage hard disk is called "external memory" of the server, and the internal memory is some memories inside the server (on the motherboard) for storing intermediate data of the CPU operation and the final output result. The biggest difference from the external storage of the server is that all programs of the server are operated in the memory, and the size of the memory bandwidth can directly influence the data interaction speed of the server, namely, the performance of the server. The server external storage mainly plays a role in protecting data, preventing data loss and the like. Therefore, it is important to implement self-check of memory bandwidth in the server.

In the related art, for each different server, the corresponding memory frequency and the theoretical memory bandwidth are different, and if it is desired to determine the performance of the memory bandwidth, it is necessary to manually acquire the real-time frequency and manually calculate the theoretical value of the memory bandwidth used by the server. The embodiment of the invention realizes the acquisition of real-time frequency and the calculation of the theoretical value of the memory bandwidth through the automation of the self-checking tool, and improves the detection efficiency of the memory bandwidth condition.

Fig. 2a is a flowchart of a method for detecting a memory bandwidth according to an embodiment of the present invention, where in this embodiment, optionally, the determining an optimal actual value of the memory bandwidth by invoking multiple compiling models includes: calling multiple compiling models to respectively capture actual values of memory bandwidth;

and analyzing each captured actual value to obtain the optimal actual value of the memory bandwidth.

Optionally, the method may further include:

as shown in fig. 2a, the technical solution provided by the embodiment of the present invention includes:

s210: and calling a self-carried dmidrecode tool of the system to check the memory information under the system.

S220: and calling a grep tool to screen the real-time frequency of the memory from the memory information.

S230: and calling various compiling models to respectively capture the actual values of the memory bandwidth.

In an embodiment of the present invention, a model may be compiled comprising: the stream _ omp _ purley coding model, the stream _ exe coding model and the stream _ omp coding model. In this embodiment, the self-test tool may capture an actual value of the memory bandwidth of the server through the stream _ omp _ purley compilation model, the stream _ exe compilation model, and the stream _ omp compilation model.

S240: and analyzing the actual values respectively captured to obtain the optimal actual value of the memory bandwidth.

In the embodiment of the invention, the real-time values of the memory bandwidth captured by each compiling model are automatically analyzed through a self-checking tool, wherein each result comprises four stream operations of Copy, scale, add and triple, the result is subjected to 3 × 4 matrix analysis, and finally, the optimal performance value, namely the optimal actual value of the memory bandwidth at the same time is output. Of these, copy, scale, add, and Triad four stream operations can be referred to fig. 2b.

Where Copy may be a Copy of an array, an operation of the Stream test requires access to memory twice. A number is read from one memory cell and copied to another memory cell. Scale can be a scaling of an array, an operation of a Stream test that requires accessing memory twice, reading a number from one memory location, multiplying by a constant, and writing the result to another memory location. Add may be a vector summation of arrays, an operation that requires three accesses to memory (two read operations, one write operation) for a Stream test. And respectively reading two numbers from the two memory units, and writing the obtained result into the other memory unit after adding the two numbers. The Triad may be a composite vector summation of arrays, an operation that requires three accesses to memory for a Stream test. Reading a number from the memory, multiplying the number by a constant to obtain a product, reading a number from another memory cell, adding the product to the number, and writing the result into the memory.

Therefore, actual values of the memory bandwidth are captured by calling multiple models, the actual values captured respectively are analyzed, the optimal actual value of the memory bandwidth is obtained, the memory bandwidth can be optimized, the accurate memory bandwidth is obtained, and therefore the performance of the memory is analyzed more accurately.

S250: and determining the performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency.

S260: and judging the performance of the memory based on the performance efficiency, or judging whether the memory is matched with the server based on the performance efficiency.

In the embodiment of the present invention, if the performance efficiency is higher, it indicates that the performance of the memory is better.

In this embodiment of the present invention, optionally, the determining whether the memory is matched with the server based on the performance efficiency includes: and if the performance efficiency is matched with the electronic device in the server, judging that the memory is matched with the server. The electronic devices in the server may include a Central Processing Unit (CPU), a PCIE bus, and the like. The main consideration for judging whether the memory is matched with the server is whether the performance efficiency is matched with the CPU. Optionally, the performance efficiency of the memory is higher and can be matched with a CPU with higher performance.

Therefore, the performance of the memory can be automatically judged by judging the performance of the memory through the performance efficiency or judging whether the memory is matched with the server or not based on the performance efficiency.

It should be noted that, in the embodiment of the present invention, the S210 to the S260 are exemplarily configured as one embodiment, which is only one example of the present invention, and in other embodiments of the present invention, the S210 to the S250 may also be configured as an embodiment, so as to automatically achieve the performance efficiency of obtaining the memory.

Fig. 2c may also be referred to in the technical solutions provided in the embodiments of the present invention. As shown in fig. 2c, memory information under the system is output by calling the dmidrecode tool, and the real-time frequency of the memory is output by calling the grep tool; the method comprises the steps of calling a stream _ omp _ purley compiling model, a stream _ exe compiling model and a stream _ omp compiling model, automatically calculating the optimal actual value of the output memory bandwidth, and calculating the performance efficiency of the memory bandwidth according to the real-time frequency and the optimal actual value of the memory bandwidth, so that the calculation of the performance efficiency of the memory bandwidth can be automatically realized, and the detection efficiency of the memory bandwidth is improved.

Fig. 3 is a block diagram of a memory inspection apparatus according to an embodiment of the present invention, where the apparatus is configured in a self-inspection tool, and the apparatus shown in fig. 3 includes: a first calling module 310, a second calling module 320, a first determining module 330, and a second determining module 340.

The first calling module 310 is configured to call a memory viewing tool provided by the system to view memory information in the system;

the second calling module 320 is configured to call a search tool to screen a real-time frequency of a memory from the memory information;

a first determining module 330, configured to determine an optimal actual value of the memory bandwidth;

a second determining module 340, configured to determine performance efficiency of the memory bandwidth based on the best practice value and the real-time frequency.

Optionally, the determining an optimal actual value of the memory bandwidth by calling multiple compiling models includes:

Optionally, the determining performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency includes:

Optionally, the method further includes:

The device provided by the embodiment of the invention can execute the method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.

FIG. 4 illustrates a block diagram of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.

As shown in fig. 4, the electronic device 10 includes at least one processor 11, and a memory communicatively connected to the at least one processor 11, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, and the like, wherein the memory stores a computer program executable by the at least one processor, and the processor 11 can perform various suitable actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from a storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data necessary for the operation of the electronic apparatus 10 may also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.

A number of components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, or the like; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.

The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The processor 11 performs the various methods and processes described above, such as the memory bandwidth detection method.

In some embodiments, the memory bandwidth detection method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the above-described memory bandwidth detection method may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the memory bandwidth detection method in any other suitable manner (e.g., by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), system on a chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.

A computer program for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be performed. A computer program can execute entirely on a machine, partly on a machine, as a stand-alone software package partly on a machine and partly on a remote machine or entirely on a remote machine or server.

In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user may provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.

The computing system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical host and VPS service are overcome.

It should be understood that various forms of the flows shown above, reordering, adding or deleting steps, may be used. For example, the steps described in the present invention may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired result of the technical solution of the present invention can be achieved.

The above-described embodiments should not be construed as limiting the scope of the invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for detecting memory bandwidth is applied to a self-checking tool, and is characterized in that the method comprises the following steps:

2. The method of claim 1, wherein determining the optimal actual value of memory bandwidth by invoking a plurality of compilation models comprises:

calling multiple compiling models to respectively capture the actual values of the memory bandwidth;

3. The method of claim 1, wherein determining the performance efficiency of the memory bandwidth based on the best practice value and the real-time frequency comprises:

4. The method of claim 1,

the memory view tool comprises a dmidreode tool; the search tool comprises a grep tool;

the compilation model comprises: the stream _ omp _ purley coding model, the stream _ exe coding model and the stream _ omp coding model.

5. The method of claim 1, wherein the self-test tool is embedded in the system through an editing window in the system.

6. The method of claim 1, further comprising:

7. The method of claim 6, wherein said determining whether memory matches the server based on the performance efficiency comprises:

8. A memory test device configured for use with a self-test tool, the device comprising:

and the second determining module is used for determining the performance efficiency of the memory bandwidth based on the optimal actual value and the real-time frequency.

9. An electronic device, characterized in that the electronic device comprises:

at least one processor; and

the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-7.

10. A computer-readable storage medium storing computer instructions for causing a processor to perform the method of any one of claims 1-7 when executed.