CN116401113B - Environment verification method, device and medium for heterogeneous many-core architecture acceleration card - Google Patents

Environment verification method, device and medium for heterogeneous many-core architecture acceleration card Download PDF

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CN116401113B
CN116401113B CN202310679650.2A CN202310679650A CN116401113B CN 116401113 B CN116401113 B CN 116401113B CN 202310679650 A CN202310679650 A CN 202310679650A CN 116401113 B CN116401113 B CN 116401113B
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environment
item information
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detection item
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CN116401113A (en
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张介环
李宇轩
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Taichu Wuxi Electronic Technology Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3664—Environments for testing or debugging software
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3668—Software testing
    • G06F11/3672—Test management
    • G06F11/3688—Test management for test execution, e.g. scheduling of test suites
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3668—Software testing
    • G06F11/3672—Test management
    • G06F11/3692—Test management for test results analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44521—Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
    • G06F9/44526—Plug-ins; Add-ons
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention discloses an environment verification method, device and medium for a heterogeneous many-core architecture acceleration card. Determining a command analysis result by acquiring and analyzing a command to be analyzed; acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result; and acquiring at least one target plug-in corresponding to the target query result, and respectively verifying each target plug-in until all target plug-ins are traversed, so as to generate a verification result. The method solves the problems of low efficiency and low accuracy of environment verification of the heterogeneous many-core architecture acceleration card in a manual mode, simplifies the steps of environment verification, improves the accuracy and efficiency of environment verification, and reduces the labor cost and the time cost.

Description

Environment verification method, device and medium for heterogeneous many-core architecture acceleration card
Technical Field
The present invention relates to the field of data processing technologies, and in particular, to an environment verification method, apparatus, and medium for a heterogeneous many-core architecture accelerator card.
Background
The ultra-high-speed computing power provided by the heterogeneous many-core architecture plays a great role in the fields requiring a large amount of computation such as artificial intelligence, deep learning and the like, and the heterogeneous many-core architecture acceleration card is also in vigorous development. Therefore, it is also important to accelerate the environment verification of cards for heterogeneous many-core architectures.
The inventors have found that the following drawbacks exist in the prior art in the process of implementing the present invention: at present, whether the software and hardware environment of the heterogeneous many-core framework accelerator card is correct or not is judged, and most of the software and hardware environment is checked by manual mode, which has a small challenge for upper layer application software developers. On the one hand, because the upper layer developer basically uses the computing service by calling the runtime interface library, the dependency relationship between the lower layer libraries is not clear. On the other hand, when the hardware is abnormal or does not meet the requirement, the method is still handy, and whether the software problem or the hardware problem is difficult to locate. Therefore, when the upper layer application software fails to run or has abnormal performance, developers in a plurality of technical fields organizing a plurality of departments need to check together, which consumes a great deal of manpower and energy, and most of such problems are caused by incorrect configuration of software environment or unsatisfied requirements of hardware.
Disclosure of Invention
The invention provides an environment verification method, device and medium for a heterogeneous many-core architecture acceleration card, which are used for improving the accuracy and efficiency of environment verification and reducing the labor cost and the time cost.
According to one aspect of the invention, an environment verification method of a heterogeneous many-core architecture acceleration card is provided, wherein the environment verification method comprises the following steps:
acquiring and analyzing a command to be analyzed, and determining a command analysis result;
acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result;
and acquiring at least one target plug-in corresponding to the target query result, and respectively verifying each target plug-in until all target plug-ins are traversed, so as to generate a verification result.
According to another aspect of the present invention, there is provided an environment verification device for a heterogeneous many-core architecture accelerator card, including:
the command analysis result determining module is used for acquiring and analyzing a command to be analyzed and determining a command analysis result;
the target query result determining module is used for acquiring at least one item of detection item information of the command analysis result, and querying in a pre-built heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information to determine a target query result;
And the verification result generation module is used for acquiring at least one target plugin corresponding to the target query result, and respectively verifying each target plugin until all target plugins are traversed, so as to generate a verification result.
According to another aspect of the present invention, there is provided an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the environment verification method of the heterogeneous many-core architecture accelerator card according to any embodiment of the present invention when executing the computer program.
According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the environment verification method of the heterogeneous many-core architecture accelerator card according to any of the embodiments of the present invention when executed.
According to the technical scheme, the command analysis result is determined by acquiring and analyzing the command to be analyzed; acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result; and acquiring at least one target plug-in corresponding to the target query result, and respectively verifying each target plug-in until all target plug-ins are traversed, so as to generate a verification result. The method solves the problems of low efficiency and low accuracy of environment verification of the heterogeneous many-core architecture acceleration card in a manual mode, simplifies the steps of environment verification, improves the accuracy and efficiency of environment verification, and reduces the labor cost and the time cost.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of an environment verification method for a heterogeneous many-core architecture acceleration card according to an embodiment of the present invention.
Fig. 2 is a flowchart of an environment verification method of another heterogeneous many-core architecture accelerator card according to a second embodiment of the present invention.
Fig. 3 is a schematic structural diagram of an environment verification device for a heterogeneous many-core architecture acceleration card according to a third embodiment of the present invention.
Fig. 4 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "target," "current," and the like in the description and claims of the present invention and the above-described drawings are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a flowchart of an environment verification method for a heterogeneous many-core architecture accelerator card according to an embodiment of the present invention, where the embodiment is applicable to a case of verifying an environment in a heterogeneous many-core architecture accelerator card, the method may be performed by an environment verification device of the heterogeneous many-core architecture accelerator card, and the environment verification device of the heterogeneous many-core architecture accelerator card may be implemented in a form of hardware and/or software.
Accordingly, as shown in fig. 1, the method includes:
s110, acquiring and analyzing a command to be analyzed, and determining a command analysis result.
The command to be parsed may be a command that needs to perform environment verification after receiving an input.
Specifically, the command to be analyzed is sent and received in a command line mode, different functional modules are designed in a plug-in mode, call processing of different modules can be carried out according to requirements, memory can be saved to the greatest extent, and the device has strong flexibility and expandability. The command analysis result may be an analysis result obtained by analyzing the command to be analyzed.
For example, assume that the command analysis result is 3 pieces of detection item information, which are respectively hardware parameter inspection, hardware stability monitoring, and PCIE (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) link authentication, by performing analysis processing on the command to be analyzed.
S120, obtaining at least one item of detection item information of the command analysis result, and inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information to determine a target inquiry result.
The detection item information can be divided into hardware environment detection, software environment detection and reference environment test; the detection item information can be matched and inquired in a heterogeneous many-core architecture accelerator card environment detection item database. The heterogeneous many-core architecture accelerator card environment test item database may be a database storing a plurality of test item information and configuration parameters. The target query result may be a query result obtained by matching according to the detection item information.
Specifically, the target query result includes target detection item information and configuration parameters corresponding to the target detection item information.
Optionally, the hardware environment detection is hardware parameter inspection, hardware stability monitoring and PCIE link authentication; the software environment detection is software package detection and firmware detection; the reference environment test is a pressure test, a memory bandwidth reference test and a P2P bandwidth reference test.
The hardware parameter detection is to detect the hardware parameters of the heterogeneous many-core architecture acceleration card; the software environment detection is the detection of the running software environment of the heterogeneous many-core architecture acceleration card; the reference environment detection is to detect the installation terminal equipment or the server equipment corresponding to the heterogeneous many-core architecture acceleration card.
S130, acquiring at least one target plug-in corresponding to the target query result, and respectively verifying each target plug-in until all target plug-ins are traversed, so as to generate a verification result.
The target plug-ins can be plug-ins which are matched with the target query results respectively, and can be used for verifying the plug-ins to obtain corresponding verification results. The verification result may include the verification result of all target plugins, the result of visual feedback in the form of a detection report.
For example, assuming that the target query result corresponds to 3 target plugins, namely, target plugin 1, target plugin 2 and target plugin 3, the 3 target plugins are respectively verified, so as to determine a verification result.
Optionally, the target query result includes target detection item information and configuration parameters corresponding to the target detection item information; the step of obtaining at least one target plugin corresponding to the target query result, and verifying each target plugin respectively until all target plugins are traversed, and generating a verification result comprises the following steps: respectively obtaining target plug-ins corresponding to the target detection item information; and respectively verifying each target plug-in according to the configuration parameters until all target plug-ins are traversed, and generating a verification result.
Wherein the configuration parameter may be parameter information describing target detection item information.
In this embodiment, the target query result includes target detection item information and configuration parameters, and the loading process of the target plug-in may be performed according to the target detection item information, and after the target plug-in is loaded, verification of the target plug-in is performed according to the configuration parameters, so as to obtain a verification result.
Optionally, the verifying each target plugin according to the configuration parameters respectively until all target plugins are traversed, and generating a verification result includes: sequentially acquiring a current target plug-in from all target plug-ins; and acquiring the current configuration parameters corresponding to the current target plug-in, and verifying the current target plug-in until all target plug-in is traversed, so as to generate a verification result.
The current target plug-in may be a randomly selected target plug-in. The current configuration parameters may be configuration parameters that match the current target plug-in.
In the previous example, it is assumed that the target query results are the target plugin 1, the target plugin 2 and the target plugin 3, respectively, and the target plugin 1 corresponds to the current configuration parameter 1, the target plugin 2 corresponds to the current configuration parameter 2 and the target plugin 3 corresponds to the current configuration parameter 3.
If the target plugin 1 is determined to be the current target plugin, acquiring a current configuration parameter 1 corresponding to the current target plugin, and performing verification processing on the target plugin 1 according to the current configuration parameter 1; and the target plugin 2 and the target plugin 3 are verified in the same way, and a verification result is generated.
Optionally, after the obtaining the current configuration parameter corresponding to the current target plug-in and verifying the current target plug-in, the method further includes: judging whether the current target plug-in passes the verification, if so, marking the current target plug-in as a normal item; if not, marking the current target plug-in as an abnormal item.
In this embodiment, after the target plugin is verified, it is further required to determine whether the target plugin passes the verification, and if so, determine that the current target plugin is a normal item, and otherwise is an abnormal item.
Optionally, before the obtaining at least one item of detection item information of the command analysis result and querying in a pre-built heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, determining a target query result, the method further includes: acquiring history detection item information and history configuration parameters matched with the history detection item information; classifying the history detection item information according to a preset environment detection type, and storing the history detection item information and the history configuration parameters according to a classification result to construct a heterogeneous many-core architecture acceleration card environment detection item database; wherein the environment detection type includes: hardware environment detection, software environment detection and reference environment test.
The history detection item information may be information of a detection item needed by the acceleration card history of the heterogeneous many-core architecture. The history configuration parameter may be a parameter configuration corresponding to the history detection item information. The environment detection type may describe the type of history detection item information and may include hardware environment detection, software environment detection, and benchmark environment testing. The classification result may be a result of classifying the history detection item information.
In this embodiment, the heterogeneous many-core architecture acceleration card environment detection item database is constructed by acquiring the history detection item information and the history configuration parameters, so as to perform matching processing of the detection item information, thereby obtaining the configuration parameters corresponding to the detection item information, and performing verification processing of the plug-in, so that the accuracy and the speed of environment verification can be improved.
In addition, the hardware environment detection mainly comprises three modules, namely hardware parameter detection, hardware stability monitoring and PCIE link identification.
Specifically, the hardware basic parameter check mainly includes firmware version of the accelerator card, master/slave core frequency, memory clock frequency, memory size, etc., so as to determine whether the most basic hardware information is correct. The driver can export the information to the file system, so that the information can be acquired in the user space, and convenience and rapidness are realized.
In addition, hardware stability monitoring needs to be used together with pressure testing, firstly, a user sets the load size of the accelerator card in a configuration file and the normal range value of each key parameter, and the verification tool applies the set load to the accelerator card according to the setting of the user. And then periodically acquiring key parameter information such as real-time temperature, frequency, voltage, current and the like, and judging whether the key parameter information exceeds a normal range. The method can be used for monitoring the fluctuation condition of each key parameter of the acceleration card under different loads, and if a plurality of cards exist, whether the performances of the different cards are consistent can be observed.
Furthermore, PCIE link monitoring mainly checks whether PCIE link bandwidth and PCIE channel number of the current system meet requirements of the accelerator card. Firstly, the user writes the minimum configuration requirement of the acceleration card in a configuration file, and the verification tool reads the actual configuration of the current system and compares the actual configuration with the configuration of the user so as to judge whether the current PCIE link meets the requirement of the acceleration card. Meanwhile, by combining with the pressure test, whether the power supply and the link bandwidth of the PCIE link have fluctuation under a given load or not can be dynamically monitored.
In this embodiment, the software environment detection includes a software package check and a firmware check.
Specifically, the upper layer application in the software package inspection depends on the runtime interface library, the runtime interface library depends on the driver, the driver is related to the acceleration card kernel, and the runtime is related to the compiler version. When the software package versions are inconsistent or incompatible, the upper layer application operation fails. If the software packages are manually detected to be installed correctly, the software packages are cumbersome and error-prone. Because of the existence of multiple software packages and the complex dependency relationships between each other, it is a cumbersome task if each software package dependency relationship is manually maintained by writing it in a configuration file. Therefore, the software and the version requirements of each software package can be written in the software installation package, and the information can be registered in the system at the same time when the software package is installed. When each software package is checked, the verification tool acquires the information of the dependent package and compares the information with the actual information in the system, so that whether the software is installed correctly can be judged.
Acceleration card drivers typically have a contract relationship with PCIE BAR space mappings, such as which BAR spaces to use and the size of each BAR space, and when the BAR space mappings do not meet the requirements, the BAR space mappings may also fail to be applied at the upper layer. The BAR map desired by the user may be written in a configuration file and the verification tool obtains the actual BAR spatial map and then compares it with the user configuration to verify whether the current actual configuration is signed for use.
The benchmark tests include a stress test, a memory bandwidth benchmark test, and a P2P bandwidth benchmark test. The method is mainly used for determining whether the performance of the accelerator card is abnormal.
Specifically, the stress test can be implemented by letting the accelerator card execute a matrix multiplier to take a certain load. The user first sets the desired load size in the configuration file and the verification tool steps up the matrix size until the user-set load is reached. The pressure test is mainly used for being matched with the monitoring module to dynamically monitor the fluctuation condition of each key parameter of the acceleration card under different loads, so that the stability of the acceleration card is detected.
In addition, the memory bandwidth reference test and the P2P reference are used for detecting whether the memory read-write performance of the accelerator card is abnormal or not. The user sets the range of each bandwidth detection sub-item in the configuration file, the verification tool obtains the actual bandwidth through H2D, D2H, P P and other operations, and then compares the actual bandwidth with the range set by the user in the configuration file, and if the actual bandwidth is abnormal, a warning is given. All the detection results can decide whether to generate a detection report according to the user setting.
According to the technical scheme, the command analysis result is determined by acquiring and analyzing the command to be analyzed; acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result; and acquiring at least one target plug-in corresponding to the target query result, and respectively verifying each target plug-in until all target plug-ins are traversed, so as to generate a verification result. The method solves the problems of low efficiency and low accuracy of environment verification of the heterogeneous many-core architecture acceleration card in a manual mode, simplifies the steps of environment verification, improves the accuracy and efficiency of environment verification, and reduces the labor cost and the time cost.
Example two
Fig. 2 is a flowchart of another environment verification method for a heterogeneous many-core architecture accelerator card according to a second embodiment of the present invention, where optimization is performed based on the foregoing embodiments, and in this embodiment, after the query is performed in a pre-built heterogeneous many-core architecture accelerator card environment detection item database according to each detection item information, a specific operation procedure of determining whether a parameter modification instruction is received is further included after a target query result is determined.
Accordingly, as shown in fig. 2, the method includes:
s210, acquiring and analyzing a command to be analyzed, and determining a command analysis result.
S220, obtaining at least one item of detection item information of the command analysis result, and inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information to determine a target inquiry result.
S230, judging whether a parameter modification instruction for the configuration parameters in the target query result is received, if so, modifying the configuration parameters according to parameters matched with the parameter modification instruction to obtain corrected configuration parameters.
The parameter modification instruction may be an instruction for modifying the matched configuration parameter, where the configuration parameter may be modified according to the parameter modification instruction, so as to obtain a corrected configuration parameter.
S240, respectively acquiring the target plug-ins corresponding to the target detection item information.
S250, verifying each target plug-in unit according to the correction configuration parameters until all target plug-in units are traversed, and generating verification results.
In this embodiment, after the corrected configuration parameters are obtained, verification processing operation needs to be performed on the target plugins according to the corrected configuration parameters, and similarly, all the target plugins need to be traversed to obtain a verification result.
According to the technical scheme, the command analysis result is determined by acquiring and analyzing the command to be analyzed; acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result; judging whether a parameter modification instruction for the configuration parameters in the target query result is received, if so, modifying the configuration parameters according to parameters matched with the parameter modification instruction to obtain corrected configuration parameters; respectively obtaining target plug-ins corresponding to the target detection item information; and respectively verifying each target plug-in according to the correction configuration parameters until all target plug-ins are traversed, and generating a verification result. The configuration parameters are modified through the parameter modification instruction, so that corrected configuration parameters are obtained, the flexibility of environment verification is improved, the steps of environment verification are simplified, the accuracy and the efficiency of environment verification are improved, the labor cost and the time cost are reduced, and the experience of a user is improved.
Example III
Fig. 3 is a schematic structural diagram of an environment verification device for a heterogeneous many-core architecture accelerator card according to a third embodiment of the present invention. The environment verification device of the heterogeneous many-core architecture acceleration card provided by the embodiment of the invention can be realized through software and/or hardware, and can be configured in terminal equipment or a server to realize the environment verification method of the heterogeneous many-core architecture acceleration card. As shown in fig. 3, the apparatus includes: a command parsing result determination module 310, a target query result determination module 320, and a verification result generation module 330.
The command analysis result determining module 310 is configured to obtain and analyze a command to be analyzed, and determine a command analysis result;
the target query result determining module 320 is configured to obtain at least one item of detection item information of the command analysis result, and query in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, so as to determine a target query result;
the detection item information is divided into hardware environment detection, software environment detection and reference environment test; the target query result comprises target detection item information and configuration parameters corresponding to the target detection item information; wherein the configuration parameter is parameter information describing target detection item information;
The verification result generating module 330 is configured to obtain at least one target plugin corresponding to the target query result, and verify each target plugin respectively until all target plugins are traversed, so as to generate a verification result;
wherein the verification result generating module 330 includes:
respectively obtaining target plug-ins corresponding to the target detection item information;
and respectively verifying each target plug-in according to the configuration parameters until all target plug-ins are traversed, and generating a verification result.
According to the technical scheme, the command analysis result is determined by acquiring and analyzing the command to be analyzed; acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result; and acquiring at least one target plug-in corresponding to the target query result, and respectively verifying each target plug-in until all target plug-ins are traversed, so as to generate a verification result. The method solves the problems of low efficiency and low accuracy of environment verification of the heterogeneous many-core architecture acceleration card in a manual mode, simplifies the steps of environment verification, improves the accuracy and efficiency of environment verification, and reduces the labor cost and the time cost.
Optionally, the hardware environment detection is hardware parameter inspection, hardware stability monitoring and PCIE link authentication; the software environment detection is software package detection and firmware detection; the reference environment test is a pressure test, a memory bandwidth reference test and a P2P bandwidth reference test.
Optionally, the heterogeneous many-core architecture accelerator card environment detection item database construction module may be specifically configured to, when at least one item of detection item information of the command analysis result is obtained, query the heterogeneous many-core architecture accelerator card environment detection item database constructed in advance according to each item of detection item information, and obtain history detection item information and a history configuration parameter matched with the history detection item information before determining a target query result; classifying the history detection item information according to a preset environment detection type, and storing the history detection item information and the history configuration parameters according to a classification result to construct a heterogeneous many-core architecture acceleration card environment detection item database; wherein the environment detection type includes: hardware environment detection, software environment detection and reference environment test.
Optionally, the verification result generating module 330 may be further specifically configured to: sequentially acquiring a current target plug-in from all target plug-ins; and acquiring the current configuration parameters corresponding to the current target plug-in, and verifying the current target plug-in until all target plug-in is traversed, so as to generate a verification result.
Optionally, the method further includes, by the verification judging module, specifically: after the current configuration parameters corresponding to the current target plugin are obtained and the current target plugin is verified, judging whether the current target plugin passes the verification, if so, marking the current target plugin as a normal item; if not, marking the current target plug-in as an abnormal item.
Optionally, the parameter modification instruction determining module may be specifically configured to: inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to the detection item information, determining a target inquiry result, and judging whether a parameter modification instruction for configuration parameters in the target inquiry result is received or not, if so, modifying the configuration parameters according to parameters matched with the parameter modification instruction to obtain corrected configuration parameters; respectively obtaining target plug-ins corresponding to the target detection item information; and respectively verifying each target plug-in according to the correction configuration parameters until all target plug-ins are traversed, and generating a verification result.
The environment verification device of the heterogeneous many-core architecture accelerator card provided by the embodiment of the invention can execute the environment verification method of the heterogeneous many-core architecture accelerator card provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example IV
Fig. 4 shows a schematic diagram of an electronic device 10 that may be used to implement a fourth embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 4, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the heterogeneous many-core architecture accelerator card environment verification method.
In some embodiments, the method of environment verification of heterogeneous many-core architecture accelerator cards may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the heterogeneous many-core architecture acceleration card environment verification method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the heterogeneous many-core architecture accelerator card's environment verification method in any other suitable manner (e.g., by means of firmware).
The method comprises the following steps: acquiring and analyzing a command to be analyzed, and determining a command analysis result; acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result; acquiring at least one target plugin corresponding to the target query result, and respectively verifying each target plugin until all target plugins are traversed, so as to generate a verification result; the step of obtaining at least one target plugin corresponding to the target query result, and verifying each target plugin respectively until all target plugins are traversed, and generating a verification result comprises the following steps: respectively obtaining target plug-ins corresponding to the target detection item information; and respectively verifying each target plug-in according to the configuration parameters until all target plug-ins are traversed, and generating a verification result.
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Example five
A fifth embodiment of the present invention also provides an environment verification method including a computer readable storage medium, which when executed by a computer processor, is configured to perform a heterogeneous many-core architecture accelerator card, the method including: acquiring and analyzing a command to be analyzed, and determining a command analysis result; acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result; acquiring at least one target plugin corresponding to the target query result, and respectively verifying each target plugin until all target plugins are traversed, so as to generate a verification result; the step of obtaining at least one target plugin corresponding to the target query result, and verifying each target plugin respectively until all target plugins are traversed, and generating a verification result comprises the following steps: respectively obtaining target plug-ins corresponding to the target detection item information; and respectively verifying each target plug-in according to the configuration parameters until all target plug-ins are traversed, and generating a verification result.
Of course, the computer-readable storage medium provided in the embodiments of the present invention is not limited to the above-described method operations, and may also perform the related operations in the environment verification method of the heterogeneous many-core architecture accelerator card provided in any embodiment of the present invention.
From the above description of embodiments, it will be clear to a person skilled in the art that the present invention may be implemented by means of software and necessary general purpose hardware, but of course also by means of hardware, although in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, etc., and include several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments of the present invention.
It should be noted that, in the embodiment of the environment verification device of the heterogeneous many-core architecture acceleration card, each unit and module included are only divided according to the functional logic, but are not limited to the above-mentioned division, so long as the corresponding functions can be realized; in addition, the specific names of the functional units are also only for distinguishing from each other, and are not used to limit the protection scope of the present invention.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (9)

1. The environment verification method of the heterogeneous many-core architecture acceleration card is characterized by comprising the following steps of:
acquiring and analyzing a command to be analyzed, and determining a command analysis result;
acquiring at least one item of detection item information of the command analysis result, inquiring in a pre-constructed heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, and determining a target inquiry result;
The detection item information is divided into hardware environment detection, software environment detection and reference environment test; the target query result comprises target detection item information and configuration parameters corresponding to the target detection item information; wherein the configuration parameter is parameter information describing target detection item information;
acquiring at least one target plugin corresponding to the target query result, and respectively verifying each target plugin until all target plugins are traversed, so as to generate a verification result;
the step of obtaining at least one target plugin corresponding to the target query result, and verifying each target plugin respectively until all target plugins are traversed, and generating a verification result comprises the following steps:
respectively obtaining target plug-ins corresponding to the target detection item information;
and respectively verifying each target plug-in according to the configuration parameters until all target plug-ins are traversed, and generating a verification result.
2. The method as recited in claim 1, further comprising:
the hardware environment detection comprises hardware parameter inspection, hardware stability monitoring and PCIE link identification;
the software environment detection is software package detection and firmware detection;
The reference environment test is a pressure test, a memory bandwidth reference test and a P2P bandwidth reference test.
3. The method of claim 2, wherein before obtaining at least one item of detection item information of the command analysis result and querying a pre-built heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information, determining a target query result, further comprises:
acquiring history detection item information and history configuration parameters matched with the history detection item information;
classifying the history detection item information according to a preset environment detection type, and storing the history detection item information and the history configuration parameters according to a classification result to construct a heterogeneous many-core architecture acceleration card environment detection item database;
wherein the environment detection type includes: hardware environment detection, software environment detection and reference environment test.
4. A method according to claim 3, wherein verifying each of the target plugins according to the configuration parameters until all target plugins are traversed, generating a verification result, includes:
sequentially acquiring a current target plug-in from all target plug-ins;
And acquiring the current configuration parameters corresponding to the current target plug-in, and verifying the current target plug-in until all target plug-in is traversed, so as to generate a verification result.
5. The method of claim 4, further comprising, after the obtaining the current configuration parameter corresponding to the current target plug-in and verifying the current target plug-in:
judging whether the current target plug-in passes the verification, if so, marking the current target plug-in as a normal item;
if not, marking the current target plug-in as an abnormal item.
6. The method of claim 1, wherein after the query is performed in the pre-built heterogeneous many-core architecture accelerator card environment detection item database according to the detection item information, determining a target query result, further comprising:
judging whether a parameter modification instruction for the configuration parameters in the target query result is received, if so, modifying the configuration parameters according to parameters matched with the parameter modification instruction to obtain corrected configuration parameters;
respectively obtaining target plug-ins corresponding to the target detection item information;
And respectively verifying each target plug-in according to the correction configuration parameters until all target plug-ins are traversed, and generating a verification result.
7. An environment verification device of a heterogeneous many-core architecture acceleration card, comprising:
the command analysis result determining module is used for acquiring and analyzing a command to be analyzed and determining a command analysis result;
the target query result determining module is used for acquiring at least one item of detection item information of the command analysis result, and querying in a pre-built heterogeneous many-core architecture accelerator card environment detection item database according to each item of detection item information to determine a target query result;
the detection item information is divided into hardware environment detection, software environment detection and reference environment test; the target query result comprises target detection item information and configuration parameters corresponding to the target detection item information; wherein the configuration parameter is standard parameter information describing target detection item information;
the verification result generation module is used for acquiring at least one target plugin corresponding to the target query result, and verifying each target plugin respectively until all target plugins are traversed, so as to generate a verification result;
The verification result generation module comprises:
respectively obtaining target plug-ins corresponding to the target detection item information;
and respectively verifying each target plug-in according to the configuration parameters until all target plug-ins are traversed, and generating a verification result.
8. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of environment verification of a heterogeneous many-core architecture accelerator card of any of claims 1-6 when the computer program is executed by the processor.
9. A computer readable storage medium storing computer instructions for causing a processor to implement the environment verification method of the heterogeneous many-core architecture accelerator card of any of claims 1-6 when executed.
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