CN115882830A - PWM signal detection circuit that contains direct current level - Google Patents
PWM signal detection circuit that contains direct current level Download PDFInfo
- Publication number
- CN115882830A CN115882830A CN202211512343.7A CN202211512343A CN115882830A CN 115882830 A CN115882830 A CN 115882830A CN 202211512343 A CN202211512343 A CN 202211512343A CN 115882830 A CN115882830 A CN 115882830A
- Authority
- CN
- China
- Prior art keywords
- voltage
- resistor
- level
- triode
- pwm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Rectifiers (AREA)
Abstract
The invention discloses a PWM signal detection circuit containing a direct current level, which comprises an input module, a detection module and a detection module, wherein the input module comprises a PWM input signal and a receiving seat CN6, the PWM input signal is a signal containing the direct current level, the low level is not 0V, the PWM input signal is connected with the receiving seat CN6 and is input to the receiving seat CN 6; the filtering module comprises a magnetic bead X2, a transient diode TVS4 and a first filtering capacitor C15, one end of the magnetic bead X2 is connected with the receiving base CN6, the other end of the magnetic bead X2 is connected with the nodes of the transient diode TVS4 and the first filtering capacitor C15, and the transient diode TVS4 and the first filtering capacitor C15 are both grounded; and the voltage regulating module comprises a first voltage-regulator tube Z2 and a first triode Q1, and the first voltage-regulator tube Z2 is connected with the base electrode of the first triode Q1 in series. The normal work of the PWM signal level in large range change is realized by using triode feedback. The PWM signal level has a large change range and the PWN signal has no delay and distortion after being converted by the detection circuit.
Description
Technical Field
The invention relates to the field of PWM signal conversion, in particular to a PWM signal detection circuit with a direct current level.
Background
For general PWM signal, low level 0V, the high level is approximately equal to supply voltage VCC, is connected to singlechip MCU's IO interface, if VCC is greater than MCU voltage (general 5V or 3.3V's power supply), then can be through the IO interface of the MUC of direct connection behind the resistance partial pressure, MCU can detect PWM signal's duty cycle. For some PWM signals with high interference prevention requirements, the low level is not 0V, and the high level (with a wide variation range of 16-32V) is as follows: the minimum low level of the PWM signal is also 6V, if the single resistor is connected to an IO interface of the MCU after voltage division, the MCU cannot identify the high and low levels of the PWM signal and always considers the high level, and therefore the duty ratio of the PWM cannot be detected.
In order to meet the requirement of PWM signal change, a new PWM signal detection circuit is designed, and actual measurement and verification are carried out.
Disclosure of Invention
This section is for the purpose of summarizing some aspects of embodiments of the invention and to briefly introduce some preferred embodiments, and in this section as well as in the abstract and the title of the invention of this application some simplifications or omissions may be made to avoid obscuring the purpose of this section, the abstract and the title of the invention, and such simplifications or omissions are not intended to limit the scope of the invention.
The present invention has been made keeping in mind the above problems occurring in the prior art and/or the problems occurring in the prior art.
Therefore, the technical problem to be solved by the invention is that the MCU of the singlechip cannot identify the high and low level change of the PWM signal.
In order to solve the technical problems, the invention provides the following technical scheme: a PWM signal detection circuit with DC level includes,
the input module comprises a PWM input signal and a receiving seat CN6, wherein the PWM input signal is a signal containing a direct current level, the low level is not 0V, and the PWM input signal is connected with the receiving seat CN6 and is input to the receiving seat CN 6; and the number of the first and second groups,
the filter module comprises a magnetic bead X2, a transient diode TVS4 and a first filter capacitor C15, one end of the magnetic bead X2 is connected with the receiving seat CN6, the other end of the magnetic bead X2 is connected with nodes of the transient diode TVS4 and the first filter capacitor C15, and the transient diode TVS4 and the first filter capacitor C15 are both grounded; and (c) a second step of,
the voltage regulating module comprises a first voltage-regulator tube Z2 and a first triode Q1, wherein the first voltage-regulator tube Z2 is connected with the base of the first triode Q1 in series.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: the voltage regulating module further comprises a voltage boosting resistor R19 and a voltage stabilizing resistor R32, the voltage boosting resistor R19 is arranged between the filtering module and the voltage regulating module, and the voltage stabilizing resistor R32 is connected with the first voltage stabilizing tube Z2 in series.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: the voltage regulating module further comprises a second voltage regulator tube Z4, a diode D12 and a first flow guide resistor R6, one end of the second voltage regulator tube Z4 is grounded, the other end of the second voltage regulator tube Z4 is connected with the diode D12, one end of the first flow guide resistor R6 is connected with a first triode Q1, and the other end of the first flow guide resistor R6 is connected with the output end.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: the voltage regulating module further comprises a second diversion resistor R36 and a second triode Q3, the second diversion resistor R36 is connected with the base of the second triode Q3, and the second diversion resistor R36 and the second triode Q3 are connected with the first diversion resistor R6 in parallel.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: the voltage regulating module further comprises a first voltage dividing resistor R42 and a second voltage dividing resistor R48, one end of the first voltage dividing resistor R42 is connected with the first flow guide resistor R6, the other end of the first voltage dividing resistor R42 is connected with the second voltage dividing resistor R48, and one end of the second voltage dividing resistor R48 is grounded.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: the voltage is divided by the first voltage dividing resistor R42 and the second voltage dividing resistor R48, and then reaches the output terminal through the second filter capacitor C17.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: if the PWM input signal is at a low level, it reaches the first voltage regulator tube Z2 through the receiving terminal CN6, the threshold value of the first voltage regulator tube Z2 is 12V, the low level cannot be input to the base of the first triode Q1 through the first voltage regulator tube Z2, and the low level output of the output terminal is 0V.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: if the PWM input signal is at a high level, the PWM input signal reaches the first voltage-regulator tube Z2 through the receiving seat CN6, the threshold value of the first voltage-regulator tube Z2 is 12V, the high level is input to the base electrode of the first triode Q1 through the first voltage-regulator tube Z2, and the first triode Q1 is conducted;
one path of voltage passes through a first flow guide resistor R6, a diode D12 and a second voltage regulator tube Z4, and the two ends of the anode of the diode D12 are clamped below 6V;
the high-level pass-clamp voltage is output to the output terminal through the first voltage dividing resistor R42 and the second voltage dividing resistor R48.
As a preferable aspect of the PWM signal detection circuit having a dc level according to the present invention, wherein: if the PWM input signal is at a high level and the level is very high, the first triode Q1 is turned on, the current flowing through the first current-guiding resistor R6 increases, when the voltage at the two ends of the first current-guiding resistor R6 is greater than or equal to 0.6V, the second current-guiding resistor R36 takes the current away, and the second triode Q3 is turned on;
the voltage of the base electrode of the first triode Q1 is reduced, and the conduction degree of the first triode Q1 is reduced.
As a preferable aspect of the PWM signal detection circuit according to the present invention, the PWM signal detection circuit includes: and the output end reaches the IO level acceptable by the MCU after being clamped by the second voltage-stabilizing tube Z4.
The invention has the beneficial effects that: and a voltage regulator tube Z2 is adopted to convert PWM low level (including direct current level 6V) to 0V, so that the low level of an IO interface of the MCU is met. The PWM high level can be clamped to the IO level acceptable by the MCU by adopting a voltage regulator tube Z4. The normal work of the PWM signal level in large range change is realized by using triode feedback. The PWM signal level has a large change range and the PWN signal has no delay and distortion after being converted by the detection circuit.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive labor. Wherein:
fig. 1 is a circuit diagram of a PWM signal detection circuit with dc level according to an embodiment of the present invention;
fig. 2 is an interface circuit diagram of an MCU in the PWM signal detection circuit with dc level according to an embodiment of the present invention;
fig. 3 is a flowchart of a PWM signal detection circuit with dc level according to an embodiment of the present invention when the PWM signal is at low level;
fig. 4 is a flowchart of a PWM signal high level detection circuit according to an embodiment of the present invention, the PWM signal high level detection circuit including a dc level;
fig. 5 is a flowchart illustrating a PWM signal detection circuit with dc level according to an embodiment of the present invention when the PWM signal level is large;
fig. 6 is a schematic diagram of a device display of a single-chip MCU in the PWM signal detection circuit with dc level according to an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced otherwise than as specifically described herein, and it will be appreciated by those skilled in the art that the present invention may be practiced without departing from the spirit and scope of the present invention and that the present invention is not limited by the specific embodiments disclosed below.
Next, the present invention will be described in detail with reference to the drawings, wherein the cross-sectional views illustrating the structure of the device are not enlarged partially according to the general scale for convenience of illustration when describing the embodiments of the present invention, and the drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
Further, reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one implementation of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments.
Example 1
Referring to fig. 1 and 2, the present embodiment provides a PWM signal detection circuit with a dc level, including an input module 100, including a PWM input signal and a receiving socket CN6, where the PWM input signal is a signal with a dc level, and is at a low level and is not 0V, and the PWM input signal is connected to the receiving socket CN6 and is input to the receiving socket CN 6; the filtering module 200 comprises a magnetic bead X2, a transient diode TVS4 and a first filtering capacitor C15, wherein one end of the magnetic bead X2 is connected with the receiving base CN6, the other end of the magnetic bead X2 is connected with the nodes of the transient diode TVS4 and the first filtering capacitor C15, and both the transient diode TVS4 and the first filtering capacitor C15 are grounded; and the voltage regulating module 300 comprises a first voltage regulator tube 301 (Z2) and a first triode 302 (Q1), wherein the first voltage regulator tube 301 (Z2) is connected in series with the base of the first triode 302 (Q1).
Specifically, the voltage regulating module 300 further includes a voltage boost resistor 303 (R19) and a voltage stabilizing resistor 304 (R32), the voltage boost resistor 303 (R19) is disposed between the filtering module 200 and the voltage regulating module 300, and the voltage stabilizing resistor 304 (R32) is connected in series with the first voltage regulator tube 301 (Z2).
The voltage regulation module 300 further includes a second voltage regulator tube 305 (Z4), a diode 306 (D12) and a first current-guiding resistor 307 (R6), one end of the second voltage regulator tube 305 (Z4) is grounded, the other end of the second voltage regulator tube is connected with the diode 306 (D12), one end of the first current-guiding resistor 307 (R6) is connected with the first triode 302 (Q1), and the other end of the first current-guiding resistor 307 (R6) is connected with the output end 400.
The voltage regulation module 300 further includes a second current-guiding resistor 308 (R36) and a second triode 309 (Q3), the second current-guiding resistor 308 (R36) is connected to the base of the second triode 309 (Q3), and the second current-guiding resistor 308 (R36) and the second triode 309 (Q3) are connected in parallel to the first current-guiding resistor 307 (R6).
The voltage regulating module 300 further includes a first voltage dividing resistor 310 (R42) and a second voltage dividing resistor 311 (R48), wherein one end of the first voltage dividing resistor 310 (R42) is connected to the first current guiding resistor 307 (R6), the other end of the first voltage dividing resistor is connected to the second voltage dividing resistor 311 (R48), and one end of the second voltage dividing resistor 311 (R48) is grounded.
The voltage is divided by the first voltage dividing resistor 310 (R42) and the second voltage dividing resistor 311 (R48), and then reaches the output terminal 400 through the second filter capacitor 312 (C17).
The output terminal 400 is clamped by the second regulator tube 305 (Z4) to reach the IO level acceptable by the MCU.
Example 2
Referring to fig. 1 to 5, in this embodiment, a PWM signal detection circuit with a dc level is provided, if the PWM input signal is at a low level, the PWM input signal reaches the first voltage regulator 301 (Z2) through the receiving socket CN6, the threshold of the first voltage regulator 301 (Z2) is 12V, the low level cannot be input to the base of the first triode 302 (Q1) through the first voltage regulator 301 (Z2), and the low level output of the output terminal 400 is 0V.
If the PWM input signal is at a high level, the PWM input signal reaches the first voltage regulator tube 301 (Z2) through the receiving terminal CN6, the threshold of the first voltage regulator tube 301 (Z2) is 12V, the high level is input to the base of the first triode 302 (Q1) through the first voltage regulator tube 301 (Z2), and the first triode 302 (Q1) is turned on;
the voltage is clamped to be below 6V at two ends of the ground of the anode of the diode 306 (D12) through a first flow guide resistor 307 (R6), the diode 306 (D12) and a second voltage regulator tube 305 (Z4) on one path;
the high-level voltage passing through the clamp is output to the output end 400 through the first voltage-dividing resistor 310 (R42) and the second voltage-dividing resistor 311 (R48), and can be directly connected to IO of a 5V single chip microcomputer. .
If the PWM input signal is at a high level and the level is very high, the first transistor 302 (Q1) is turned on, the current flowing through the first current-guiding resistor R6307 increases, when the voltage across the first current-guiding resistor 307 (R6) is greater than or equal to 0.6V, the second current-guiding resistor 308 (R36) takes away the current, and the second transistor 309 (Q3) is turned on;
the voltage at the base of the first transistor 302 (Q1) decreases and the conduction of the first transistor 302 (Q1) decreases, which in turn adjusts for wide variations in the PWM level range.
Example 3
Referring to fig. 1 to 5, the present embodiment provides a PWM signal detection circuit with a dc level, and the specific implementation manner is as follows:
1. the PWM signal with DC level, i.e. low level not 0V, 6V is input into CN6 seat, because the threshold value of Z2 voltage regulator tube is 12V
The low level can not be input to the base B of the Q1 through the Z2, the Q1 is cut off, and the low level output of the PWM _ OUT is 0V.
2. The high level of the PWM signal containing the direct current level is shown as 23.8V and is input into the CN6 seat, because the threshold value of the Z2 voltage-stabilizing tube is 12V, the high level can be input into the base B of the Q1 through the Z2, the Q1 is conducted,
one way is through R6, D12, Z4, clamped to 5.7V across the D12 anode and ground.
The voltage 5.7V of the high-level clamp is divided by R42 and R48 to output a PWM _ OUT signal, and the PWM _ OUT signal can be directly connected to IO of a 5V single chip microcomputer.
When the PWM signal level is large, Q1 is conducted, the current flowing through R6 is increased, when the voltage at two ends of R6 is more than or equal to 0.6V, Q3 is conducted, the voltage of the base electrode of Q1 is reduced, the conduction degree of Q1 is reduced, and then the large change of the PWM level range is adjusted.
It is important to note that the construction and arrangement of the present application as shown in the various exemplary embodiments is illustrative only. Although only a few embodiments have been described in detail in this disclosure, those skilled in the art who review this disclosure will readily appreciate that many modifications are possible (e.g., variations in sizes, dimensions, structures, shapes and proportions of the various elements, values of parameters (e.g., temperatures, pressures, etc.), mounting arrangements, use of materials, colors, orientations, etc.) without materially departing from the novel teachings and advantages of the subject matter recited in this application. For example, elements shown as integrally formed may be constructed of multiple parts or elements, the position of elements may be reversed or otherwise varied, and the nature or number of discrete elements or positions may be altered or varied. Accordingly, all such modifications are intended to be included within the scope of this invention. The order or sequence of any process or method steps may be varied or re-sequenced according to alternative embodiments. In the claims, any means-plus-function clause is intended to cover the structures described herein as performing the recited function and not only structural equivalents but also equivalent structures. Other substitutions, modifications, changes and omissions may be made in the design, operating conditions and arrangement of the exemplary embodiments without departing from the scope of the present inventions. Therefore, the present invention is not limited to a particular embodiment, but extends to various modifications that nevertheless fall within the scope of the appended claims.
Moreover, in an effort to provide a concise description of the exemplary embodiments, all features of an actual implementation may not be described (i.e., those unrelated to the presently contemplated best mode of carrying out the invention, or those unrelated to enabling the invention).
It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions may be made. Such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure, without undue experimentation.
It should be noted that the above-mentioned embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, which should be covered by the claims of the present invention.
Claims (10)
1. A PWM signal detection circuit having a dc level, comprising: comprises the steps of (a) preparing a substrate,
the input module (100) comprises a PWM input signal and a receiving seat CN6, wherein the PWM input signal is a signal containing a direct current level, and is connected with the receiving seat CN6 and input to the receiving seat CN 6; and the number of the first and second groups,
the filter module (200) comprises a magnetic bead X2, a transient diode TVS4 and a first filter capacitor C15, one end of the magnetic bead X2 is connected with the receiving base CN6, the other end of the magnetic bead X2 is connected with the nodes of the transient diode TVS4 and the first filter capacitor C15, and the transient diode TVS4 and the first filter capacitor C15 are both grounded; and the number of the first and second groups,
the voltage regulating module (300) comprises a first voltage regulator tube (301) and a first triode (302), wherein the first voltage regulator tube (301) is connected with the base of the first triode (302) in series.
2. The PWM signal detection circuit according to claim 1, wherein: the voltage regulating module (300) further comprises a booster resistor (303) and a voltage stabilizing resistor (304), the booster resistor (303) is arranged between the filtering module (200) and the voltage regulating module (300), and the voltage stabilizing resistor (304) is connected with the first voltage stabilizing tube (301) in series.
3. The PWM signal detection circuit according to claim 1 or 2, characterized in that: the voltage regulating module (300) further comprises a second voltage regulator tube (305), a diode (306) and a first flow guide resistor (307), one end of the second voltage regulator tube (305) is grounded, the other end of the second voltage regulator tube is connected with the diode (306), one end of the first flow guide resistor (307) is connected with the first triode (302), and the other end of the first flow guide resistor is connected with the output end (400).
4. The dc level-containing PWM signal detection circuit according to claim 3, wherein: the voltage regulating module (300) further comprises a second flow guide resistor (308) and a second triode (309), the second flow guide resistor (308) is connected with the base of the second triode (309), and the second flow guide resistor (308) and the second triode (309) are connected with the first flow guide resistor (307) in parallel.
5. The dc level-containing PWM signal detection circuit according to claim 4, wherein: the voltage regulating module (300) further comprises a first voltage dividing resistor (310) and a second voltage dividing resistor (311), one end of the first voltage dividing resistor (310) is connected with the first flow guide resistor (307), the other end of the first voltage dividing resistor is connected with the second voltage dividing resistor (311), and one end of the second voltage dividing resistor (311) is grounded.
6. The dc level-containing PWM signal detection circuit according to claim 5, wherein: the voltage is divided by the first voltage dividing resistor (310) and the second voltage dividing resistor (311) and then reaches the output end (400) through the second filter capacitor (312).
7. The PWM signal detection circuit according to any one of claims 4 to 6, characterized in that: if the PWM input signal is at a low level, the PWM input signal reaches the first voltage-regulator tube (301) through the receiving seat CN6, the threshold value of the first voltage-regulator tube (301) is 12V, the low level cannot be input to the base electrode of the first triode (302) through the first voltage-regulator tube (301), and the low level output of the output end (400) is 0V.
8. The PWM signal detection circuit according to claim 7, wherein: if the PWM input signal is at a high level, the PWM input signal reaches the first voltage-regulator tube (301) through a receiving seat CN6, the threshold value of the first voltage-regulator tube (301) is 12V, the high level is input to the base electrode of the first triode (302) through the first voltage-regulator tube (301), and the first triode (302) is conducted;
the voltage is clamped to be below 6V at two ends of the ground of the anode of the diode (306) through a first flow guide resistor (307), the diode (306) and a second voltage regulator tube (305) on one path;
the high-level pass-clamped voltage is output to the output terminal (400) through the first voltage dividing resistor (310) and the second voltage dividing resistor (311).
9. The dc level containing PWM signal detection circuit according to claim 8, wherein: if the PWM input signal is at a high level and the level is very high, the first triode (302) is conducted, the current flowing through the first diversion resistor (307) is increased, when the voltage at the two ends of the first diversion resistor (307) is more than or equal to 0.6V, the second diversion resistor (308) takes the current away, and the second triode (309) is conducted;
the voltage of the base of the first triode (302) is reduced, and the conduction degree of the first triode (302) is reduced.
10. The PWM signal detection circuit according to claim 8 or 9, wherein: and the output end (400) reaches the IO level acceptable by the MCU after being clamped by the second voltage regulator tube (305).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211512343.7A CN115882830A (en) | 2022-11-29 | 2022-11-29 | PWM signal detection circuit that contains direct current level |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211512343.7A CN115882830A (en) | 2022-11-29 | 2022-11-29 | PWM signal detection circuit that contains direct current level |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115882830A true CN115882830A (en) | 2023-03-31 |
Family
ID=85764663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211512343.7A Pending CN115882830A (en) | 2022-11-29 | 2022-11-29 | PWM signal detection circuit that contains direct current level |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115882830A (en) |
-
2022
- 2022-11-29 CN CN202211512343.7A patent/CN115882830A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7518352B2 (en) | Bootstrap clamping circuit for DC/DC regulators and method thereof | |
| JP6228769B2 (en) | Power circuit | |
| JPWO2006016456A1 (en) | Circuit protection method, protection circuit and power supply device using the same | |
| CN107102665A (en) | Low pressure difference linear voltage regulator | |
| US7202647B2 (en) | Power supply circuit | |
| CN110275566A (en) | Voltage regulator | |
| CN102830271A (en) | Voltage detecting method and voltage detecting circuit | |
| CN102290984A (en) | Charge pump voltage-stabilizing circuit, method for improving output accuracy of same and storage chip | |
| US20070222422A1 (en) | Power supply device and electrical device equipped with the same | |
| CN115882830A (en) | PWM signal detection circuit that contains direct current level | |
| CN116860052A (en) | Negative feedback voltage stabilizing circuit and front-end voltage stabilizing circuit | |
| CN109274268B (en) | High-voltage to low-voltage circuit applied to chip interior | |
| CN208861199U (en) | A kind of multilevel decompression voltage regulator circuit with clamper function | |
| CN110221647A (en) | A kind of voltage-stablizer | |
| CN107422773B (en) | Digital low-dropout regulator | |
| CN115065226A (en) | Soft start circuit for DC-DC converter | |
| CN114895743A (en) | Low starting current circuit for dynamic bias current LDO | |
| CN112764446B (en) | Voltage regulator and power supply chip | |
| CN1675607A (en) | Circuit and method for setting the operation point of a bgr circuit | |
| CN210005944U (en) | linear voltage-reducing and voltage-stabilizing circuit suitable for internal power supply of DC-DC circuit | |
| CN114764125A (en) | Testing device for low dropout regulator | |
| CN102386765A (en) | Power supply circuit | |
| CN111934653A (en) | Voltage mode PWM modulation feedforward circuit | |
| CN114578890B (en) | Reference voltage source circuit with piecewise linear compensation | |
| CN115356513B (en) | Digital detection circuit for power supply fluctuation |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |