CN115856560A - Method and device for measuring parasitic parameters of source electrode and drain current of power device - Google Patents
Method and device for measuring parasitic parameters of source electrode and drain current of power device Download PDFInfo
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- CN115856560A CN115856560A CN202211463189.9A CN202211463189A CN115856560A CN 115856560 A CN115856560 A CN 115856560A CN 202211463189 A CN202211463189 A CN 202211463189A CN 115856560 A CN115856560 A CN 115856560A
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Abstract
The invention relates to a method and a device for measuring a source electrode parasitic parameter and a drain electrode current of a power device, wherein the method comprises the following steps: connecting the power device, the load inductor and the power supply in series to form a loop; collecting a voltage drop signal between a Kelvin source electrode and a power source electrode of a power device in a switching period; integrating the pressure drop signal, and fitting the integrated pressure drop signal by adopting a quadratic function to obtain a quadratic function with time t as a variable; and calculating the parasitic resistance, the parasitic inductance and the pulse initial drain load current of the power device according to the coefficient of the quadratic function, the bus voltage value and the load inductance value. The invention can independently calculate the parasitic parameters and the drain current of the power device in each switching period without temperature compensation.
Description
Technical Field
The invention relates to the technical field of parasitic parameter measurement of power devices, in particular to a method and a device for measuring a source parasitic parameter and a drain current of a power device.
Background
The power semiconductor device is a key element in a power conversion system, the influence of parasitic parameters of the device is larger and larger along with the improvement of switching speed and the increase of power grade, and meanwhile, the accurate measurement of the current of the high-power device is also a problem.
Therefore, the method has important significance for accurately representing the parasitic parameters of the device and accurately measuring the current flowing through the device. The existing parasitic parameter testing scheme is mainly based on off-line testing, namely, a device is placed on a special testing machine, the testing environment is greatly different from the actual using working environment of the device, and the testing result has large possible error. There are also some online test schemes, that is, real-time parasitic parameters in the working process of the device are detected, but the general detection circuit is more complicated.
There are also many schemes for current monitoring of power devices such as IGBTs and MOSFETs. The current measuring scheme of the series sensing resistor has high precision and high speed, but has larger power consumption when the load current is larger. The power device is internally integrated with a proportional current measuring device, so that the integration level is high, but the cost is also high. The Rogowski coil and the Hall sensor can perform non-contact measurement, but have larger volume. Device drain current can also be detected by a gate voltage characteristic such as a miller plateau voltage value, but requires advanced testing for different devices and requires temperature compensation.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a method and a device for measuring the source parasitic parameter and the drain current of a power device, which can independently calculate the parasitic parameter and the drain current of the power device in each switching period and do not need temperature compensation.
The technical scheme adopted by the invention for solving the technical problems is as follows: a method for measuring a source parasitic parameter and a drain current of a power device is provided, which comprises the following steps:
connecting the power device, the load inductor and the power supply in series to form a loop;
collecting a voltage drop signal between a Kelvin source electrode and a power source electrode of a power device in a switching period;
integrating the voltage drop signal, and adopting a quadratic function to carry out integration on the voltage drop signalFitting to obtain a quadratic function V with time t as variable integ ＝at 2 + bt + c, where V integ For the integrated pressure drop signal, a, b and c are coefficients;
and calculating the parasitic resistance, the parasitic inductance and the pulse initial drain load current of the power device according to the coefficients a, b and c, the bus voltage value and the load inductance value.
The parasitic resistance is passed through
Calculated, said pulsed initial drain load current is passed
Calculated, the parasitic inductance passes>
Is calculated to obtain, wherein R S As a parasitic resistance, I DS0 For pulsing the initial drain load current, L S Is parasitic inductance, V bus Is the bus voltage, L load Is the load inductance value. />
The technical scheme adopted by the invention for solving the technical problems is as follows: the utility model provides a power device source electrode parasitic parameter and drain current measuring device, includes:
the integrator is used for acquiring a voltage drop signal between a Kelvin source electrode and a power source electrode of the power device in a switching period and integrating the voltage drop signal;
the analog-to-digital converter is used for converting the analog signal output by the integrator into a digital signal;
and the processor is used for fitting the digital signal by adopting a quadratic function to obtain coefficients a, b and c of the quadratic function, and calculating the parasitic resistance, the parasitic inductance and the pulse initial drain load current of the power device by adopting the coefficients a, b and c of the quadratic function, the bus voltage value and the load inductance value.
The processor is provided with
Calculating the parasitic resistance by->
Calculating a pulse initial drain load current by>
Calculating parasitic inductance, wherein R S As a parasitic resistance, I DS0 For pulsing the initial drain load current, L S Is parasitic inductance, V bus Is the bus voltage, L load Is the load inductance value.
Advantageous effects
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects: the invention can independently calculate the parasitic parameters and the drain current of the device in each switching period without temperature compensation of the calculation result, and can further calculate the initial drain load current of the device during the conduction period based on the extracted parasitic resistance and inductance. The whole scheme can be applied to a hard switch and current linear change scene.
Drawings
FIG. 1 is a schematic diagram of a power device source parasitic parameter and drain current measurement apparatus according to an embodiment of the present invention;
fig. 2 is a waveform diagram of key signals in the embodiment of the present invention.
Detailed Description
The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention may be made by those skilled in the art after reading the teaching of the present invention, and such equivalents may fall within the scope of the present invention as defined in the appended claims.
The embodiment of the invention relates to a method for measuring a source electrode parasitic parameter and a drain electrode current of a power device, which comprises the following steps: connecting a power device, a load inductor and a power supply in series to form a loop (see figure 1); collecting a voltage drop signal between a Kelvin source electrode and a power source electrode of a power device in a switching period; integrating the pressure drop signal, and fitting the integrated pressure drop signal by adopting a quadratic function to obtain a quadratic function with time t as a variable; and calculating the parasitic resistance, the parasitic inductance and the pulse initial drain load current of the power device according to the coefficients a, b and c of the quadratic function, the bus voltage value and the load inductance value.
The measurement method of the present embodiment may be implemented based on the measurement apparatus shown in fig. 1, which includes an integrator, an analog-to-digital converter ADC, and a processor.
For the power loop shown in fig. 1, the current flowing through the power device at any time is as shown in fig. 2: (t is the time after each pulse is turned on)
Wherein, V bus Is the bus voltage, L load For the power loop load inductance, these two values are determined values in the power loop. The voltage drop between the kelvin source and the power source at any time is:
starting from the moment when the device starts to conduct, for V SS Performing an integration and performing a suitably simplified approximation, there are:
analyzing the integral voltage expression, the integral expression of the voltage drop between the parasitic inductance and the resistance of the series source is a quadratic function related to time, and the coefficient expression of the quadratic function comprises the parasitic resistance, the parasitic inductance and the source-drain current information of the device.
Therefore, in the embodiment, voltage integration is performed on the parasitic source of the power loop (in the current pulse period), sampling and fitting are performed on the output waveform of the integrator, and then the fitting coefficient is calculated, so that the parasitic resistance, the parasitic inductance and the source-drain current of the device can be obtained.
And reading the analog voltage output by the integrator by adopting an analog-to-digital converter (ADC), and converting the read integrator voltage into a digital signal. And the processor is used for processing and calculating the digital signal output by the analog-to-digital converter ADC, fitting the digital signal by using a quadratic function to obtain the coefficient of the quadratic function output by the integrator, and further calculating to obtain the parasitic resistance, the parasitic inductance and the source-drain current of the device. The processor in this embodiment may be an MCU, a DSP, or an FPGA.
The quadratic function obtained by fitting is set as:
V integ ＝at 2 +bt+c(4)
then the combined type (3) and the formula (4) can obtain R S Expression of L S Quadratic equation of (1) and DS0 the quadratic expression of (1):
further, the parasitic resistance R of the device can be calculated S Parasitic inductance L S And a pulsed initial drain load current I DS0 ：
The method can be applied to the fields of current detection, state monitoring, protection and the like of power devices in power electronic systems such as PFC (power factor correction), DCDC (direct current DC) and the like.
It is easy to find that the invention can independently calculate the parasitic parameter and the drain current of the device in each switching period, and does not need to carry out temperature compensation on the calculation result, and the invention can further calculate the initial drain load current during the conduction period of the device based on the extracted parasitic resistance and inductance. The whole scheme can be applied to a hard switch and current linear change scene.
Claims (4)
1. A method for measuring a source parasitic parameter and a drain current of a power device is characterized by comprising the following steps:
connecting the power device, the load inductor and the power supply in series to form a loop;
collecting a voltage drop signal between a Kelvin source electrode and a power source electrode of a power device in a switching period;
integrating the pressure drop signal, and fitting the integrated pressure drop signal by adopting a quadratic function to obtain a quadratic function V with the time t as a variable integ ＝at 2 + bt + c, wherein, V integ For the integrated pressure drop signal, a, b and c are coefficients;
and calculating the parasitic resistance, the parasitic inductance and the pulse initial drain load current of the power device according to the coefficients a, b and c, the bus voltage value and the load inductance value.
2. The method of claim 1, wherein the parasitic resistance is measured by a parasitic resistance measurement circuit
Calculated that the pulse initiates a drain load current passage->
Calculated, the parasitic inductance is passed>
Is calculated to obtain, wherein R S As a parasitic resistance, I DS0 For pulsing the initial drain load current, L S Is parasitic inductance, V bus Is the bus voltage, L load Is the load inductance value.
3. A power device source electrode parasitic parameter and drain current measuring device is characterized by comprising:
the integrator is used for acquiring a voltage drop signal between a Kelvin source electrode and a power source electrode of the power device in a switching period and integrating the voltage drop signal;
the analog-to-digital converter is used for converting the analog signal output by the integrator into a digital signal;
and the processor is used for fitting the digital signal by adopting a quadratic function to obtain coefficients a, b and c of the quadratic function, and calculating the parasitic resistance, the parasitic inductance and the pulse initial drain load current of the power device by adopting the coefficients a, b and c of the quadratic function, the bus voltage value and the load inductance value.
4. The power device source parasitic parameter and drain current measurement device of claim 1, wherein said processor is programmed to pass said measurement signal through
Calculating the parasitic resistance by->
Calculating a pulsed initial drain load current, pass >>
Calculating parasitic inductance, wherein R S As a parasitic resistance, I DS0 For pulsing the initial drain load current, L S Is parasitic inductance, V bus Is the bus voltage, L load Is the load inductance value. />
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| CN202211463189.9A CN115856560A (en) | 2022-11-22 | 2022-11-22 | Method and device for measuring parasitic parameters of source electrode and drain current of power device |
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| CN202211463189.9A CN115856560A (en) | 2022-11-22 | 2022-11-22 | Method and device for measuring parasitic parameters of source electrode and drain current of power device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117330839A (en) * | 2023-09-28 | 2024-01-02 | 浙江大学 | Parasitic parameter non-contact extraction method based on TMR frequency characteristic |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117330839A (en) * | 2023-09-28 | 2024-01-02 | 浙江大学 | Parasitic parameter non-contact extraction method based on TMR frequency characteristic |
| CN117330839B (en) * | 2023-09-28 | 2024-04-09 | 浙江大学 | Parasitic parameter non-contact extraction method based on TMR frequency characteristic |
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