CN115827063A

CN115827063A - Write storage system and method based on Fill Constant instruction

Info

Publication number: CN115827063A
Application number: CN202310120439.7A
Authority: CN
Inventors: 王爽; 朱迎春; 钱龙
Original assignee: Muxi Integrated Circuit Nanjing Co ltd
Current assignee: Muxi Integrated Circuit Nanjing Co ltd
Priority date: 2023-02-16
Filing date: 2023-02-16
Publication date: 2023-03-21
Anticipated expiration: 2043-02-16
Also published as: CN115827063B

Abstract

The invention provides a write storage system and a write storage method based on a Fill Constant instruction, belonging to the technical field of calculation; the system comprises: the command reading and writing module is used for reading a Fill Constant command input by a user; the Fill Constant state control module is used for analyzing the instruction and initiating a write request to the storage module according to the analysis result; and the storage module is used for responding to the write request to complete the write-in of the instruction carrying data. The method realizes the operation of writing the filling specific value to the memory by the single instruction by providing the special Fill Constant instruction, can be used for hardware acceleration of the filling function of a common artificial intelligence software framework, can simplify a software compiler, improve the instruction execution efficiency and realize the support of the GPU on high-performance calculation.

Description

Write storage system and method based on Fill Constant instruction

Technical Field

The invention relates to the technical field of computing, in particular to a write storage system and a write storage method based on a Fill Constant instruction.

Background

In the big data era, computing power has become a driving force for promoting the development of digital economy. With the increasing demand for computing data, GPUs have become an important component of the computing infrastructure. Especially for artificial intelligence application, training and reasoning are needed based on a mass data set, the traditional control-oriented CPU is difficult to meet the high-performance computing requirement, and a parallel computing-oriented GPU becomes a better hardware accelerator.

Currently, common artificial intelligence software frameworks include Google Tensorflow, hundred degree Paddle, open-source PyTorch, etc., which are often required to be filled with specific data when initializing or using memory objects, and thus, all provide special functions. For example, there are the tensoflow.zero (), tensoflow.file (), tensoflow.constant () functions in the Google Tensorflow framework; a Paddle file _ constant () function is provided in a hundred-degree-fly Paddle framework; a torch.constant () function is provided in an open source PyTorch framework.

By extension, in other software domains, there are also common general write-fill operations on storage, such as initializing a storage object to 0; constructing a memory linked list and increasing the content, and the like. The method is characterized in that a user can calculate a write address and write data in advance. This type of fill function is hereinafter referred to collectively as the fill () function.

Traditional implementations require the compilation of the fill () function into multiple memory access instructions: and generating a filling data block, sending a DMA COPY (direct memory access) instruction, reading the filling data by the GPU, and writing the filling data into a destination address by the GPU. However, this increases the complexity of compiling the instructions and also reduces the efficiency of the operation.

Disclosure of Invention

In order to solve at least the technical problems in the background art, the invention provides a write storage system and a write storage method based on a Fill Constant instruction.

The invention provides a write storage system based on a Fill Constant instruction, which comprises an instruction read-write module, a Fill Constant state control module and a storage module; the output end of the instruction reading and writing module is connected with the input end of the Fill Constant state control module, and the output end of the Fill Constant state control module is connected with the storage module; wherein,

the command read-write module is used for reading a Fill Constant command input by a user and sending the Fill Constant command to the Fill Constant state control module;

the Fill Constant state control module is used for analyzing the Fill Constant and initiating a write request to the storage module according to an analysis result;

and the storage module is used for responding to the write request to finish the writing of data carried by the Fill Constant instruction.

Further, the instruction reading and writing module is specifically configured to: and reading a Fill Constant instruction constructed by a user from the buffer, and sending the Fill Constant instruction to the Fill Constant state control module.

Further, the Fill Constant instruction constructed by the user contains the following information:

1) The Fill Constant instruction operation CODE (OP CODE) is used for identifying the command;

2) Writing an address, namely an initial destination address of the current write-fill operation;

3) Writing data volume, the total amount of the filling data of the current time;

4) Writing data, wherein the content of the complete data filled at this time is not fixed;

5) The safe storage identification is used for identifying whether the destination address filled at this time is a safe storage area or a non-safe storage area;

6) The data location exchange configuration includes several types: no exchange, 16bit exchange, 32bit exchange, 64bit exchange.

Further, the indication of the data location exchange configuration is as follows:

1) No exchange: the Fill Constant data is written as a sample, and 0xaabb- >0xaabb; 2) 16bit exchange: performing data position exchange by taking 16 bits as granularity, wherein 0xaabb- >0xbbaa; 3) And (2) 32bit exchange: data position exchange is carried out by taking 32bit as granularity, 0 xaabbcdd- >0 xddcbbaa; 4) And (4) 64bit exchange: data position exchange is carried out by taking 64 bits as granularity, and 0 xaabbcddef 0011- >0x1100ffeeddccbbaa.

Further, the Fill Constant state control module is specifically configured to: and performing instruction analysis on the Fill Constant instruction to obtain information of a write address, a write data volume, write data, a safe storage identifier and a data position exchange configuration bit carried by the Fill Constant instruction, and initiating a write request to a storage module according to the information.

Further, the Fill Constant state control module is further configured to: in the writing operation process, the corresponding relation between the writing address and the writing data is automatically processed, the writing address is automatically accumulated and calculated, and the data is ensured to be written into the correct address.

The second aspect of the present invention further provides a write storage method based on the Fill Constant instruction, including the following steps:

s1, a user constructs a Fill Constant instruction and writes the Fill Constant instruction into a buffer of an instruction read-write module;

s2, the instruction reading and writing module reads the Fill Constant instruction from the buffer and sends the Fill Constant instruction to the Fill Constant state control module;

s3, the Fill Constant state control module performs instruction analysis on the Fill Constant instruction to obtain information of a write address, a write data volume, write data, a safe storage identifier and a data position exchange configuration bit carried by the Fill Constant instruction, and initiates a write request to a storage module according to the information;

and S4, the storage module completes the writing of data carried by the Fill Constant instruction based on the writing request, and waits for a new instruction of a user.

Further, the method further comprises: in the writing operation process, the Fill Constant state control module automatically processes the corresponding relation between the writing address and the writing data, automatically accumulates and calculates the writing address, and ensures that the data is written into a correct address.

The invention has the beneficial effects that:

1) Simplifying the design of a compiler, directly opening a Fill Constant instruction to a user and the compiler, and directly compiling a Fill () function of software into the Fill Constant instruction;

2) The efficiency is high, the special Fill Constant instruction executes the state machine, and a single instruction finishes the indefinite long write filling operation of a user;

3) The flexibility is high, and the user-defined, flexible and different-granularity data position exchange is supported;

4) The security is high, and the user controls safe or non-safe storage access.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.

Fig. 1 is a schematic structural diagram of a write storage system based on a Fill Constant instruction according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of instruction writing and reading according to an embodiment of the disclosure.

Fig. 3 is a flowchart of a Fill Constant state control module analyzing a Fill Constant command according to an embodiment of the present invention.

Fig. 4 is a schematic diagram of reading and writing data according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, and "a plurality" typically includes at least two.

It should be understood that the term "and/or" as used herein is merely a relationship that describes an associated object, meaning that three relationships may exist, e.g., a and/or B, may represent: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

It should be understood that, although the terms first, second, third, etc. may be used in the embodiments of the present application to describe \8230; \8230, these \8230; should not be limited to these terms. These terms are used only to distinguish between 8230; and vice versa. For example, a first 8230; also referred to as a second 8230; without departing from the scope of embodiments of the present application, similarly, the second one (8230) \\8230; also known as the first one (8230); 8230).

The words "if", as used herein may be interpreted as "at \8230; \8230whenor" when 8230; \8230when or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrases "if determined" or "if detected (a stated condition or event)" may be interpreted as "when determined" or "in response to a determination" or "when detected (a stated condition or event)" or "in response to a detection (a stated condition or event)", depending on the context.

It is also noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a good or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such good or system. Without further limitation, an element defined by the phrases "comprising one of \8230;" does not exclude the presence of additional like elements in an article or system comprising the element.

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a write storage system based on a Fill Constant instruction according to an embodiment of the present disclosure. As shown in fig. 1, in order to solve the problem of low operation efficiency of writing and filling data in a conventional memory, an instruction management system based on a Fill Constant according to an embodiment of the present invention includes an instruction reading and writing module, a Fill Constant state control module, and a storage module; the output end of the instruction read-write module is connected with the input end of the Fill Constant state control module, and the output end of the Fill Constant state control module is connected with the storage module; wherein,

In this embodiment, the special Fill Constant instruction is provided, so that the operation of writing the filling specific value to the memory by the single instruction is realized, the special Fill Constant instruction can be used for performing hardware acceleration on the filling function of a common artificial intelligence software framework, a software compiler can be simplified, the instruction execution efficiency is improved, and the support of the GPU on high-performance calculation is realized.

In this embodiment, the instruction read-write module mainly writes, caches, and reads instructions, as shown in fig. 2:

the newest instruction will be written to the buffer next address. The instruction buffer is a first-in-first-out cache with a depth of M bytes and an address range of 0- (M-1) Byte. When the instruction writes to the last address M-1 of the buffer, it will start from 0 again. The first written command is read first.

When the Host buffer is not empty, the reading instruction is started and sent to the Fill Constant state control module in sequence. The length of each transmission is L, L is minimum 1Byte, and maximum instruction length.

3) Writing data volume, the total amount of filling data of the current writing;

5) The safe storage identifier is used for identifying whether the filled destination address is a safe storage area or a non-safe storage area;

1) No exchange: fill Constant data was written as is, 0xaabb- >0xaabb; 2) 16bit exchange: performing data position exchange by taking 16 bits as granularity, wherein 0xaabb- >0xbbaa; 3) 32bit exchange: data position exchange is carried out by taking 32bit as granularity, 0 xaabbcdd- >0xddccbbaa; 4) And (4) 64bit exchange: data position exchange is carried out by taking 64 bits as granularity, and 0 xaabbcddef 0011- >0x1100ffeeddccbbaa.

In this embodiment, the Fill Constant state control module parses the instruction, calculates the write address, performs data exchange according to the data location exchange configuration, initiates a write request, and constructs a secure or non-secure access according to the secure storage identifier.

The safety storage access mark, usually 1bit indication signal, is sent to the memory in the write request, only the request with the safety storage access mark 1 can successfully access the safety storage area defined by the system.

The specific states are shown in fig. 3:

first, in the initial state, the Fill Constant state control module is in an idle state. And when the Fill Constant state control module receives the Fill Constant instruction from the instruction reading and writing module, the Fill Constant state control module enters an instruction analysis state. And obtaining information such as a write address, a write data volume, write data, a safe storage identifier, a data position exchange instruction and the like carried by the Fill Constant instruction.

And then, after the analysis is finished, entering a write preparation state, calculating a write address, exchanging data according to the data position exchange indication, and controlling the security level according to the security storage identifier. Since a single write request to memory has a maximum burst limit, such as 64B, 256B, etc., a write operation of the Fill Constant instruction may require multiple write requests to be initiated.

Then, a write operation state is entered, a write request is issued to the memory, and a response is awaited.

Then, after the write operation is successful, calculating whether the last address is reached, and if so, entering a write completion state; otherwise, returning to the write preparation state and continuing the next write request.

Finally, return to the idle state and wait for the next Fill Constant instruction.

In addition, the storage module mainly performs storage, read operation and write operation of variables, and as shown in fig. 4:

the storage mode can be register, SRAM, DDR, HBM, etc., without limitation. The range of the storage space is the maximum value that can be represented by the address bit width in the Fill Constant instruction. After the memory receives the write operation sent by the Fill Constant state control module, the storage module writes new variable data into the storage unit of the corresponding address according to the write address and the write data.

During the Fill Constant instruction execution, no read operation to memory is involved.

The invention also provides a write storage method based on the Fill Constant instruction, which comprises the following steps:

In this embodiment, the detailed steps of the write storage method based on the Fill Constant instruction of the present invention are as follows:

1) The user writes the Fill Constant command into the command buffer. The newest instruction is written to the last location of the instruction buffer. The instruction buffer is a first-in-first-out ring buffer with a depth of M. When the instruction is written to the last position of the buffer, the instruction starts from 0 again; 2) When the instruction buffer is not empty, it indicates that a new instruction has been written. At this time, the command read/write module will actively send a command to the Fill Constant state control module. The length of the instruction sent each time is L; 3) The Fill Constant state control module will parse the Fill Constant command. Analyzing information such as a write address, a write data quantity, write data, a safe storage identifier, a data position exchange instruction and the like of the FillConstant instruction; 4) And the Fill Constant state control module performs writing preparation, calculates a writing address, performs data exchange according to the data position exchange instruction, and performs security level control according to the security storage identifier. Since a single write request to the memory has a maximum burst limit, such as 64B, 256B, etc., a write operation of the Fill Constant instruction may need to initiate multiple write requests; 5) After receiving the write operation, the storage module writes data into a corresponding address space according to the write address; 6) After the write operation is successful, the Fill Constant state control module calculates whether the last address is reached, and if so, the Fill Constant state control module enters a write completion state; otherwise, returning to the write preparation state and continuing the next write request; 7) And after finishing all write requests of the current command, the Fill Constant state control module returns to an idle state and waits for the next Fill Constant command.

The following examples of the invention are given below:

example one):

1) The user should fill the starting address 0X16 with a length of 32B, and the data is X. The Fill Constant instruction information prepared by the user includes: fill Constant identifier 0X2 (OP CODE, custom), write address 0X16, write data length 32, write data X, secure store identification 0, data location swap indication 0 (not swapped). The Fill Constant command is 48 bytes in length and includes a 16Byte header and 32Byte write data. The 16Byte header, which contains the aforementioned control information, is typically defined as 4B aligned for simplicity of software address management.

2) In the initial state, there is no Fill Constant instruction in the instruction buffer, and the address is 0. The buffer depth is 1MByte in size. Thus, the latest Fill Constant instruction will be written to the 0-47B address of the buffer.

3) When the instruction buffer is not empty, it indicates that there is an instruction written to the Host buffer. At this time, the instruction read-write module can actively send a section of instruction to the state control module. The length of the instruction sent each time is 1693 times.

4) The Fill Constant state control module will parse the Fill Constant command. And analyzing information such as a write address, a write data volume, write data, a safe storage identifier, a data position exchange instruction and the like of the Fill Constant instruction.

5) The data location swap indication is 0 and no data is swapped. The secure storage flag is 0, and in the issued write request, it is identified as a non-secure access. If the memory can support a single 32B access, only a single write request needs to be sent to complete the write operation.

6) After receiving the write request, the memory module writes the data into the memory banks of the continuous 32 bytes with 0x16 as the starting address.

Example two):

1) The user should fill the starting address 0x100 with a length of 128B, and the padding data is Y. Therefore, the Fill Constant instruction information prepared by the user includes: fill Constant identifier 0x2 (OP CODE, custom), write address 0x100, write data length 128, write data Y, secure memory identification 1, data location swap indication 32b swap. The Fill Constant instruction is 144 bytes in length, and includes a 16Byte header and 128B write data.

2) There are other instructions in the instruction buffer whose addresses have been written to 0x500. The buffer depth is 1MByte in size. Thus, the latest Fill Constant instruction will be written to the 0x500-0x58F address of the buffer.

3) When the instruction buffer is not empty, it indicates that there is an instruction written to the Host buffer. At this time, the instruction read-write module can actively send a section of instruction to the state control module. The length of the instruction sent each time is 1693, and 9 times of sending are finished.

5) The data location exchange indication is 16b exchange, and exchange is performed according to the data location exchange rule. The secure storage identifier is 1, and in the issued write request, the secure access is identified. If the memory supports a single maximum 32B access, four write requests are sent with write addresses 0x100, 0x120, 0x140, and 0x160, respectively, to complete the write operation.

6) After receiving the write operation, the memory module writes the write data to the consecutive 128B memory banks beginning at address 0x 100.

Embodiments of the disclosure may be indicated as functional block components and various processing operations. Functional blocks may be implemented as various numbers of hardware and/or software components that perform the specified functions. For example, embodiments of the present disclosure may implement direct circuit components, such as memories, processing circuits, logic circuits, look-up tables, and the like, that may perform various functions under the control of one or more microprocessors or other control devices. The components of the present disclosure may be implemented by software programming or software components. Similarly, embodiments of the disclosure may include various algorithms implemented by combinations of data structures, procedures, routines, or other programming components, and may be implemented by programming or scripting languages (such as C, C + +, java, assembler, or the like). The functional aspects may be implemented by algorithms executed by one or more processors. Furthermore, embodiments of the present disclosure may implement related techniques for electronic environment setup, signal processing, and/or data processing. Terms such as "mechanism," "element," "unit," and the like may be used broadly and are not limited to mechanical and physical components. These terms may represent a series of software routines associated with a processor or the like.

Specific embodiments have been described in this disclosure by way of example, and the scope of the embodiments is not limited in this respect.

While embodiments of the present disclosure have been described, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure as defined by the following claims. Therefore, the above-described embodiments of the present disclosure should be construed as examples, and not limiting the embodiments in all aspects. For example, each component described as a single unit may be executed in a distributed manner, and likewise, components described as distributed may be executed in a combined manner.

The use of all examples or example terms (e.g., etc.) in embodiments of the present disclosure is for the purpose of describing embodiments of the present disclosure, and is not intended to limit the scope of embodiments of the present disclosure.

Moreover, unless explicitly stated otherwise, expressions such as "necessary," "important," and the like, associated with certain components may not indicate an absolute need for the component.

Those of ordinary skill in the art will understand that the embodiments of the present disclosure may be implemented in modified forms without departing from the spirit and scope of the present disclosure.

Since the present disclosure allows various changes to be made to the embodiments of the present disclosure, the present disclosure is not limited to the specific embodiments, and it will be understood that all changes, equivalents, and substitutions without departing from the spirit and technical scope of the present disclosure are included in the present disclosure. The embodiments of the disclosure described herein are therefore to be understood as examples in all respects and not as restrictive.

Also, terms such as "unit", "module", and the like mean a unit that processes at least one function or operation, which may be implemented as hardware or software or a combination of hardware and software. The "units" and "modules" may be stored in a storage medium to be addressed and may be implemented as programs, which may be executable by a processor. For example, "unit" and "module" may refer to components such as software components, object-oriented software components, class components and task components, and may include processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuitry, data, databases, data structures, tables, arrays, or variables.

In the present disclosure, the expression that "a may include one of a1, a2, and a3" may broadly indicate that examples that may be included in the element a include a1, a2, or a3. The expression should not be interpreted as being limited to the examples included in the element a must be limited to the meanings of a1, a2 and a3. Therefore, as an example included in the element a, it should not be construed as excluding elements other than a1, a2, and a3. In addition, the expression indicates that the element a may include a1, a2, or a3. The expression does not imply that the elements comprised by element a must be selected from a specific set of elements. That is, the expression should not be restrictively understood to mean that a1, a2, or a3, which must be selected from the group consisting of a1, a2, and a3, is included in the element a.

Furthermore, in the present disclosure, at least one of the expressions "a1, a2 and/or a3" means one of "a1", "a2", "a3", "a1 and a2", "a1 and a3", "a2 and a3", and "a1, a2 and a 3". Therefore, it should be noted that the expression "at least one of a1," at least one of a2, and "at least one of a3" should not be interpreted as "at least one of a1," at least one of a2, "and" at least one of a3, "unless explicitly described as" at least one of a1, at least one of a2, and at least one of a3.

Claims

1. A write storage system based on a Fill Constant instruction is characterized by comprising an instruction read-write module, a Fill Constant state control module and a storage module; the output end of the instruction reading and writing module is connected with the input end of the Fill Constant state control module, and the output end of the Fill Constant state control module is connected with the storage module; wherein,

2. The Fill Constant instruction-based write storage system of claim 1, wherein: the instruction reading and writing module is specifically used for: and reading a Fill Constant instruction constructed by a user from the buffer, and sending the Fill Constant instruction to the Fill Constant state control module.

3. The Fill Constant instruction-based write storage system of claim 2, wherein: the Fill Constant instruction constructed by the user contains the following information:

4. A Fill Constant instruction based write storage system as claimed in claim 3, wherein:

the indication of the data position exchange configuration is as follows:

1) No exchange: the Fill Constant data is written as a sample, and 0xaabb- >0xaabb; 2) 16bit exchange: performing data position exchange by taking 16 bits as granularity, wherein 0xaabb- >0xbbaa; 3) 32bit exchange: data position exchange is carried out by taking 32bit as granularity, 0 xaabbcdd- >0 xddcbbaa; 4) And (4) 64bit exchange: data position exchange is carried out by taking 64 bits as granularity, and 0 xaabbcddef 0011- >0x1100ffeeddccbbaa.

5. The Fill Constant instruction-based write storage system of claim 1, wherein: the Fill Constant state control module is specifically configured to: and performing instruction analysis on the Fill Constant instruction to obtain information of a write address, a write data volume, write data, a safe storage identifier and a data position exchange configuration bit carried by the Fill Constant instruction, and initiating a write request to a storage module according to the information.

6. The Fill Constant instruction-based write storage system of claim 5, wherein: the Fill Constant state control module is further configured to: in the writing operation process, the corresponding relation between the writing address and the writing data is automatically processed, the writing address is automatically accumulated and calculated, and the data is ensured to be written into the correct address.

7. A write storage method based on a Fill Constant instruction is characterized by comprising the following steps:

8. The Fill Constant instruction-based write store method of claim 7, wherein: the method further comprises the following steps: in the writing operation process, the Fill Constant state control module automatically processes the corresponding relation between the writing address and the writing data, automatically accumulates and calculates the writing address, and ensures that the data is written into a correct address.