CN115808614A - Power amplifier chip thermal performance monitoring method, system and storage medium - Google Patents

Power amplifier chip thermal performance monitoring method, system and storage medium Download PDF

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CN115808614A
CN115808614A CN202310090840.0A CN202310090840A CN115808614A CN 115808614 A CN115808614 A CN 115808614A CN 202310090840 A CN202310090840 A CN 202310090840A CN 115808614 A CN115808614 A CN 115808614A
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power amplifier
amplifier chip
time
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junction temperature
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CN115808614B (en
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黄洪云
白如伟
刁龙平
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Sichuan Huadun Defense Technology Co ltd
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Abstract

The invention discloses a method, a system and a storage medium for monitoring the thermal performance of a power amplifier chip, which relate to the technical field of chip thermal monitoring and comprise the following steps: acquiring performance parameters of a power amplifier chip; calculating real-time junction temperature data of the power amplifier chip; establishing a real-time junction temperature-running time data table of the power amplifier chip; establishing a power amplifier chip fault risk prediction model; inputting data in a real-time junction temperature-running time data table of the power amplifier chip into a power amplifier chip fault risk prediction model to obtain a risk probability value of the power amplifier chip; and judging whether the risk probability value of the power amplifier chip is greater than a preset value. The invention has the advantages that: the scheme for monitoring the thermal performance of the power amplifier chip is provided, the power amplifier chip in the power amplifier can be maintained in advance in time, fault risks can be eliminated, and the power amplifier is prevented from being shut down due to the fact that the power amplifier chip fails, and larger loss is caused.

Description

Power amplifier chip thermal performance monitoring method, system and storage medium
Technical Field
The invention relates to the technical field of chip thermal monitoring, in particular to a method and a system for monitoring the thermal performance of a power amplifier chip and a storage medium.
Background
A Power Amplifier (PA, abbreviated as "Power Amplifier") is an Amplifier that can generate maximum Power output to drive a certain load under a given distortion rate. The power amplifier plays a role of an organization and coordination pivot in the whole system, and governs whether the whole system can provide good signal output or not to some extent.
The power amplifier is integrated with a plurality of power amplifier chips, in the operation process of the power amplifier, the thermal performance monitoring aiming at the power amplifier chips is a performance index which intuitively reflects the operation state of the power amplifier chips, the thermal performance monitoring aiming at the power amplifier chips in the prior art is usually only aimed at the temperature data acquisition of the power amplifier chips, the analysis and the processing of the temperature data aiming at the power amplifier chips are lacked, the fault risk prediction aiming at the power amplifier chips is lacked, the pre-maintenance aiming at the power amplifier is difficult to realize, and the fault risk investigation is difficult to realize.
Disclosure of Invention
In order to solve the technical problem, a solution is provided, and the technical solution solves the problems in the prior art that thermal performance monitoring for a power amplifier chip is usually only performed on temperature data acquisition of the power amplifier chip, analysis and processing of the temperature data of the power amplifier chip are lacked, failure risk prediction for the power amplifier chip is lacked, and pre-maintenance and failure risk troubleshooting for the power amplifier are difficult to implement.
In order to achieve the above purposes, the technical scheme adopted by the invention is as follows:
a method of monitoring thermal performance of a power amplifier chip, comprising:
acquiring performance parameters of a power amplifier chip, wherein the performance parameters comprise the maximum junction temperature of the power amplifier chip and the heat dissipation resistance of the power amplifier chip;
monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time, and calculating real-time junction temperature data of the power amplifier chip according to the shell temperature of the power amplifier chip and the operating power of the power amplifier chip;
recording real-time junction temperature data of the power amplifier chip, and establishing a real-time junction temperature-running time data table of the power amplifier chip;
establishing a power amplifier chip failure risk prediction model, wherein the power amplifier chip failure risk prediction model takes a real-time junction temperature-running time data table of a power amplifier chip as input and takes the power amplifier chip failure risk probability as output;
inputting data in a real-time junction temperature-running time data table of the power amplifier chip into a power amplifier chip fault risk prediction model to obtain a risk probability value of the power amplifier chip;
comparing the risk probability value of the power amplifier chip with a preset value, and judging whether the risk probability value of the power amplifier chip is greater than the preset value;
if yes, judging that the chip fault risk is high, and outputting a high-risk signal, and if not, judging that the chip fault risk is low, and outputting a low-risk signal.
Preferably, the calculation method of the real-time junction temperature data of the power amplifier chip comprises the following steps:
monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time, and acquiring shell temperature data of the power amplifier chip and operating power data of the power amplifier chip;
calculating real-time junction temperature data of the power amplifier chip according to a real-time junction temperature formula, wherein the real-time junction temperature formula is as follows:
Figure SMS_1
in the formula (I), the compound is shown in the specification,
Figure SMS_2
for real-time junction temperature data of the power amplifier chip at time t,
Figure SMS_3
real-time shell temperature data at time t for the amplifier chip,
Figure SMS_4
for the operational power data of the power amplifier chip at time t,
Figure SMS_5
the heat dissipation thermal resistance of the power amplifier chip.
Preferably, the recording of the real-time junction temperature data of the power amplifier chip specifically includes:
judging whether the real-time junction temperature data of the power amplifier chip is greater than the maximum junction temperature of the power amplifier chip;
if so, recording the time corresponding to the real-time junction temperature data of the power amplifier chip as excess time, and if not, recording the time corresponding to the real-time junction temperature data of the power amplifier chip as normal time;
and the real-time junction temperature data of the power amplifier chip are in one-to-one correspondence with the corresponding moments, and a real-time junction temperature-running time data table is established.
Preferably, the risk probability value calculation step of the power amplifier chip is as follows:
analyzing data in the real-time junction temperature-operation time data to obtain a plurality of excess time periods in the operation process of the power amplifier chip;
calculating the excess index of the power amplifier chip according to the real-time junction temperature data of the power amplifier chip in a plurality of excess time periods;
inputting the excess index of the power amplifier chip and the working time of the power amplifier chip into a risk probability value calculation formula to obtain a risk probability value of the power amplifier chip;
wherein the risk probability value calculation formula is as follows:
Figure SMS_6
in the formula (I), the compound is shown in the specification,
Figure SMS_7
as a risk probability value of the power amplifier chip,
Figure SMS_8
as an over-rating for the power amplifier chip,
Figure SMS_9
for the duration of the operation of the power amplifier chip,
Figure SMS_10
are all coefficients of a risk probability value calculation formula.
Preferably, the calculation process of the coefficient of the risk probability value calculation formula is as follows:
acquiring real-time junction temperature-running time historical data tables of a plurality of groups of power amplifier chips with the same model;
grouping real-time junction temperature-running time historical data tables of a plurality of groups of power amplifier chips with the same model according to whether the power amplifier chips have faults or not, and obtaining a plurality of groups of non-fault real-time junction temperature-running time historical data and fault real-time junction temperature-running time historical data;
calculating a historical excess index according to the real-time junction temperature-running time historical data table;
according to a plurality of groups of historical excess indexes and working hours of the un-fault real-time junction temperature-running time historical data and the fault real-time junction temperature-running time historical data, the maximum likelihood method is used for carrying out
Figure SMS_11
And (4) calculating.
Preferably, the calculation process of the excess indicator of the power amplifier chip is as follows:
calculating the excess index of the power amplifier chip in each excess time period according to an excess index calculation formula;
calculating according to the excess indexes of a plurality of excess time periods and an excess index calculation formula to obtain the excess index of the power amplifier chip;
wherein, the excess index calculation formula is as follows:
Figure SMS_12
in the formula (I), the compound is shown in the specification,
Figure SMS_13
is the excess index of the power amplifier chip in the ith excess period,
Figure SMS_14
at the start of the ith excess period,
Figure SMS_15
at the termination of the ith excess period,
Figure SMS_16
for real-time junction temperature data during the ith excess period,
Figure SMS_17
maximum junction temperature data of the power amplifier chip;
the excess index calculation formula is as follows:
Figure SMS_18
in the formula (I), the compound is shown in the specification,
Figure SMS_19
is an excess indicator of the power amplifier chip,
Figure SMS_20
is the number of excess time periods.
Further, a power amplifier chip thermal performance monitoring system is provided, which is used for implementing the power amplifier chip thermal performance monitoring method, and is characterized by including:
the processor is used for calculating real-time junction temperature data of the power amplifier chip, establishing a real-time junction temperature-running time data table of the power amplifier chip, establishing a power amplifier chip fault risk prediction model, calculating a risk probability value of the power amplifier chip and judging whether the risk probability value of the power amplifier chip is greater than a preset value or not;
a memory coupled to the processor, the memory for storing a power amplifier chip failure risk prediction model and a real-time junction temperature-run time history data table for the power amplifier chip;
the monitoring module is electrically connected with the processor and is used for monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time;
and the output module is electrically connected with the processor and is used for outputting high-risk signals or outputting low-risk signals.
Optionally, the processor is internally integrated with:
the first calculating unit is used for calculating real-time junction temperature data of the power amplifier chip according to the shell temperature of the power amplifier chip and the running power of the power amplifier chip;
the first judging unit is used for judging whether the real-time junction temperature data of the power amplifier chip is larger than the maximum junction temperature of the power amplifier chip;
a data processing unit for establishing a real-time junction temperature-run time data table;
the model calculation unit is used for establishing and solving a power amplifier chip fault risk prediction model;
the second calculation unit is used for calculating the risk probability value of the power amplifier chip;
and the second judging unit is used for judging whether the risk probability value of the power amplifier chip is greater than a preset value or not.
Optionally, the monitoring module includes:
the temperature detection unit is used for monitoring the shell temperature of the power amplifier chip;
and the power detection unit is used for detecting and acquiring the operating power of the power amplifier chip.
Still further, a computer-readable storage medium is proposed, on which a computer-readable program is stored, wherein the computer-readable program, when invoked, performs the method for monitoring the thermal performance of a power amplifier chip as described above.
Compared with the prior art, the invention has the beneficial effects that:
the invention provides a scheme for monitoring the thermal performance of a power amplifier chip, which is characterized in that the scheme is used for analyzing the collected thermal performance data of the power amplifier chip, dividing the running state of the power amplifier chip into an excess time period and a normal time period, calculating the fault risk value of the power amplifier chip by combining the excess index of the excess time period and the working time of the power amplifier chip, judging whether the power amplifier chip has the risk of fault according to the predicted and calculated fault risk value of the power amplifier chip, further realizing the risk monitoring aiming at the power amplifier chip, timely performing pre-maintenance and fault risk investigation on the power amplifier chip in the power amplifier, and avoiding the shutdown of the power amplifier caused by the fault of the power amplifier chip to cause greater loss.
Drawings
FIG. 1 is a block diagram of a power amplifier chip thermal performance monitoring system according to the present invention;
FIG. 2 is a flow chart of a method for monitoring the thermal performance of a power amplifier chip according to the present invention;
FIG. 3 is a flow chart of a method of calculating real-time junction temperature data in accordance with the present invention;
fig. 4 is a flow chart of a real-time junction temperature data recording method of a power amplifier chip according to the present invention;
FIG. 5 is a flowchart of a risk probability value calculation method of a power amplifier chip according to the present invention;
FIG. 6 is a flowchart of a method for calculating coefficients of a risk probability value calculation formula according to the present invention
Fig. 7 is a flowchart of a method for calculating an excess indicator of a power amplifier chip according to the present invention.
Detailed Description
The following description is presented to disclose the invention so as to enable any person skilled in the art to practice the invention. The preferred real-time examples in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art.
Referring to fig. 1, a power amplifier chip thermal performance monitoring system includes:
the processor is used for calculating real-time junction temperature data of the power amplifier chip, establishing a real-time junction temperature-running time data table of the power amplifier chip, establishing a power amplifier chip fault risk prediction model, calculating a risk probability value of the power amplifier chip and judging whether the risk probability value of the power amplifier chip is greater than a preset value or not;
the memory is coupled with the processor and is used for storing a power amplifier chip fault risk prediction model and a real-time junction temperature-running time historical data table of the power amplifier chip;
the monitoring module is electrically connected with the processor and is used for monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time;
and the output module is electrically connected with the processor and is used for outputting high-risk signals or outputting low-risk signals.
The processor is internally integrated with:
the first calculating unit is used for calculating real-time junction temperature data of the power amplifier chip according to the shell temperature of the power amplifier chip and the operating power of the power amplifier chip;
the first judging unit is used for judging whether the real-time junction temperature data of the power amplifier chip is larger than the maximum junction temperature of the power amplifier chip;
the data processing unit is used for establishing a real-time junction temperature-running time data table;
the model calculation unit is used for establishing and solving a power amplifier chip fault risk prediction model;
the second calculation unit is used for calculating the risk probability value of the power amplifier chip;
and the second judging unit is used for judging whether the risk probability value of the power amplifier chip is greater than a preset value or not.
The monitoring module includes:
the temperature detection unit is used for monitoring the shell temperature of the power amplifier chip;
and the power detection unit is used for detecting and acquiring the operating power of the power amplifier chip.
The working process of the power amplifier chip thermal performance monitoring system is as follows:
the method comprises the following steps: the model calculation unit calls real-time junction temperature-running time historical data tables of power amplifier chips of different models from the memory, establishes fault risk prediction models of the power amplifier chips of different models and stores the fault risk prediction models of the power amplifier chips into the memory;
step two: the temperature detection unit and the power detection unit monitor the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time and transmit detection data to the processor;
step three: the first calculating unit calculates real-time junction temperature data of the power amplifier chip according to the detection data;
step four: the first judging unit judges whether the real-time junction temperature data of the power amplifier chip is larger than the maximum junction temperature of the power amplifier chip;
step five: the data processing unit establishes a real-time junction temperature-running time data table according to the judgment result of the first judgment unit;
step six: the second calculation unit calls a power amplifier chip fault risk prediction model from the memory and calculates a risk probability value of the power amplifier chip according to the real-time junction temperature-running time data table;
step seven: the second judgment unit judges whether the risk probability value of the power amplifier chip is greater than a preset value;
step eight: the output module outputs a high-risk signal or a low-risk signal according to the judgment result of the second judgment unit.
Referring to fig. 2, further, in combination with the above power amplifier chip thermal performance monitoring system, the present disclosure provides a power amplifier chip thermal performance monitoring method, including:
acquiring performance parameters of the power amplifier chip, wherein the performance parameters comprise the maximum junction temperature of the power amplifier chip and the heat dissipation resistance of the power amplifier chip;
monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time, and calculating real-time junction temperature data of the power amplifier chip according to the shell temperature of the power amplifier chip and the operating power of the power amplifier chip;
recording real-time junction temperature data of the power amplifier chip, and establishing a real-time junction temperature-running time data table of the power amplifier chip;
establishing a power amplifier chip failure risk prediction model, wherein the power amplifier chip failure risk prediction model takes a real-time junction temperature-running time data table of a power amplifier chip as input and takes the power amplifier chip failure risk probability as output;
inputting data in a real-time junction temperature-running time data table of the power amplifier chip into a power amplifier chip fault risk prediction model to obtain a risk probability value of the power amplifier chip;
comparing the risk probability value of the power amplifier chip with a preset value, and judging whether the risk probability value of the power amplifier chip is greater than the preset value;
if yes, judging that the chip fault risk is high, and outputting a high-risk signal, and if not, judging that the chip fault risk is low, and outputting a low-risk signal.
The method comprises the steps of analyzing the collected thermal performance data of the power amplifier chip, dividing the running state of the power amplifier chip into an excess time period and a normal time period, calculating the fault risk value of the power amplifier chip by combining the excess index of the excess time period and the working time of the power amplifier chip, judging whether the power amplifier chip has the risk of fault according to the predicted and calculated fault risk value of the power amplifier chip, and further realizing risk monitoring aiming at the power amplifier chip.
Referring to fig. 3, a method for calculating real-time junction temperature data of a power amplifier chip includes:
monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time, and acquiring shell temperature data of the power amplifier chip and operating power data of the power amplifier chip;
calculating real-time junction temperature data of the power amplifier chip according to a real-time junction temperature formula, wherein the real-time junction temperature formula is as follows:
Figure SMS_21
in the formula (I), the compound is shown in the specification,
Figure SMS_22
for real-time junction temperature data of the power amplifier chip at time t,
Figure SMS_23
real-time shell temperature data at time t for the amplifier chip,
Figure SMS_24
for the operational power data of the power amplifier chip at time t,
Figure SMS_25
the heat dissipation thermal resistance of the power amplifier chip.
Because the internal junction temperature of the power amplifier chip cannot be measured in a normal state, the internal junction temperature of the power amplifier chip is calculated by measuring the shell temperature of the power amplifier chip and combining the heat dissipation thermal resistance of the power amplifier chip in the scheme.
Referring to fig. 4, the recording of the real-time junction temperature data of the power amplifier chip specifically includes:
judging whether the real-time junction temperature data of the power amplifier chip is larger than the maximum junction temperature of the power amplifier chip;
if so, recording the time corresponding to the real-time junction temperature data of the power amplifier chip as excess time, and if not, recording the time corresponding to the real-time junction temperature data of the power amplifier chip as normal time;
and the real-time junction temperature data of the power amplifier chip is in one-to-one correspondence with the corresponding time to establish a real-time junction temperature-running time data table.
The method comprises the steps of establishing a one-to-one correspondence relation between real-time junction temperature and operation time, further obtaining operation state data of the power amplifier chip at each moment, and further providing data support for drawing a real-time junction temperature-operation time curve by establishing a real-time junction temperature-operation time data table.
Referring to fig. 5, the calculation of the risk probability value of the power amplifier chip includes the following steps:
analyzing data in the real-time junction temperature-operation time data to acquire a plurality of excess time periods in the operation process of the power amplifier chip;
calculating the excess index of the power amplifier chip according to the real-time junction temperature data of the power amplifier chip in a plurality of excess time periods;
inputting the excess index of the power amplifier chip and the working time of the power amplifier chip into a risk probability value calculation formula to obtain a risk probability value of the power amplifier chip;
wherein, the risk probability value calculation formula is as follows:
Figure SMS_26
in the formula (I), the compound is shown in the specification,
Figure SMS_27
as a risk probability value of the power amplifier chip,
Figure SMS_28
is an excess indicator of the power amplifier chip,
Figure SMS_29
for the duration of the operation of the power amplifier chip,
Figure SMS_30
all are coefficients of a risk probability value calculation formula;
referring to fig. 6, the calculation process of the coefficients of the risk probability value calculation formula is as follows:
acquiring real-time junction temperature-running time historical data tables of a plurality of groups of power amplifier chips with the same model;
grouping the real-time junction temperature-operation time historical data tables of a plurality of groups of power amplifier chips with the same model according to whether the power amplifier chips have faults or not, and obtaining a plurality of groups of non-fault real-time junction temperature-operation time historical data and fault real-time junction temperature-operation time historical data;
calculating a historical excess index according to the real-time junction temperature-running time historical data table;
according to a plurality of groups of non-failure real-time junction temperature-operation time historical data and failure real-time junction temperature-operation time historical data, historical excess indexes and working duration are carried out by a maximum likelihood method
Figure SMS_31
The calculation of (2).
The risk probability value calculation formula provided by the scheme is established based on the Logistic regression model principle, a fault risk prediction model is established, and the Logistic regression model is a generalized linear regression analysis model and is commonly used in the fields of data mining, result prediction and the like;
the risk probability value calculation formula provided by the scheme is used for predicting and calculating the fault probability of the power amplifier chip by calculating the excess index of the power amplifier chip in the excess operation time period and combining the working time length of the power amplifier chip, and judging whether the power amplifier chip has the risk of fault according to the predicted and calculated fault probability of the power amplifier chip, so that the power amplifier chip in the power amplifier can be maintained in advance and the fault risk can be eliminated in time;
in the scheme, an independent risk probability value calculation formula is established for each power amplifier chip of different types in the power amplifier, and the probability of the power amplifier chip of each different type failing is predicted and calculated through the risk probability value calculation formula corresponding to the power amplifier chip of each different type.
Referring to fig. 7, the process of calculating the excess indicator of the power amplifier chip is as follows:
calculating the excess index of the power amplifier chip in each excess time period according to an excess index calculation formula;
calculating according to the excess indexes of a plurality of excess time periods and an excess index calculation formula to obtain the excess index of the power amplifier chip;
wherein, the excess index calculation formula is as follows:
Figure SMS_32
in the formula (I), the compound is shown in the specification,
Figure SMS_33
is the excess index of the power amplifier chip in the ith excess period,
Figure SMS_34
at the start of the ith excess period,
Figure SMS_35
at the termination time of the ith excess period,
Figure SMS_36
for real-time junction temperature data during the ith excess period,
Figure SMS_37
maximum junction temperature data of the power amplifier chip;
the excess index calculation formula is as follows:
Figure SMS_38
in the formula (I), the compound is shown in the specification,
Figure SMS_39
as an over-rating for the power amplifier chip,
Figure SMS_40
is the number of excess time periods.
For the calculation of the excess index, in the present scheme, the excess value of the junction temperature in the excess time period is calculated, and the integral calculation is performed on the excess time, and it can be understood by those skilled in the art that the greater the excess value of the junction temperature in the excess time period is, the longer the excess time is, the greater the damage caused to the power amplifier chip is, and the excess index of the power amplifier chip in the current operating state can be obtained by summing the excess indexes in a plurality of excess time periods.
Still further, the present invention also provides a computer readable storage medium, on which a computer readable program is stored, wherein the computer readable program is invoked to execute the method for monitoring the thermal performance of the power amplifier chip as described above.
It is understood that the computer readable storage medium may be a magnetic medium, such as a floppy disk, a hard disk, a magnetic tape; optical media such as DVD; or semiconductor media such as solid state disk SolidStateDisk, SSD, etc.
In summary, the invention has the advantages that: the scheme for monitoring the thermal performance of the power amplifier chip is provided, the power amplifier chip in the power amplifier can be maintained in advance in time, fault risks can be eliminated, and the power amplifier is prevented from being shut down due to the fact that the power amplifier chip fails, and larger loss is caused.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the principles of the invention have been described in the foregoing examples and the description with reference to the examples, but that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (10)

1. A method for monitoring thermal performance of a power amplifier chip, comprising:
acquiring performance parameters of a power amplifier chip, wherein the performance parameters comprise the maximum junction temperature of the power amplifier chip and the heat dissipation resistance of the power amplifier chip;
monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time, and calculating real-time junction temperature data of the power amplifier chip according to the shell temperature of the power amplifier chip and the operating power of the power amplifier chip;
recording real-time junction temperature data of the power amplifier chip, and establishing a real-time junction temperature-running time data table of the power amplifier chip;
establishing a power amplifier chip failure risk prediction model, wherein the power amplifier chip failure risk prediction model takes a real-time junction temperature-running time data table of a power amplifier chip as input and takes the power amplifier chip failure risk probability as output;
inputting data in a real-time junction temperature-running time data table of the power amplifier chip into a power amplifier chip fault risk prediction model to obtain a risk probability value of the power amplifier chip;
comparing the risk probability value of the power amplifier chip with a preset value, and judging whether the risk probability value of the power amplifier chip is greater than the preset value;
if yes, judging that the chip fault risk is high, and outputting a high-risk signal, and if not, judging that the chip fault risk is low, and outputting a low-risk signal.
2. The method for monitoring the thermal performance of the power amplifier chip as claimed in claim 1, wherein the method for calculating the real-time junction temperature data of the power amplifier chip comprises:
monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time, and acquiring shell temperature data of the power amplifier chip and operating power data of the power amplifier chip;
calculating real-time junction temperature data of the power amplifier chip according to a real-time junction temperature formula, wherein the real-time junction temperature formula is as follows:
Figure QLYQS_1
in the formula (I), the compound is shown in the specification,
Figure QLYQS_2
for real-time junction temperature data of the power amplifier chip at time t,
Figure QLYQS_3
real-time shell temperature data at time t for the amplifier chip,
Figure QLYQS_4
for the operational power data of the power amplifier chip at time t,
Figure QLYQS_5
the heat dissipation thermal resistance of the power amplifier chip.
3. The method for monitoring the thermal performance of the power amplifier chip according to claim 1, wherein the recording of the real-time junction temperature data of the power amplifier chip specifically comprises:
judging whether the real-time junction temperature data of the power amplifier chip is larger than the maximum junction temperature of the power amplifier chip;
if so, recording the time corresponding to the real-time junction temperature data of the power amplifier chip as an excess time, and if not, recording the time corresponding to the real-time junction temperature data of the power amplifier chip as a normal time;
and the real-time junction temperature data of the power amplifier chip are in one-to-one correspondence with the corresponding moments, and a real-time junction temperature-running time data table is established.
4. The method for monitoring the thermal performance of the power amplifier chip as claimed in claim 3, wherein the step of calculating the risk probability value of the power amplifier chip comprises:
analyzing data in the real-time junction temperature-operation time data to acquire a plurality of excess time periods in the operation process of the power amplifier chip;
calculating the excess index of the power amplifier chip according to the real-time junction temperature data of the power amplifier chip in a plurality of excess time periods;
inputting the excess index of the power amplifier chip and the working time of the power amplifier chip into a risk probability value calculation formula to obtain a risk probability value of the power amplifier chip;
wherein the risk probability value calculation formula is as follows:
Figure QLYQS_6
in the formula (I), the compound is shown in the specification,
Figure QLYQS_7
as a risk probability value of the power amplifier chip,
Figure QLYQS_8
is an excess indicator of the power amplifier chip,
Figure QLYQS_9
for the duration of the operation of the power amplifier chip,
Figure QLYQS_10
are all coefficients of a risk probability value calculation formula.
5. The method as claimed in claim 4, wherein the risk probability value calculation formula includes the following steps:
acquiring real-time junction temperature-running time historical data tables of a plurality of groups of power amplifier chips with the same model;
grouping real-time junction temperature-running time historical data tables of a plurality of groups of power amplifier chips with the same model according to whether the power amplifier chips have faults or not, and obtaining a plurality of groups of non-fault real-time junction temperature-running time historical data and fault real-time junction temperature-running time historical data;
calculating a historical excess index according to the real-time junction temperature-running time historical data table;
according to a plurality of groups of historical excess indexes and working hours of the un-fault real-time junction temperature-running time historical data and the fault real-time junction temperature-running time historical data, the maximum likelihood method is used for carrying out
Figure QLYQS_11
And (4) calculating.
6. The method of claim 5, wherein the excess indicator of the power amplifier chip is calculated by:
calculating the excess index of the power amplifier chip in each excess time period according to an excess index calculation formula;
calculating according to the excess indexes of a plurality of excess time periods and an excess index calculation formula to obtain the excess index of the power amplifier chip;
wherein, the excess index calculation formula is as follows:
Figure QLYQS_12
in the formula (I), the compound is shown in the specification,
Figure QLYQS_13
is the excess index of the power amplifier chip in the ith excess period,
Figure QLYQS_14
at the start of the ith surplus period,
Figure QLYQS_15
at the termination of the ith excess period,
Figure QLYQS_16
for real-time junction temperature data during the ith excess period,
Figure QLYQS_17
is the maximum junction of the power amplifier chipTemperature data;
the excess index calculation formula is as follows:
Figure QLYQS_18
in the formula (I), the compound is shown in the specification,
Figure QLYQS_19
as an over-rating for the power amplifier chip,
Figure QLYQS_20
is the number of excess time periods.
7. A power amplifier chip thermal performance monitoring system for implementing a power amplifier chip thermal performance monitoring method according to any one of claims 1-6, comprising:
the processor is used for calculating real-time junction temperature data of the power amplifier chip, establishing a real-time junction temperature-running time data table of the power amplifier chip, establishing a power amplifier chip fault risk prediction model, calculating a risk probability value of the power amplifier chip and judging whether the risk probability value of the power amplifier chip is greater than a preset value or not;
the memory is coupled with the processor and is used for storing a power amplifier chip fault risk prediction model and a real-time junction temperature-running time historical data table of the power amplifier chip;
the monitoring module is electrically connected with the processor and is used for monitoring the shell temperature of the power amplifier chip and the operating power of the power amplifier chip in real time;
and the output module is electrically connected with the processor and is used for outputting high-risk signals or outputting low-risk signals.
8. The power amplifier chip thermal performance monitoring system of claim 7, wherein the processor has integrated therein:
the calculating unit is used for calculating real-time junction temperature data of the power amplifier chip according to the shell temperature of the power amplifier chip and the running power of the power amplifier chip;
the first judging unit is used for judging whether the real-time junction temperature data of the power amplifier chip is larger than the maximum junction temperature of the power amplifier chip;
a data processing unit for establishing a real-time junction temperature-run time data table;
the model calculation unit is used for establishing and solving a power amplifier chip fault risk prediction model;
the second calculation unit is used for calculating the risk probability value of the power amplifier chip;
and the second judging unit is used for judging whether the risk probability value of the power amplifier chip is greater than a preset value.
9. The system of claim 8, wherein the monitoring module comprises:
the temperature detection unit is used for monitoring the shell temperature of the power amplifier chip;
and the power detection unit is used for detecting and acquiring the operating power of the power amplifier chip.
10. A computer readable storage medium having a computer readable program stored thereon, wherein the computer readable program when invoked performs the method of power amplifier chip thermal performance monitoring of any of claims 1-6.
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