CN115799048A - Method for reducing photoresist loss in graphical etching process - Google Patents

Abstract

The invention discloses a method for reducing photoresist loss in a graphical etching process, which comprises the following steps: step one, forming a first material layer on the surface of a wafer. And step two, carrying out a photoetching process to form a photoresist pattern. And step three, carrying out pretreatment, wherein the surface of the photoresist pattern is carbonized and solidified by adopting the bombardment effect of plasma, and a carbon-rich masking layer is formed. And fourthly, performing a first etching process to form a first material layer pattern, wherein the carbon-rich masking layer is used for reducing the loss of the photoresist pattern and ensuring that the photoresist pattern is remained on the top surface of the first material layer pattern in each area of the wafer after the first etching process is completed. And step five, removing the photoresist pattern. The invention can reduce the loss of the photoresist in the etching process of the material layer and ensure that the photoresist is still reserved on the top surface of the pattern of the material layer after the etching process is finished, thereby avoiding the loss of the material layer, such as the generation of a chamfer angle.

Description

Method for reducing photoresist loss in graphical etching process

Technical Field

The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a method for reducing photoresist loss in a graphical etching process.

Background

As shown in fig. 1A to 1B, the device structure is schematically illustrated in each step of the conventional patterning etching process method for the metal layer 103 a; the existing graphical etching process method of the metal layer 103a comprises the following steps:

in step one, as shown in fig. 1A, a metal layer 103a is formed on a surface of a Wafer (Wafer) made of a semiconductor substrate 101.

The semiconductor substrate 101 includes a silicon substrate.

The Metal layer pattern 103 to be formed later includes a Metal Line (Metal Line).

The material of the metal layer 103a includes Al.

A dielectric layer 102 is also typically formed on the bottom of the metal layer 103a. The dielectric layer 102 typically employs an oxide layer and serves as an interlayer film that provides isolation between the different metal layers 103a.

Step two, as shown in fig. 1A, a Photoresist (PR) pattern 104 is formed by a photolithography process, and the photoresist pattern 104 defines a pattern of the metal layer 103a.

And step three, as shown in fig. 1B, performing a metal layer etching process, wherein the metal layer etching process etches the metal layer 103a by using the photoresist pattern 104 as a mask to form a metal layer pattern 103.

In an actual process, the metal layer etching process may generate Loss (Loss) to the photoresist pattern 104 at the same time, and the lost photoresist pattern is represented by a mark 104a alone.

As the Line width of the Metal layer 103, such as a Metal Line, is continuously reduced, the Wafer edge etching rate is higher, so that PR Loss is excessive, and a bevel is generated at the top of the Metal Line, such as a dashed Line 105, which affects the device characteristics.

As shown in fig. 2, it is a photo of a metal line formed by a conventional patterning etching process method of a metal layer; in fig. 2, the top area of the metal line is shown by the dashed circle 106, and it can be seen that a chamfering defect occurs.

Disclosure of Invention

The technical problem to be solved by the invention is to provide a method for reducing the photoresist loss in the graphical etching process, which can reduce the photoresist loss in the etching process of the material layer and ensure that the photoresist is still reserved on the top surface of the graph of the material layer after the etching process is finished, thereby avoiding the material layer from generating loss such as chamfering.

In order to solve the technical problem, the method for reducing the photoresist loss in the graphical etching process comprises the following steps:

step one, forming a first material layer needing to be patterned on the surface of a wafer consisting of a semiconductor substrate.

And secondly, carrying out a photoetching process to form a photoresist pattern, wherein the photoresist pattern defines the pattern of the first material layer.

And thirdly, pretreating the surface of the photoresist pattern, wherein the pretreatment adopts the plasma bombardment effect to carbonize and solidify the surface of the photoresist pattern, so as to form a carbon-rich masking layer.

And fourthly, performing a first etching process, wherein the first etching process etches the first material layer by taking the photoresist pattern as a mask to form a first material layer pattern, the first etching process simultaneously generates loss on the photoresist pattern, the carbon-rich masking layer is used for reducing the loss of the photoresist pattern in the first etching process, and the photoresist pattern is ensured to be reserved on the top surface of the first material layer pattern in each area of the wafer after the first etching process is completed, so that the corner cutting defect of the first material layer pattern is eliminated.

And fifthly, removing the photoresist pattern.

In a further refinement, the semiconductor substrate comprises a silicon substrate.

In a further refinement, the first material layer comprises a metal layer.

In a further improvement, in step two, the photolithography process includes:

and coating photoresist on the surface of the first material layer.

And exposing and developing the photoresist to form the photoresist pattern.

The further improvement is that in the fourth step, the first etching process adopts plasma dry etching.

The further improvement is that the pretreatment of the third step is carried out by adopting the plasma etching machine of the first etching process in the fourth step.

The further improvement is that the third step and the fourth step are continuously carried out, and the continuous steps comprise:

and transferring the wafer into an etching process cavity of the plasma etching machine of the first etching process.

And performing the third step in the etching process cavity, and then performing the fourth step.

In a further improvement, in the third step, the pretreatment is performed by argon plasma bombardment.

In a further improvement, in the third step, the pretreatment process conditions include:

the process gas is argon and the process time is 15 to 25 seconds.

The process pressure of the pretreatment is the process pressure of the first etching process;

the radio frequency power of the pretreatment is smaller than that of the first etching process.

In a further improvement, in the fourth step, the process conditions of the first etching process include:

the process gas includes Cl2, BCL3, and N2.

The process pressure is up to several millitorr (mTorr).

The radio frequency power includes a bias power having a peak value of 100W and a source power having a peak value of 1000W.

In a further improvement, the peak value of the bias power of the preprocessed radio frequency power is 100W;

the peak value of the source power of the preprocessed radio frequency power is 400W.

In a further improvement, the surface of the carbon-rich masking layer has a rugged topography.

In a further improvement, in the pretreatment, the flow of argon gas was 100sccm.

The process pressure of the first etching process is 8 mTorr.

In a further refinement, the material of the metal layer of the first material layer comprises Al.

In a further refinement, the first material layer pattern comprises metal lines.

After the photoetching process is finished and before the first etching process is carried out, the pretreatment process for the surface of the photoresist pattern is added, the pretreatment process utilizes plasma bombardment to carbonize and harden the surface of the photoresist pattern so as to form a carbon-rich covering layer, and the carbon-rich covering layer has higher hardness, so that the loss of the photoresist pattern in the first etching process can be reduced, and the photoresist pattern with a certain thickness still remains in the first material layer pattern after the first etching process is finished.

The invention is particularly suitable for the graphical etching process of the first material layer which is the metal layer, can prevent the graph of the metal layer such as a metal wire from generating chamfering, particularly can prevent the metal wire at the edge of a wafer from generating chamfering, and thus can ensure the electrical properties of the metal wire such as resistance and the like.

In addition, when the first etching process adopts a plasma dry etching process, the pretreatment of the third step can be realized by adopting a plasma etching machine of the first etching process and can be realized by adopting the same etching process cavity, and the pretreatment can be realized by changing process gas and radio frequency power on the basis of not changing the set process pressure of the first etching process, so that the third step and the fourth step can be continuously carried out, the realization is convenient, the cost is simple, and the realization can be realized by adding one step (step) in a process menu (recipe) of the first etching process.

Drawings

The invention is described in further detail below with reference to the following figures and detailed description:

FIGS. 1A-1B are schematic views of device structures in various steps of a conventional metal layer patterning etching process;

FIG. 2 is a photograph of a metal line formed by a conventional metal layer patterning process;

FIG. 3 is a flow chart of a method of reducing photoresist loss in a patterned etch process in accordance with an embodiment of the present invention;

FIGS. 4A-4C are schematic diagrams of device structures at various steps of a method for reducing photoresist loss in a patterned etching process according to an embodiment of the present invention;

FIG. 5A is a photograph of a corresponding photoresist pattern of FIG. 4A;

FIG. 5B is a photograph of a photoresist pattern of FIG. 4B after forming a carbon rich masking layer;

FIG. 5C is a photograph of a pattern of a first material layer formed by a method for reducing photoresist loss in a patterned etch process in accordance with an embodiment of the present invention;

FIG. 6 is a graph showing the comparison of the photoresist loss rate during the first etching process of the method according to the embodiment of the present invention and the etching process of the metal layer in the conventional method for patterning the metal layer;

FIG. 7A is a photograph of dense metal lines in the middle region of a wafer after the completion of the etching process of the metal layer by the conventional patterning etching process method for the metal layer;

FIG. 7B is a photograph of isolated metal lines in the middle region of a wafer after the completion of the etching process of the metal layer according to the conventional patterning etching process method for the metal layer;

FIG. 7C is a photograph of dense metal lines in the edge area of the wafer after the etching process of the metal layer is completed by the conventional patterning etching process method for the metal layer;

FIG. 7D is a photograph of isolated metal lines in the edge region of a wafer after the completion of the etching process of the metal layer according to the conventional patterning etching process method for the metal layer;

FIG. 8A is a photograph of dense metal lines in the middle region of a wafer after a first etching process is completed by a method for reducing photoresist loss in a patterned etching process in accordance with an embodiment of the present invention;

FIG. 8B is a photograph of isolated metal lines in the middle region of a wafer after the first etching process is completed by the method for reducing photoresist loss in a patterned etching process of an embodiment of the present invention;

FIG. 8C is a photograph of dense metal lines in the edge region of a wafer after a first etching process is completed by the method for reducing photoresist loss in a patterned etching process in accordance with an embodiment of the present invention;

fig. 8D is a photograph of isolated metal lines in the edge region of the wafer after the first etching process is completed by the method for reducing photoresist loss in the patterned etching process of the present invention.

Detailed Description

FIG. 3 is a flow chart of a method for reducing photoresist loss in a patterned etch process according to an embodiment of the invention; fig. 4A to 4C are schematic diagrams of device structures in the steps of the method for reducing the photoresist loss in the patterned etching process according to the embodiment of the invention; the method for reducing the photoresist loss in the graphical etching process comprises the following steps:

in step one, as shown in fig. 4A, a first material layer 203a to be patterned is formed on a wafer surface composed of a semiconductor substrate 201.

In the embodiment of the present invention, the semiconductor substrate 201 includes a silicon substrate.

The first material layer 203a includes a metal layer. At this time, the first material layer pattern 203 to be subsequently formed includes a metal line.

The material of the metal layer of the first material layer 203a includes Al.

A dielectric layer 202 is also typically formed on the bottom of the metal layer. The dielectric layer 202 is typically an oxide layer and serves as an interlayer film that provides isolation between the various metal layers.

In other embodiments, the first material layer 203a can be other materials than metal, such as a dielectric layer.

Step two, as shown in fig. 4A, a photolithography process is performed to form a photoresist pattern 204, and the photoresist pattern 204 defines a pattern of the first material layer 203a.

In an embodiment of the present invention, the photolithography process includes:

and coating photoresist on the surface of the first material layer 203a.

And exposing and developing the photoresist to form the photoresist pattern 204.

Step three, as shown in fig. 4B, the surface of the photoresist pattern 204 is pretreated, and the pretreatment uses a plasma bombardment effect to carbonize and solidify the surface of the photoresist pattern 204, so as to form a carbon-rich masking layer 205.

In the embodiment of the invention, the pretreatment adopts argon plasma bombardment. The arrowed line 206 in fig. 4B represents the argon plasma bombardment, and Ar + represents argon ions.

The surface of the carbon-rich masking layer 205 has a rugged topography.

Step four, as shown in fig. 4C, performing a first etching process, where the first etching process etches the first material layer 203a with the photoresist pattern 204 as a mask to form a first material layer pattern 203, the first etching process simultaneously generates a loss to the photoresist pattern 204, and the carbon-rich mask layer 205 is used to reduce the loss of the photoresist pattern 204 in the first etching process, and after the first etching process is completed, the photoresist pattern 204a is ensured to remain on the top surface of the first material layer pattern 203 in each region of the wafer, so as to eliminate the chamfering defect of the first material layer pattern 203. In fig. 4C, the first material layer pattern is represented by reference 203 alone, and the photoresist pattern after depletion is represented by reference 204a alone.

In the embodiment of the invention, the first etching process adopts plasma dry etching.

In some preferred embodiments, the pretreatment of step three is performed by using a plasma etching machine of the first etching process in step four. In other embodiments, the pretreatment in step three can also be performed by using a different plasma etching machine from that in step four.

In some preferred embodiments, step three and step four are performed sequentially, the sequential steps comprising:

and transferring the wafer into an etching process cavity of the plasma etching machine of the first etching process. In some embodiments, the plasma etching machine adopts a DRU machine, and the DRU represents the type number of the etching machine. In the actual process, the specific model of the etching machine can be selected according to the actual condition, and the first etching process can be realized.

And performing the third step in the etching process cavity, and then performing the fourth step.

In the third step, the process conditions of the pretreatment comprise:

the process gas is argon and the process time is 15 to 25 seconds.

The process pressure of the pretreatment is the process pressure of the first etching process;

the radio frequency power of the pretreatment is smaller than that of the first etching process.

In the fourth step, the process conditions of the first etching process include:

the process gas includes Cl2, BCL3, and N2. In some embodiments, the Cl2 flow is 50sccm, the BCL3 flow is 45sccm, and the N2 flow is 5 sccm.

The process pressure can be up to several millitorr, for example, 8 millitorr.

The radio frequency power includes a bias power having a peak value of 100W and a source power having a peak value of 1000W. For example: the bias power has a peak value of 120W CW and the source power has a peak value of 1200W CW.

The peak value of the bias power of the preprocessed radio frequency power is 100W;

the peak value of the source power of the preprocessed radio frequency power is 400W.

In the pretreatment, the flow rate of argon gas was 100sccm.

And step five, removing the photoresist pattern 204.

According to the embodiment of the invention, after the photoetching process is finished and before the first etching process is carried out, the pretreatment process for the surface of the photoresist pattern 204 is added, the pretreatment process utilizes plasma bombardment to carbonize and harden the surface of the photoresist pattern 204 and form a layer of carbon-rich masking layer 205, the carbon-rich masking layer 205 has higher hardness, so that the loss of the photoresist pattern 204 in the first etching process can be reduced, and the photoresist pattern 204 with a certain thickness still remains on the first material layer pattern 203 after the first etching process is finished, and because the photoresist pattern 204 is protected on the top surface of the first material layer pattern 203 in the first etching process, the material layer can be prevented from being lost, such as the generation of a bevel angle.

The embodiment of the invention is particularly suitable for the patterning etching process of the metal layer of the first material layer 203a, and can prevent the metal layer pattern such as a metal wire from generating chamfering, particularly prevent the metal wire at the edge of a wafer from generating chamfering, so that the performance of the metal wire, such as the electrical performance of resistance and the like, can be ensured.

In addition, in the embodiment of the invention, when the first etching process adopts a plasma dry etching process, the pretreatment of the third step can be realized by adopting a plasma etching machine of the first etching process and can be realized by adopting the same etching process cavity, and the pretreatment can be realized by changing process gas and radio frequency power on the basis of not changing the set process pressure of the first etching process, so that the third step and the fourth step can be continuously carried out, the realization is convenient, the cost is simple, and the realization can be realized by adding a step in the recipe of the first etching process.

As shown in fig. 5A, is a photograph of a photoresist pattern corresponding to fig. 4A, wherein bars 301 represent the photoresist pattern.

FIG. 5B is a photograph of the resist pattern of FIG. 4B after forming a carbon-rich mask layer; bars 302 represent the photoresist pattern after the carbon-rich masking layer is covered. Comparing the bars 301 and 302, the shapes of the two are not changed, but the surface of the bar 302 is rougher, and the rough surface is the carbon-rich mask layer.

FIG. 5C is a photograph showing the first material layer pattern formed by the method for reducing the photoresist loss in the patterned etching process according to the embodiment of the invention; in the embodiment of the present invention, the first material layer pattern 203 is a metal wire, and thus the bar-shaped patterns 303 in fig. 5C are all metal wires, which shows that the metal wire has a good structure and does not have a top angle, i.e., a corner cutting defect.

The photographs in fig. 5A to 5C are photographs obtained by scanning with a Scanning Electron Microscope (SEM).

As shown in fig. 6, it is a curve comparing the photoresist loss rate in the etching process of the metal layer in the first etching process of the method of the embodiment of the present invention and the existing patterned etching process of the metal layer; the abscissa indicates the location of different regions on the wafer and the ordinate indicates the photoresist consumption rate. Curve 401 represents the photoresist wear rate in the first etching process of the conventional method, i.e., the corresponding metal layer etching process, and curve 402 represents the photoresist wear rate in the first etching process of the embodiment of the present invention. This increases the remaining thickness of the photoresist after the first etching process is completed, thereby preventing the first material layer pattern from being directly exposed without being etched, thereby causing loss. The following is further illustrated by comparison with SEM photographs:

as shown in fig. 7A, it is a photo of the dense metal lines in the middle area of the wafer after the etching process of the metal layer is completed by the existing patterning etching process method for the metal layer; the Dense metal lines in the middle region of the wafer are denoted by Center depth. The metal lines of the dense metal lines are arranged alternately. In fig. 7A, the bottom of the dotted line AA represents the metal line 502, the top of the dotted line AA represents the remaining photoresist 501, and in the following fig. 7A to 8D, the photoresist 501 and the metal line 502 are also separated by the dotted line AA, and the marks AA, 501 and 502 are not shown in the following fig. 7A to 8D. It can be seen that in fig. 7A, the top regions of the metal lines 502 all have the remaining photoresist 501.

FIG. 7B is a photograph of isolated metal lines in the middle region of a wafer after the completion of the etching process of the metal layer according to the conventional patterning etching process method for the metal layer; the isolated metal lines in the middle region of the wafer are represented by Center ISO. The isolated wire has no other wires around its perimeter. It can be seen that in fig. 7B, the top regions of the metal lines 502 all have the remaining photoresist 501.

Fig. 7C is a photograph of dense metal lines in the edge area of the wafer after the etching process of the metal layer is completed by the conventional patterning etching process method for the metal layer. And the Dense metal lines in the Edge area of the wafer are represented by Edge Dense. It can be seen that the photoresist 501 in fig. 7C becomes 0 in thickness at the top corner of the metal line 502 shown by the dotted circle 503, so that the metal line 502 at the bottom is exposed and thus chamfered.

Fig. 7D is a photograph of an isolated metal line in the edge region of a wafer after the etching process of the metal layer is completed by the conventional patterning etching process method for the metal layer. And the isolated metal lines in the Edge area of the wafer are expressed by Edge ISO. It can be seen that the photoresist 501 in fig. 7D becomes 0 in thickness at the top corner of the metal line 502 shown by the dashed circle 504, so that the bottom metal line 502 is exposed and thus chamfered.

FIG. 8A is a photograph of dense metal lines in the middle region of a wafer after a first etching process is completed by a method for reducing photoresist loss in a patterned etching process in accordance with an embodiment of the present invention; it can be seen that in fig. 8A, regions on top of the metal line 502 have the remaining photoresist 501.

FIG. 8B is a photograph of isolated metal lines in the middle region of a wafer after a first etching process is completed by the method for reducing photoresist loss in a patterned etching process in accordance with an embodiment of the present invention; it can be seen that in fig. 8B, regions on top of the metal line 502 have the remaining photoresist 501.

Fig. 8C is a photograph of dense metal lines in the edge region of the wafer after the first etching process is completed by the method for reducing the photoresist loss in the patterned etching process of the present invention. It can be seen that in fig. 8C, regions on top of the metal line 502 all have the remaining photoresist 501; for example, the dashed circle 505 of fig. 8C corresponds to the thinnest portion of the photoresist 501, which still has a certain thickness.

Fig. 8D is a photograph of isolated metal lines in the edge region of the wafer after the first etching process is completed by the method for reducing photoresist loss in a patterned etching process in accordance with an embodiment of the present invention. It can be seen that in fig. 8D, regions on top of the metal line 502 have the remaining photoresist 501. For example, the dashed circle 506 of fig. 8D corresponds to the thinnest portion of the photoresist 501, which still has a certain thickness.

Comparing fig. 8C and 7C and comparing fig. 8D and 7D, it can be seen that the method of the embodiment of the invention does not generate the chamfering defect in the dense metal lines and the isolated metal lines in the edge region of the wafer.

The present invention has been described in detail with reference to the specific embodiments, but these are not to be construed as limiting the invention. Many variations and modifications can be made by one skilled in the art without departing from the principles of the invention, which should also be considered as within the scope of the invention.

Claims (15)

1. A method for reducing photoresist loss in a patterned etching process is characterized by comprising the following steps:

step one, forming a first material layer needing to be patterned on the surface of a wafer consisting of a semiconductor substrate;

performing a photoetching process to form a photoresist pattern, wherein the photoresist pattern defines the pattern of the first material layer;

thirdly, preprocessing the surface of the photoresist pattern, wherein the preprocessing adopts the plasma bombardment effect to carbonize and solidify the surface of the photoresist pattern so as to form a carbon-rich masking layer;

performing a first etching process, wherein the first etching process etches the first material layer by taking the photoresist pattern as a mask to form a first material layer pattern, the first etching process simultaneously generates loss on the photoresist pattern, the carbon-rich masking layer is used for reducing the loss of the photoresist pattern in the first etching process, and the photoresist pattern is ensured to be reserved on the top surface of the first material layer pattern in each area of the wafer after the first etching process is completed, so that the corner cutting defect of the first material layer pattern is eliminated;

and fifthly, removing the photoresist pattern.

2. The method for reducing photoresist loss in a patterned etch process of claim 1 wherein: the semiconductor substrate includes a silicon substrate.

3. The method of reducing photoresist loss in a patterned etch process of claim 2, wherein: the first material layer includes a metal layer.

4. The method for reducing photoresist loss in a patterned etch process of claim 1 wherein: in the second step, the photolithography process includes:

coating photoresist on the surface of the first material layer;

and exposing and developing the photoresist to form the photoresist pattern.

5. The method of reducing photoresist loss in a patterned etch process of claim 3, wherein: in the fourth step, the first etching process adopts plasma dry etching.

6. The method of reducing photoresist loss in a patterned etch process of claim 5, wherein: and the pretreatment in the third step is carried out by adopting the plasma etching machine of the first etching process in the fourth step.

7. The method of reducing photoresist loss in a patterned etch process of claim 6, wherein: the third step and the fourth step are continuously carried out, and the continuous steps comprise:

transferring the wafer into an etching process cavity of the plasma etching machine of the first etching process;

and performing the third step in the etching process cavity, and then performing the fourth step.

8. The method of reducing photoresist loss in a patterned etch process of claim 7, wherein: in the third step, the pretreatment adopts argon plasma bombardment.

9. The method of reducing photoresist loss in a patterned etch process of claim 8, wherein: in the third step, the process conditions of the pretreatment comprise:

the process gas is argon, and the process time is 15 to 25 seconds;

the process pressure of the pretreatment is the process pressure of the first etching process;

the radio frequency power of the pretreatment is smaller than that of the first etching process.

10. The method of claim 9, wherein the step of reducing photoresist loss comprises: in the fourth step, the process conditions of the first etching process include:

the process gas comprises Cl2, BCL3 and N2;

the process pressure reaches several millitorr;

the radio frequency power includes a bias power having a peak value of 100W and a source power having a peak value of 1000W.

11. The method of reducing photoresist loss in a patterned etch process of claim 10, wherein: the peak value of the bias power of the preprocessed radio frequency power is 100W;

the peak value of the source power of the preprocessed radio frequency power is 400W.

12. The method of reducing photoresist loss in a patterned etch process of claim 1, wherein: the surface of the carbon-rich masking layer has a rugged shape.

13. The method of claim 9, wherein the reducing the photoresist loss comprises: in the pretreatment, the argon flow is 100sccm;

the process pressure of the first etching process is 8 mTorr.

14. The method of reducing photoresist loss in a patterned etch process of claim 3, wherein: the material of the metal layer of the first material layer includes Al.

15. A method for reducing photoresist loss in a patterned etch process as claimed in claim 3 or 14, wherein: the first material layer pattern includes a metal line.

Images