CN115767927A - Fine circuit board based on semi-additive process, preparation method, surface treatment method and application thereof - Google Patents
Fine circuit board based on semi-additive process, preparation method, surface treatment method and application thereof Download PDFInfo
- Publication number
- CN115767927A CN115767927A CN202211369939.6A CN202211369939A CN115767927A CN 115767927 A CN115767927 A CN 115767927A CN 202211369939 A CN202211369939 A CN 202211369939A CN 115767927 A CN115767927 A CN 115767927A
- Authority
- CN
- China
- Prior art keywords
- substrate
- fine
- fine circuit
- surface treatment
- semi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 68
- 238000004381 surface treatment Methods 0.000 title claims abstract description 36
- 230000008569 process Effects 0.000 title claims abstract description 28
- 239000000654 additive Substances 0.000 title claims abstract description 23
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 101
- 230000004048 modification Effects 0.000 claims abstract description 18
- 238000012986 modification Methods 0.000 claims abstract description 18
- TXDNPSYEJHXKMK-UHFFFAOYSA-N sulfanylsilane Chemical compound S[SiH3] TXDNPSYEJHXKMK-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 17
- 229910052802 copper Inorganic materials 0.000 claims description 17
- 239000010949 copper Substances 0.000 claims description 17
- 238000004519 manufacturing process Methods 0.000 claims description 14
- 238000009713 electroplating Methods 0.000 claims description 7
- 238000005234 chemical deposition Methods 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000011347 resin Substances 0.000 claims description 6
- UUEWCQRISZBELL-UHFFFAOYSA-N 3-trimethoxysilylpropane-1-thiol Chemical compound CO[Si](OC)(OC)CCCS UUEWCQRISZBELL-UHFFFAOYSA-N 0.000 claims description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 4
- 238000009832 plasma treatment Methods 0.000 claims description 4
- IKYAJDOSWUATPI-UHFFFAOYSA-N 3-[dimethoxy(methyl)silyl]propane-1-thiol Chemical compound CO[Si](C)(OC)CCCS IKYAJDOSWUATPI-UHFFFAOYSA-N 0.000 claims description 3
- DCQBZYNUSLHVJC-UHFFFAOYSA-N 3-triethoxysilylpropane-1-thiol Chemical compound CCO[Si](OCC)(OCC)CCCS DCQBZYNUSLHVJC-UHFFFAOYSA-N 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 2
- 239000000919 ceramic Substances 0.000 claims description 2
- 239000011521 glass Substances 0.000 claims description 2
- 239000007769 metal material Substances 0.000 claims description 2
- 238000005498 polishing Methods 0.000 claims description 2
- 229910021645 metal ion Inorganic materials 0.000 abstract description 5
- 230000009471 action Effects 0.000 abstract description 3
- 125000002887 hydroxy group Chemical group [H]O* 0.000 abstract description 2
- 239000000463 material Substances 0.000 abstract description 2
- 238000004806 packaging method and process Methods 0.000 abstract description 2
- 230000009467 reduction Effects 0.000 abstract description 2
- 125000003396 thiol group Chemical class [H]S* 0.000 abstract description 2
- 230000007797 corrosion Effects 0.000 description 7
- 238000005260 corrosion Methods 0.000 description 7
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 230000009920 chelation Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 2
- 229910001431 copper ion Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 239000011295 pitch Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 150000003573 thiols Chemical class 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
A fine circuit board based on a semi-additive process and a preparation method, a surface treatment method and application thereof; relates to the technical field of chip packaging; the method comprises the following steps: 1) Carrying out hydrophilic modification treatment on the surface of the substrate to form a hydroxylated surface to obtain a hydrophilic substrate; 2) Covering a piezoresistance dry film on the hydrophilic substrate, exposing and developing to form a fine circuit pattern and obtain a substrate containing the pattern; 3) And carrying out sulfhydrylation treatment on the substrate containing the pattern through mercaptosilane, and removing the photoresist dry film to obtain the substrate with the modified surface of the fine circuit area. According to the invention, the surface of the substrate is subjected to hydrophilic modification treatment to expose hydroxyl, and then mercaptosilane is selectively deposited in a region required by a corresponding fine line, so that the substrate is coated with mercapto; the metal ions can be effectively adsorbed by utilizing the strong chelating action between the sulfydryl and the metal ions, and a seed layer with strong interface bonding force with a substrate material is formed after reduction, so that the bonding force between the seed layer and the substrate is greatly improved.
Description
Technical Field
The invention belongs to the technical field of chip packaging, and particularly relates to a fine circuit board based on a semi-additive process, and a preparation method, a surface treatment method and application thereof.
Background
The semi-additive process is a well-established production method for high-density IC carriers in the production of fine circuits. The method comprises the main steps of firstly applying a copper seed layer on a substrate dielectric material, then patterning and electroplating a fine circuit, and finally removing unnecessary copper and the seed layer. At present, fine circuits prepared by a semi-additive process have been widely used for high-density interconnection circuit boards having line widths and line pitches of less than 50 μm.
The circuit board produced by the semi-additive process has the advantages of superfine line width and line distance, low roughness of metal lines and the like. However, the electroless copper plating still suffers from poor adhesion between the seed layer and the substrate and the resulting sidewall corrosion. If the seed layer adhesive force under the fine circuit can be locally improved in a patterning mode, the problems of side wall corrosion and circuit corrosion falling can be effectively reduced, and the yield and the production efficiency of the system are effectively improved.
Disclosure of Invention
In order to overcome the defects of the prior art, an object of the present invention is to provide a surface treatment method for a fine circuit substrate, which can effectively improve the metal ion adsorption performance of the substrate and improve the adhesion between the substrate and the fine circuit.
The second object of the present invention is to provide an application of the surface treatment method of fine circuit substrate.
The invention also aims to provide a preparation method of the fine circuit board based on the semi-addition process, which can improve the interface bonding force between the fine circuit and the substrate, control the thickness of the fine circuit and improve the problems of side wall corrosion and circuit falling of the fine circuit board.
The fourth purpose of the invention is to provide a fine circuit board based on the semi-additive process, which has small line width and line distance and is not easy to fall off.
One of the purposes of the invention is realized by adopting the following technical scheme:
a surface treatment method of a fine circuit substrate includes the steps of:
1) Carrying out hydrophilic modification treatment on the surface of the substrate to form a hydroxylated surface to obtain a hydrophilic substrate;
2) Covering a piezoresistance dry film on the hydrophilic substrate, exposing and developing to form a fine circuit pattern, and obtaining a substrate containing the pattern;
3) And carrying out sulfhydrylation treatment on the substrate containing the pattern through mercaptosilane, and removing the light resistance dry film to obtain the substrate with the surface modified in the fine circuit area.
Further, in step 1), the method of the hydrophilic modification treatment is at least one of plasma treatment, ultraviolet treatment and ozone treatment.
Further, the substrate is made of any one or a combination of two or more of glass, ceramic, silicon wafers, epoxy resin, BT resin and PI resin.
Further, in step 3), the operation of the sulfhydrylation treatment is as follows: the mercaptosilane in the gas phase is selectively deposited on the fine line pattern region of the substrate.
Further, the mercaptosilane is at least one of 3-mercaptopropyltrimethoxysilane, 3-mercaptopropyltriethoxysilane and mercaptopropylmethyldimethoxysilane.
The second purpose of the invention is realized by adopting the following technical scheme:
the application of the surface treatment method of the fine circuit substrate in the production of fine circuit boards.
The third purpose of the invention is realized by adopting the following technical scheme:
a preparation method of a fine circuit board based on a semi-additive process comprises the following steps:
s1, carrying out surface treatment on a substrate by adopting the surface treatment method of the fine circuit substrate to obtain a surface-treated substrate;
s2, carrying out chemical deposition of copper on the surface of the substrate subjected to surface treatment to form a seed layer;
s3, performing secondary laminating of a photoresist dry film on the seed layer in the step S2, exposing and developing, and electroplating to form a fine circuit;
and S4, removing the photoresist dry film from the substrate containing the fine circuit in the step S3, and then etching to remove the seed layer to obtain the fine circuit board.
Further, in step S3, the metal material of the fine wiring is any one or a combination of two or more of copper, gold, and silver.
Further, in step S4, the line width of the fine circuit in the fine circuit board is 1-200 μm, and the line pitch is 1-200 μm.
The fourth purpose of the invention is realized by adopting the following technical scheme:
a fine circuit board based on a semi-additive process is manufactured by the manufacturing method of the fine circuit board based on the semi-additive process.
Compared with the prior art, the invention has the beneficial effects that:
the invention relates to a surface treatment method of a fine circuit substrate, which comprises the steps of carrying out hydrophilic modification treatment on the surface of the substrate to expose hydroxyl, and then selectively depositing mercaptosilane in a region required by a corresponding fine circuit, so that the substrate is coated with mercapto; by utilizing the strong chelation between the sulfydryl and the metal ions, the metal ions can be effectively adsorbed, and a seed layer with strong interface binding force with a substrate material is formed after reduction, so that the binding force between the seed layer and the substrate is greatly improved.
According to the preparation method of the fine circuit board based on the semi-addition process, after the substrate is selectively covered with the sulfydryl by using the surface treatment method, the seed layer of copper is chemically deposited, so that the exposure area corresponding to the fine circuit has extremely high interface binding force under the strong chelation action of the sulfydryl and copper ions; meanwhile, the bonding force between the copper seed layer of the non-exposure area and the substrate is weak, the copper seed layer is easy to etch and remove, and after a fine circuit is further electroplated on the seed layer by using a semi-additive process, the superfine line width and line distance processing effect of the fine circuit is realized, and the problems of side wall corrosion and circuit falling of the fine circuit are solved.
The fine circuit board based on the semi-additive process has the advantages of small line width and line distance, controllable thickness, low roughness of the metal circuit and difficulty in falling off of the fine circuit.
Drawings
Fig. 1 is a process flow diagram of a surface treatment method of a fine wiring substrate of the present invention.
Fig. 2 is a schematic structural view of a chemical deposition seed layer in the method for manufacturing a fine wiring board based on a semi-additive process according to the present invention.
Fig. 3 is a process flow diagram of a method for manufacturing a fine wiring board based on a semi-additive process according to the present invention.
FIG. 4 is a schematic view of a fine wiring board obtained in example 4 of the present invention.
Wherein, 1, a substrate; 2. a seed layer; 3. a photoresist dry film; 4. fine lines.
Detailed Description
The present invention is further described below with reference to specific embodiments, and it should be noted that, without conflict, any combination between the embodiments or technical features described below may form a new embodiment.
Example 1
A surface treatment method of a fine circuit substrate, referring to fig. 1, comprising the steps of:
1) Carrying out hydrophilic modification treatment on the surface of the substrate to form a hydroxylated surface to obtain a hydrophilic substrate; the substrate is made of epoxy resin; the hydrophilic modification treatment method includes, but is not limited to, plasma treatment, ultraviolet treatment and ozone treatment, and preferably, the hydrophilic modification treatment method is plasma treatment, the treatment power is 10-100W, and the treatment time is 10s-10min.
2) Covering a piezoresistance dry film on the hydrophilic substrate, exposing and developing to form a fine circuit pattern, and obtaining a substrate containing the pattern;
3) And carrying out sulfhydrylation treatment on the substrate containing the pattern through mercaptosilane, and removing the light resistance dry film to obtain the substrate with the sulfhydrylation modification on the surface of the fine circuit area.
Further, the mercaptosilane is 3-mercaptopropyltrimethoxysilane; the thiol treatment of this example was carried out specifically as follows: putting a substrate to be processed into a vacuum cavity, wherein the volume of the cavity is 1-100L; then dripping 1-100ml of 3-mercaptopropyl trimethoxy silane liquid into the cavity, then vacuumizing, and keeping the vacuum degree to be less than 0.1 atmospheric pressure; standing for 30 minutes in vacuum to complete the sulfhydrylation surface modification.
Example 2
A surface treatment method of a fine circuit substrate, referring to fig. 1, comprising the steps of:
1) Carrying out hydrophilic modification treatment on the surface of the substrate to form a hydroxylated surface to obtain a hydrophilic substrate; the substrate is made of BT resin; the hydrophilic modification treatment method is ultraviolet treatment.
2) Covering a piezoresistance dry film on the hydrophilic substrate, exposing and developing to form a fine circuit pattern, and obtaining a substrate containing the pattern;
3) And carrying out sulfhydrylation treatment on the substrate containing the pattern through mercaptosilane, and removing the light resistance dry film to obtain the substrate with the sulfhydrylation modification on the surface of the fine circuit area.
Further, the operation of the sulfhydrylation treatment is as follows: selectively depositing a gas phase of mercaptosilane on a fine line pattern region of a substrate; the mercaptosilane is 3-mercaptopropyltriethoxysilane.
Example 3
A surface treatment method of a fine circuit substrate, referring to fig. 1, comprising the steps of:
1) Carrying out hydrophilic modification treatment on the surface of the substrate to form a hydroxylated surface to obtain a hydrophilic substrate; the substrate is made of PI resin; the hydrophilic modification treatment method is ozone treatment.
2) Covering a piezoresistance dry film on the hydrophilic substrate, exposing and developing to form a fine circuit pattern, and obtaining a substrate containing the pattern;
3) And carrying out sulfhydrylation treatment on the substrate containing the pattern through mercaptosilane, and removing the light resistance dry film to obtain the substrate with the sulfhydrylation modification on the surface of the fine circuit area.
Further, the sulfhydrylation treatment was performed by: selectively depositing a gas phase of mercaptosilane on a fine line pattern region of a substrate; the mercaptosilane is mercaptopropyl-methyldimethoxysilane.
Example 4
A method for manufacturing a fine circuit board based on a semi-additive process, referring to fig. 2-3, includes the following steps:
s1, carrying out surface treatment on a substrate 1 by adopting the surface treatment method of the fine circuit substrate described in embodiment 1, and then carrying out chemical deposition of copper on the surface of the substrate 1 subjected to the surface treatment to form a seed layer 2;
s2, performing secondary press polishing on the photoresist dry film 3 on the seed layer 2 in the step S1, exposing and developing to determine the area of the fine circuit;
s3, electroplating the substrate obtained in the step S2, wherein the electroplated metal is copper, and forming a fine circuit 4;
s4, removing the photoresist dry film 3 from the blank plate containing the fine circuit obtained in the step S3 to expose the seed layer 2;
s5, etching the blank plate obtained in the step S4 to remove the exposed seed layer 2, so as to obtain a fine circuit board; the fine circuit in the fine circuit board has a line width of 1-10 μm and a line distance of 1-50 μm.
Referring to fig. 4, the method for manufacturing a fine circuit board of this embodiment can form a fine circuit with a line width and a line distance within 10 μm, and the high-density circuit has a complete structure without significant problems of side wall corrosion and circuit peeling.
Example 5
A method for manufacturing a fine circuit board based on a semi-additive process, referring to fig. 2-3, includes the following steps:
s1, carrying out surface treatment on a substrate 1 by adopting the surface treatment method of the fine circuit substrate described in embodiment 2, and then carrying out chemical deposition of copper on the surface of the substrate 1 subjected to the surface treatment to form a seed layer 2;
s2, performing secondary laminating of the photoresist dry film 3 on the seed layer 2 in the step S1, exposing and developing, and determining the area of a fine circuit;
s3, electroplating the substrate obtained in the step S2, wherein the electroplated metal is gold, and forming a fine circuit 4;
s4, removing the photoresist dry film 3 from the blank plate containing the fine circuit obtained in the step S3 to expose the seed layer 2;
s5, etching the blank plate obtained in the step S4 to remove the exposed seed layer 2, so as to obtain a fine circuit board; the fine circuit in the fine circuit board has a line width of 10-30 μm and a line distance of 10-100 μm.
Example 6
A method for manufacturing a fine circuit board based on a semi-additive process is disclosed, referring to FIGS. 2-3, and comprises the following steps:
s1, carrying out surface treatment on a substrate 1 by adopting the surface treatment method of the fine circuit substrate described in embodiment 3, and then carrying out chemical deposition of copper on the surface of the substrate 1 subjected to the surface treatment to form a seed layer 2;
s2, performing secondary laminating of the photoresist dry film 3 on the seed layer 2 in the step S1, exposing and developing, and determining the area of a fine circuit;
s3, electroplating the substrate obtained in the step S2, wherein the electroplated metal is silver, and forming a fine circuit 4;
s4, removing the photoresist dry film 3 from the blank plate containing the fine circuit obtained in the step S3 to expose the seed layer 2;
s5, etching the blank plate obtained in the step S4 to remove the exposed seed layer 2, so as to obtain a fine circuit board; the line width of the fine circuit in the fine circuit board is 100-200 mu m, and the line distance is 50-200 mu m.
According to the preparation method of the fine circuit board based on the semi-addition process, after the substrate is selectively covered with the sulfydryl by using a surface treatment method, the seed layer of copper is chemically deposited, so that the exposure area corresponding to the fine circuit has extremely high interface binding force under the strong chelation action of the sulfydryl and copper ions; meanwhile, the bonding force between the copper seed layer of the non-exposure area and the substrate is weak, the copper seed layer is easy to remove through etching, and after a fine circuit is further formed on the seed layer through electroplating by using a semi-additive process, the superfine line width and line distance processing effect of the fine circuit is achieved, and the problems of side wall corrosion and circuit falling of the fine circuit are solved.
The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are within the protection scope of the present invention.
Claims (10)
1. A surface treatment method of a fine circuit substrate is characterized by comprising the following steps:
1) Carrying out hydrophilic modification treatment on the surface of the substrate to form a hydroxylated surface to obtain a hydrophilic substrate;
2) Covering a piezoresistance dry film on the hydrophilic substrate, exposing and developing to form a fine circuit pattern, and obtaining a substrate containing the pattern;
3) And carrying out sulfhydrylation treatment on the substrate containing the pattern through mercaptosilane, and removing the light resistance dry film to obtain the substrate with the surface modified in the fine circuit area.
2. The surface treatment method of a fine wiring substrate as set forth in claim 1, wherein: in the step 1), the hydrophilic modification treatment method is at least one of plasma treatment, ultraviolet treatment and ozone treatment.
3. The surface treatment method of a fine wiring substrate as set forth in claim 1, wherein: the substrate is made of any one or a combination of more than two of glass, ceramics, silicon chips, epoxy resin, BT resin and PI resin.
4. The surface treatment method of a fine wiring substrate as set forth in claim 1, wherein: in the step 3), the operation of sulfhydrylation treatment is as follows: the mercaptosilane in the gas phase is selectively deposited on the fine line pattern regions of the substrate.
5. The surface treatment method of a fine wiring substrate as set forth in claim 1 or 4, characterized in that: the mercaptosilane is at least one of 3-mercaptopropyltrimethoxysilane, 3-mercaptopropyltriethoxysilane and mercaptopropylmethyldimethoxysilane.
6. Use of the surface treatment method for a fine wiring substrate according to any one of claims 1 to 5 for producing a fine wiring board.
7. A preparation method of a fine circuit board based on a semi-additive process is characterized by comprising the following steps:
s1, performing surface treatment on a substrate by using the surface treatment method of the fine circuit substrate as set forth in any one of claims 1 to 5 to obtain a surface-treated substrate;
s2, carrying out chemical deposition of copper on the surface of the substrate subjected to surface treatment to form a seed layer;
s3, performing secondary press polishing dry film on the seed layer in the step S2, exposing and developing, and electroplating to form a fine circuit;
and S4, removing the photoresist dry film of the substrate containing the fine circuit in the step S3, and then etching to remove the seed layer to obtain the fine circuit board.
8. A method of manufacturing a fine wiring board based on a semi-additive process as claimed in claim 7, wherein: in step S3, the metal material of the fine line is one or a combination of two or more of copper, gold, and silver.
9. The method of manufacturing a fine wiring board based on a semi-additive process according to claim 7, wherein: in step S4, the line width of the fine circuit in the fine circuit board is 1-200 μm, and the line distance is 1-200 μm.
10. The utility model provides a meticulous circuit board based on semi-additive technology which characterized in that: a method of manufacturing a fine wiring board based on a semi-addition process according to any one of claims 7 to 9.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211369939.6A CN115767927A (en) | 2022-11-03 | 2022-11-03 | Fine circuit board based on semi-additive process, preparation method, surface treatment method and application thereof |
PCT/CN2023/070727 WO2024093022A1 (en) | 2022-11-03 | 2023-01-05 | Fine-line circuit board based on semi-additive process, preparation method therefor, surface treatment method, and use |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211369939.6A CN115767927A (en) | 2022-11-03 | 2022-11-03 | Fine circuit board based on semi-additive process, preparation method, surface treatment method and application thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
CN115767927A true CN115767927A (en) | 2023-03-07 |
Family
ID=85357636
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202211369939.6A Pending CN115767927A (en) | 2022-11-03 | 2022-11-03 | Fine circuit board based on semi-additive process, preparation method, surface treatment method and application thereof |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN115767927A (en) |
WO (1) | WO2024093022A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116960199A (en) * | 2023-09-20 | 2023-10-27 | 上海昕沐化学科技有限公司 | Manufacturing method of metal grid line electrode on heterojunction solar cell |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016066705A (en) * | 2014-09-25 | 2016-04-28 | イビデン株式会社 | Printed wiring board and method for manufacturing the same |
CN108337812A (en) * | 2018-03-27 | 2018-07-27 | 北京大学东莞光电研究院 | A method of preparing metal line on substrate |
CN108697002A (en) * | 2018-04-24 | 2018-10-23 | 深圳市斯普莱特激光科技有限公司 | A kind of laser processing formula high-precision circuit board manufacture craft |
CN111200912B (en) * | 2020-03-02 | 2021-08-03 | 厦门弘信电子科技集团股份有限公司 | Precision-improved fine line manufacturing method |
CN113873771A (en) * | 2021-10-25 | 2021-12-31 | 恒赫鼎富(苏州)电子有限公司 | Manufacturing process suitable for ultra-fine FPC (flexible printed circuit) circuit |
-
2022
- 2022-11-03 CN CN202211369939.6A patent/CN115767927A/en active Pending
-
2023
- 2023-01-05 WO PCT/CN2023/070727 patent/WO2024093022A1/en unknown
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116960199A (en) * | 2023-09-20 | 2023-10-27 | 上海昕沐化学科技有限公司 | Manufacturing method of metal grid line electrode on heterojunction solar cell |
CN116960199B (en) * | 2023-09-20 | 2023-12-01 | 上海昕沐化学科技有限公司 | Manufacturing method of metal grid line electrode on heterojunction solar cell |
Also Published As
Publication number | Publication date |
---|---|
WO2024093022A1 (en) | 2024-05-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100386869C (en) | Ball grid array substrate having window and method of fabricating same | |
US4857383A (en) | Synthetic substrate with adhesive metal layer | |
US8124880B2 (en) | Circuit board and method for manufacturing thereof | |
US20060060558A1 (en) | Method of fabricating package substrate using electroless nickel plating | |
EP0895447A2 (en) | A circuit board, a method for manufacturing same, and a method of electroless plating | |
DE102005041099A1 (en) | LED chip with glass coating and planar assembly and connection technology | |
CN103929890B (en) | A kind of manufacture method of circuit board internal layer circuit | |
CN115767927A (en) | Fine circuit board based on semi-additive process, preparation method, surface treatment method and application thereof | |
CN106852003A (en) | A kind of preparation method without resist layer fine-line plate | |
CN109041425A (en) | A kind of production method and products thereof of COF double-faced flexible substrate fine-line | |
CN112312662A (en) | Manufacturing method of fine circuit printed circuit board | |
CN105870026A (en) | Carrier and manufacturing method therefor, and method for manufacturing core-less packaging substrate from carrier | |
CN112672529A (en) | Method suitable for forming precise flexible circuit | |
US20130062106A1 (en) | Printed Circuit Board and Method of Manufacturing the Same | |
CN111200903A (en) | Method for manufacturing double-sided board of fine circuit | |
WO2018219220A1 (en) | Semi-embedded circuit substrate structure and manufacturing method therefor | |
US7951301B2 (en) | Method for producing a ceramic printed-circuit board | |
JP4640878B2 (en) | Method of manufacturing circuit board using low dielectric constant resin insulating layer and method of manufacturing thin film multilayer circuit film using low dielectric constant resin insulating layer | |
KR20210068581A (en) | Packaging substrate and semiconductor device including same | |
CN115551213A (en) | Method for coating side wall of copper-clad ceramic substrate with silver coating layer | |
CN112969297A (en) | Circuit board and method for manufacturing the same | |
CN104950539B (en) | A kind of production method of display panel | |
TWI268128B (en) | PCB ultra-thin circuit forming method | |
KR101109662B1 (en) | Method for fabricating ultra-high reliable micro-electronic package and micro-electronic package fabricated using thereof | |
CN111491456A (en) | Manufacturing method of printed circuit board with buried circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |