CN112969297A

CN112969297A - Circuit board and method for manufacturing the same

Info

Publication number: CN112969297A
Application number: CN201911275290.XA
Authority: CN
Inventors: 程石良
Original assignee: Unimicron Technology Corp
Current assignee: Unimicron Technology Corp
Priority date: 2019-12-12
Filing date: 2019-12-12
Publication date: 2021-06-15

Abstract

The present disclosure provides a circuit board and a method of manufacturing the same, the method of manufacturing the same including the following steps. A substrate is provided. At least one through hole is formed in the substrate. The first conductive layer is formed on the surface of the substrate and the inner wall of the through hole, and the first conductive layer is integrally formed on the surface and the inner wall. The etching stop layer is formed on the part of the first conductive layer on the surface of the substrate and on the part of the first conductive layer on the inner wall of the through hole. The second conductive layer is formed on the etching stop layer and the first conductive layer on the inner wall of the through hole, and the second conductive layer is integrally formed on the etching stop layer and the inner wall. Filling the through hole with a plug hole material to form a plug hole column. The second conductive layer is removed. And removing the etch stop layer. The disclosure improves the manufacturing process of the circuit board, reduces the thickness variation of the conductive layer, and utilizes the design of the etching stop layer to achieve the circuit board that the thickness of the conductive layer in the through hole is increased on the basis of not increasing the thickness of the conductive layer on the surface of the substrate.

Description

Circuit board and method for manufacturing the same

Technical Field

The present disclosure relates to the field of circuit boards, and more particularly, to a circuit board with a conductive layer having a thin and thick surface and a method for manufacturing the same.

Background

With the rapid development of the electronic industry, electronic products are also gradually entering the direction of multi-functional and high-performance research and development. To meet the requirements of high Integration and Miniaturization of semiconductor devices, the requirements of circuit boards are increasing. The multi-layer circuit board is usually provided with a through hole (via hole), and the conductive layer is laid in the via hole and connected with the conductive layer on the surface of the substrate, so as to communicate signals of each layer. The thickness variation of the conductive layer is too high and the conductive layer is too thick during the manufacturing process, so that the insertion loss (impedance loss) and impedance matching problem are serious in the 5G high-frequency high-speed circuit board.

With the increasing application of circuit boards, it is an urgent need to solve the problem of providing a circuit board capable of flexibly adjusting the thickness of a conductive layer according to different requirements and simultaneously reducing the variation of the thickness of the conductive layer on a through hole (via) of a multi-layer circuit board.

Disclosure of Invention

In order to achieve the above object, an object of the present disclosure is to provide a method for manufacturing a circuit board, comprising the steps of: a substrate is provided. Penetrating the substrate to form at least one through hole in the substrate. Forming a first conductive layer on the surface of the substrate and the inner wall of the through hole, wherein the first conductive layer is integrally formed on the surface and the inner wall. An etching stop layer is formed on the part of the first conductive layer on the surface of the substrate and on the part of the first conductive layer on the inner wall of the through hole. And forming a second conductive layer on the etching stop layer and the first conductive layer on the inner wall of the through hole, wherein the second conductive layer is integrally formed on the etching stop layer and the inner wall. Filling the plug hole material in the through hole to form a plug hole column. Removing the second conductive layer; and removing the etch stop layer.

According to one embodiment of the present disclosure, the substrate is formed by laminating a plurality of substrates.

According to an embodiment of the present disclosure, before the step of forming the first conductive layer, the method further includes removing the metal material on the surface of the substrate.

According to an embodiment of the present disclosure, the material of the first conductive layer is copper.

According to an embodiment of the present disclosure, a material of the etch stop layer is different from a material of the first conductive layer.

According to an embodiment of the present disclosure, the step of forming the etch stop layer further includes forming the etch stop layer on a portion of the first conductive layer located on an inner wall of the via.

According to one embodiment of the present disclosure, the step of forming the etch stop layer includes sputtering a metal on the first conductive layer using a sputtering method to form the etch stop layer.

According to an embodiment of the present disclosure, the metal comprises titanium, zinc, cobalt, chromium, or a combination thereof.

According to an embodiment of the present disclosure, the material of the second conductive layer is the same as the material of the first conductive layer.

According to an embodiment of the present disclosure, after forming the via post, the method further includes removing the via material protruding over the via post and a portion of the second conductive layer such that the via post is coplanar with the second conductive layer.

According to one embodiment of the present disclosure, the step of removing the second conductive layer includes removing the second conductive layer by polishing.

According to an embodiment of the present disclosure, the step of removing the etch stop layer includes removing the etch stop layer using a wet etching method, wherein an etching solution used in the wet etching method cannot remove the first conductive layer.

According to an embodiment of the present disclosure, after the step of removing the etching stop layer, the method further includes forming a third conductive layer on the first conductive layer and the via post.

In order to achieve the above objective, another objective of the present disclosure is to provide a circuit board including a substrate, at least one through hole, a conductive layer, and a via post. The through hole penetrates through the substrate. And the conducting layer is arranged on the surface of the substrate and the inner wall of the through hole, wherein the connecting part of the conducting layer on the surface and the inner wall is integrally formed. And the plug hole column is filled in the at least one through hole, and the conducting layer is positioned between the substrate and the plug hole column.

According to one embodiment of the present disclosure, the substrate comprises a multi-layer board.

According to an embodiment of the present disclosure, a thickness of the conductive layer in the through hole is greater than a thickness of the conductive layer on the surface of the substrate.

According to an embodiment of the present disclosure, the material of the conductive layer is copper.

According to one embodiment of the present disclosure, a portion of the conductive layer is located on the surface of the inner wall of the via hole edge, and the portion includes the sputtering material.

According to one embodiment of the present disclosure, the sputtering source material comprises titanium, zinc, cobalt, chromium, or alloys thereof.

According to an embodiment of the present disclosure, the material of the plug-hole pillar is an insulating material.

The above summary is intended to provide a simplified summary of the disclosure in order to provide a basic understanding to the reader. This summary is not an extensive overview of the disclosure and is intended to neither identify key/critical elements of the embodiments nor delineate the scope of the embodiments.

Drawings

The foregoing and other objects, features, advantages and embodiments of the disclosure will be more readily understood from the following description taken in conjunction with the accompanying drawings in which:

fig. 1 to 10 are schematic side views illustrating a method for manufacturing a circuit board according to an embodiment of the present disclosure at different stages of a manufacturing process.

[ description of main element symbols ]

100: substrate 102: base material

104: first surface 106: second surface

200. 200': first conductive layer 210: surface of

300: etch stop layers 400, 400': second conductive layer

500: plug hole column 600: third conductive layer

T: through hole w 1: thickness of

w 2: thickness of

Detailed Description

In order to make the description of the present disclosure more complete and complete, the following description is given for illustrative purposes, and for describing particular embodiments of the present disclosure; it is not intended to be the only form in which an embodiment of the present disclosure may be practiced or utilized. The various embodiments disclosed below may be combined with or substituted for one another where appropriate, and additional embodiments may be added to one embodiment without further recitation or description. As used herein, the singular includes the plural unless the context clearly dictates otherwise. Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment, and thus, the appearances of such phrases or in various places throughout this specification are not necessarily all referring to the same embodiment, nor are such features, structures, or characteristics particularly shown and described in connection with the embodiment, which may be desirable.

In the following description, numerous specific details are set forth to provide a thorough understanding of the following embodiments. However, embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown schematically in order to simplify the drawing.

The words used throughout this document generally represent their ordinary meaning, with some specific words being defined specifically below to provide additional guidance to the practitioner. For convenience, certain terminology may be specifically identified, e.g., using italics and/or quotation marks. The scope and meaning of the words used herein are not affected to any degree, regardless of whether they are specifically identified, and are intended to be equivalent to the scope and meaning of the ordinary words. It is to be understood that the same thing can be described in more than one way. Thus, alternative language and synonyms for one or more terms may be used herein, and are not intended to state that a term has any special meaning in what is discussed herein. Synonyms for certain words will be used, with repeated use of one or more synonyms not precluding use of other synonyms. Any examples discussed in this specification are intended for illustrative purposes only and are not intended to limit the scope or meaning of the disclosure or of the examples in any way. Likewise, the present disclosure is not limited to the various embodiments set forth in this specification.

In this document, unless the context requires otherwise, the word "a" and "an" may refer broadly to the singular or plural. It will be further understood that the terms "comprises," "comprising," "includes" and/or "including," when used herein, specify the presence of stated features, integers, steps, and/or operations, but do not preclude the presence or addition of one or more other features, integers, steps, and/or operations thereof.

As used herein, "about" generally refers to an error or range of values that is within about twenty percent, preferably within about ten percent, and more preferably within about five percent. Unless expressly stated otherwise, all numbers expressing quantities of ingredients, quantities, and so forth used in the specification are to be understood as being approximate, i.e., error or range.

One aspect of the present disclosure provides a method of manufacturing a circuit board. Fig. 1 to 10 are schematic side views illustrating a method for manufacturing a circuit board according to an embodiment of the present disclosure at different stages of a manufacturing process.

First, referring to fig. 1, a substrate 100 is provided. The substrate 100 is formed by laminating a plurality of substrates 102, or a multi-layer board may be used. The substrate 100 surfaces disclosed below may be the first surface 104 or/and the second surface 106. In some embodiments, the surface of the substrate 100 comprises copper foil.

Then, referring to fig. 2, at least one through hole T is formed in the substrate 100 by penetrating the substrate 100. The method of forming the via T may include mechanical drilling or other suitable via methods.

Next, referring to fig. 3, a first conductive layer 200 is formed on the surface of the substrate and the inner wall of the through hole (the first conductive layer 200 on the inner wall of the through hole refers to the first conductive layer 200'). In an embodiment of the present disclosure, particularly, the first conductive layer 200 is integrally formed on the surface of the substrate 100 and the inner wall of the through hole T, and through such a manufacturing process, compared to a method in which the conductive layers are respectively coated on the surface of the substrate 100 and the inner wall of the through hole T, the thickness variation of the first conductive layer 200 can be reduced, and further, the signal variation of the circuit board can be reduced, the stability of the circuit board can be improved, and the structural strength of the conductive layer can be better. In some embodiments, before the step of forming the first conductive layer 200, a metal material, such as a copper foil, on the surface of the substrate may be removed by chemical mechanical polishing or etching. In some embodiments, the first conductive layer 200 is formed by a method such as electroplating, the material of the first conductive layer is copper, and the thickness of the first conductive layer 200 is at least 5 μm, such as 5 μm to 20 μm, but not limited thereto.

Then, referring to fig. 4, an etching stop layer 300 is formed on the first conductive layer 200 on the surface of the substrate 100. In some embodiments, forming the etch stop layer 300 includes depositing one or more metals different from the material of the first conductive layer 200 on the portion of the first conductive layer 200 on the surface of the substrate 100 and also on the portion of the first conductive layer 200' on the inner wall of the via using sputtering or other suitable deposition techniques. An optional metal such as titanium, zinc, cobalt, chromium, or combinations of the foregoing. It should be noted that, compared to the electroplating method, the sputtering method for forming the etching stop layer 300 can reduce the amount of the etching stop layer 300 remaining on the first conductive layer 200 on the inner wall of the through hole T, and the thickness of the etching stop layer 300 formed by the method is much smaller than that of the electroplating method, which has better stability of the circuit board.

Then, referring to fig. 5, a second conductive layer 400 is formed on the etching stop layer 300 and the first conductive layer 200' (please also refer to fig. 4) located on the inner wall of the through hole T, and the second conductive layer 400 is integrally formed on the etching stop layer 300 and the inner wall. In some embodiments, the second conductive layer 400 is formed by a method such as electroplating. In some embodiments, the material of the second conductive layer is the same as the material of the first conductive layer 200, such as copper. It should be emphasized that, by forming the second conductive layer 400, the second conductive layer 400 ', and the second conductive layer 400 on the first conductive layer 200 ' at the inner wall of the through hole T, a higher thickness w2 of the conductive layer in the through hole T can be obtained, and is greater than the thickness w1 (please refer to fig. 3) of the first conductive layer 200 on the surface of the substrate 100 and the second conductive layer 200 ' in the through hole T, for example, 10 μm to 50 μm, so as to achieve the requirement of increasing the thickness of the conductive layer in the through hole T.

Next, referring to fig. 6, a plug hole material is filled in at least one through hole T to form a plug hole pillar 500. In some embodiments, the plug hole pillar 500 protrudes from the through hole T and partially extends to the surface of the second conductive layer 400 at the periphery of the hole edge of the through hole to seal the through hole T. In some embodiments, the plug hole material is an insulating material, such as a resin. In some embodiments, referring to fig. 7, after the via plug 500 is formed, the via plug material protruding from the via plug 500 and a portion of the second conductive layer 400 is removed, such that the via plug 500 is coplanar with the second conductive layer 400.

Next, in order to reduce the thickness of the conductive layer on the surface of the substrate 100, please refer to fig. 8, remove the second conductive layer 400 to expose the etching stop layer 300, so that the surface of the etching stop layer 300 is flush. In some embodiments, the method of removing the second conductive layer 400 includes polishing, such as physical polishing (e.g., brushing) or chemical mechanical polishing, or etching, such as wet etching. It is emphasized that, when the wet etching method is used, the etching solution used for etching the second conductive layer 400 has selectivity, i.e., the etching solution stops acting when removing the second conductive layer, and does not continue to act on the etching stop layer 300. In some embodiments, the material of the etch stop layer 300 is titanium, which is generally white, and can be used as a reference for observing the etching effect during the process of removing the second conductive layer 400. In some embodiments, when a wet etching method is used, the second conductive layer 400 is removed, and then a portion of the plug material protruding from the surface of the etch stop layer 300 is also removed, so that the plug 500 is coplanar with the etch stop layer 300.

Next, referring to fig. 9, the etching stop layer 300 is removed to expose the first conductive layer 200, and since the thickness of the etching stop layer 300 is negligibly thin, the surfaces of the first conductive layer 200 and the second conductive layer 400' are substantially flush. In some embodiments, the etching stop layer 300 is removed by a wet etching method, which has a selectivity of the etching solution, so that the first conductive layer 200 cannot be removed to avoid affecting the thickness of the conductive layer. In some embodiments, after removing the etch stop layer 300, a third conductive layer 600 may be formed on the first conductive layer 200 and the via plug 500, which may provide for a subsequent formation of a surface patterned circuit layer on a circuit board.

From the foregoing, in an embodiment of the disclosure, a circuit board manufacturing process is improved, and the manufactured circuit board with a through hole T is manufactured through the manufacturing process of integrally forming the first conductive layer 200, so that the thickness variation of the conductive layer can be reduced to be less than ± 10 μm, thereby reducing the signal variation of the circuit board and improving the stability of the circuit board; in addition, by using the design of the etching stop layer, the thickness of the conductive layer on the inner wall of the through hole T is increased without increasing the thickness of the conductive layer on the surface of the substrate 100, so as to obtain a circuit board satisfying the requirements of the thinness of the conductive layer on the surface of the substrate and the thickness of the conductive layer on the inner wall of the through hole.

Another aspect of the present disclosure is to provide a circuit board. Please refer to fig. 9. The circuit board includes a substrate 100, at least one through hole T, conductive layers (i.e., a first conductive layer 200 and a second conductive layer 400'), and a via pillar 500. The through hole T penetrates the substrate 100. The conductive layer is disposed on the surface of the substrate 100 (e.g., the first surface 104 or/and the second surface 106, and the first conductive layer 200), and on the inner wall of the through hole T (i.e., the first conductive layer 200 ' and the second conductive layer 400 '), and is integrally formed at a connection between the portion of the surface of the substrate 100 (i.e., the first conductive layer 200) and the portion of the inner wall of the through hole T (i.e., the first conductive layer 200 ', please refer to fig. 10). The plug hole pillar 500 is filled in the through hole T, and the conductive layer is located between the substrate 100 and the plug hole pillar 500.

In some embodiments, the substrate comprises a single layer board or a multilayer board.

In some embodiments, the thickness w2 of the conductive layer within the through-hole is greater than the thickness of the conductive layer at the surface of the substrate. In some embodiments, the material of the conductive layer is copper.

It is worth mentioning that the portion between the first conductive layer and the second conductive layer on the inner wall surface of the via hole edge can be measured one or more different components from the material of the conductive layer by elemental analysis. In some embodiments, the composition is a sputtering material used for the etch stop layer, such as titanium, zinc, cobalt, chromium, or alloys thereof.

In some embodiments, the material of the receptacle posts 500 is an insulating material.

While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

1. A method for manufacturing a circuit board, comprising the steps of:

providing a substrate;

penetrating the substrate to form at least one through hole in the substrate;

forming a first conductive layer on the surface of the substrate and the inner wall of the through hole, wherein the first conductive layer is integrally formed on the surface and the inner wall;

forming an etch stop layer on a portion of the first conductive layer, wherein the portion is on the surface of the substrate;

forming a second conductive layer on the etching stop layer and the first conductive layer on the inner wall of the through hole, wherein the second conductive layer is integrally formed on the etching stop layer and the inner wall;

filling the hole plugging material in the through hole to form a hole plugging column;

removing the second conductive layer; and

the etch stop layer is removed.

2. The method for manufacturing a circuit board according to claim 1, wherein: wherein the substrate is formed by laminating a plurality of base materials.

3. The method for manufacturing a circuit board according to claim 1, wherein: before the step of forming the first conductive layer, the method further includes removing the metal material on the surface of the substrate.

4. The method for manufacturing a circuit board according to claim 1, wherein: wherein the material of the first conductive layer is copper.

5. The method for manufacturing a circuit board according to claim 1, wherein: wherein the material of the etch stop layer is different from the material of the first conductive layer.

6. The method for manufacturing a circuit board according to claim 1, wherein: wherein the step of forming the etch stop layer further comprises forming the etch stop layer simultaneously on a portion of the first conductive layer on the inner wall of the via.

7. The method for manufacturing a circuit board according to claim 1, wherein: wherein the step of forming the etch stop layer comprises sputtering metal on the first conductive layer by sputtering method to form the etch stop layer.

8. The method for manufacturing a circuit board according to claim 7, wherein: wherein the metal comprises titanium, zinc, cobalt, chromium, or combinations thereof.

9. The method for manufacturing a circuit board according to claim 1, wherein: wherein the material of the second conductive layer is the same as the material of the first conductive layer.

10. The method for manufacturing a circuit board according to claim 1, wherein: after the plug hole pillar is formed, the manufacturing method further includes removing the plug hole material protruding on the plug hole pillar and a part of the second conductive layer, so that the plug hole pillar and the second conductive layer are coplanar.

11. The method for manufacturing a circuit board according to claim 1, wherein: wherein the step of removing the second conductive layer comprises removing the second conductive layer by grinding.

12. The method for manufacturing a circuit board according to claim 1, wherein: wherein the step of removing the etching stop layer comprises removing the etching stop layer by wet etching, wherein the first conductive layer cannot be removed by an etching solution used in the wet etching.

13. The method for manufacturing a circuit board according to claim 1, wherein: after the step of removing the etching stop layer, the manufacturing method further comprises forming a third conductive layer on the first conductive layer and the via post.

14. A circuit board, comprising:

a substrate;

at least one through hole penetrating through the substrate;

the conducting layer is arranged on the surface of the substrate and the inner wall of the through hole, wherein the conducting layer is integrally formed at the connecting part of the surface and the inner wall; and

and the plug hole column is filled in the at least one through hole, and the conducting layer is positioned between the substrate and the plug hole column.

15. The circuit board of claim 14, wherein: wherein the substrate comprises a multilayer board.

16. The circuit board of claim 14, wherein: wherein the thickness of the conductive layer in the through hole is larger than that of the conductive layer on the surface of the substrate.

17. The circuit board of claim 14, wherein: wherein the material of the conductive layer is copper.

18. The circuit board of claim 14, wherein: wherein a part of the conductive layer is located on the surface of the inner wall of the hole edge of the through hole, and the part comprises sputtering raw materials.

19. The circuit board of claim 18, wherein: wherein the sputtering material comprises titanium, zinc, cobalt, chromium or alloys thereof.

20. The circuit board of claim 14, wherein: wherein the material of the plug hole column is an insulating material.